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Recent (host) kernels support emulating the PAPR defined "XICS" interrupt controller system within KVM. This patch allows qemu to initialize and configure the in-kernel XICS, and keep its state in sync with qemu's XICS state as necessary. This should give considerable performance improvements. e.g. on a simple IPI ping-pong test between hardware threads, using qemu XICS gives us around 5,000 irqs/second, whereas the in-kernel XICS gives us around 70,000 irqs/s on the same hardware configuration. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> [Mike Qiu <qiudayu@linux.vnet.ibm.com>: fixed mistype which caused ics_set_kvm_state() to fail] Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Reviewed-by: Alexander Graf <agraf@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>pull/8/head
David Gibson
13 years ago
committed by
Alexander Graf
Alexander Graf
5 changed files with 520 additions and 1 deletions
@ -0,0 +1,488 @@ |
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/*
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* QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator |
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* |
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* PAPR Virtualized Interrupt System, aka ICS/ICP aka xics, in-kernel emulation |
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* |
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* Copyright (c) 2013 David Gibson, IBM Corporation. |
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* |
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* Permission is hereby granted, free of charge, to any person obtaining a copy |
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* of this software and associated documentation files (the "Software"), to deal |
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* in the Software without restriction, including without limitation the rights |
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell |
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* copies of the Software, and to permit persons to whom the Software is |
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* furnished to do so, subject to the following conditions: |
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* |
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* The above copyright notice and this permission notice shall be included in |
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* all copies or substantial portions of the Software. |
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* |
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
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* THE SOFTWARE. |
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* |
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*/ |
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#include "hw/hw.h" |
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#include "trace.h" |
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#include "hw/ppc/spapr.h" |
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#include "hw/ppc/xics.h" |
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#include "kvm_ppc.h" |
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#include "qemu/config-file.h" |
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#include "qemu/error-report.h" |
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#include <sys/ioctl.h> |
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typedef struct KVMXICSState { |
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XICSState parent_obj; |
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uint32_t set_xive_token; |
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uint32_t get_xive_token; |
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uint32_t int_off_token; |
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uint32_t int_on_token; |
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int kernel_xics_fd; |
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} KVMXICSState; |
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/*
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* ICP-KVM |
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*/ |
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static void icp_get_kvm_state(ICPState *ss) |
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{ |
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uint64_t state; |
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struct kvm_one_reg reg = { |
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.id = KVM_REG_PPC_ICP_STATE, |
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.addr = (uintptr_t)&state, |
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}; |
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int ret; |
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/* ICP for this CPU thread is not in use, exiting */ |
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if (!ss->cs) { |
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return; |
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} |
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ret = kvm_vcpu_ioctl(ss->cs, KVM_GET_ONE_REG, ®); |
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if (ret != 0) { |
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error_report("Unable to retrieve KVM interrupt controller state" |
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" for CPU %d: %s", ss->cs->cpu_index, strerror(errno)); |
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exit(1); |
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} |
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ss->xirr = state >> KVM_REG_PPC_ICP_XISR_SHIFT; |
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ss->mfrr = (state >> KVM_REG_PPC_ICP_MFRR_SHIFT) |
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& KVM_REG_PPC_ICP_MFRR_MASK; |
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ss->pending_priority = (state >> KVM_REG_PPC_ICP_PPRI_SHIFT) |
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& KVM_REG_PPC_ICP_PPRI_MASK; |
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} |
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static int icp_set_kvm_state(ICPState *ss, int version_id) |
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{ |
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uint64_t state; |
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struct kvm_one_reg reg = { |
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.id = KVM_REG_PPC_ICP_STATE, |
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.addr = (uintptr_t)&state, |
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}; |
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int ret; |
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/* ICP for this CPU thread is not in use, exiting */ |
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if (!ss->cs) { |
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return 0; |
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} |
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state = ((uint64_t)ss->xirr << KVM_REG_PPC_ICP_XISR_SHIFT) |
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| ((uint64_t)ss->mfrr << KVM_REG_PPC_ICP_MFRR_SHIFT) |
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| ((uint64_t)ss->pending_priority << KVM_REG_PPC_ICP_PPRI_SHIFT); |
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ret = kvm_vcpu_ioctl(ss->cs, KVM_SET_ONE_REG, ®); |
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if (ret != 0) { |
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error_report("Unable to restore KVM interrupt controller state (0x%" |
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PRIx64 ") for CPU %d: %s", state, ss->cs->cpu_index, |
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strerror(errno)); |
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return ret; |
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} |
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return 0; |
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} |
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static void icp_kvm_reset(DeviceState *dev) |
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{ |
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ICPState *icp = ICP(dev); |
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icp->xirr = 0; |
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icp->pending_priority = 0xff; |
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icp->mfrr = 0xff; |
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/* Make all outputs are deasserted */ |
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qemu_set_irq(icp->output, 0); |
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icp_set_kvm_state(icp, 1); |
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} |
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static void icp_kvm_class_init(ObjectClass *klass, void *data) |
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{ |
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DeviceClass *dc = DEVICE_CLASS(klass); |
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ICPStateClass *icpc = ICP_CLASS(klass); |
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dc->reset = icp_kvm_reset; |
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icpc->pre_save = icp_get_kvm_state; |
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icpc->post_load = icp_set_kvm_state; |
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} |
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static const TypeInfo icp_kvm_info = { |
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.name = TYPE_KVM_ICP, |
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.parent = TYPE_ICP, |
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.instance_size = sizeof(ICPState), |
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.class_init = icp_kvm_class_init, |
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.class_size = sizeof(ICPStateClass), |
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}; |
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/*
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* ICS-KVM |
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*/ |
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static void ics_get_kvm_state(ICSState *ics) |
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{ |
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KVMXICSState *icpkvm = KVM_XICS(ics->icp); |
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uint64_t state; |
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struct kvm_device_attr attr = { |
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.flags = 0, |
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.group = KVM_DEV_XICS_GRP_SOURCES, |
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.addr = (uint64_t)(uintptr_t)&state, |
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}; |
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int i; |
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for (i = 0; i < ics->nr_irqs; i++) { |
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ICSIRQState *irq = &ics->irqs[i]; |
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int ret; |
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attr.attr = i + ics->offset; |
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ret = ioctl(icpkvm->kernel_xics_fd, KVM_GET_DEVICE_ATTR, &attr); |
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if (ret != 0) { |
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error_report("Unable to retrieve KVM interrupt controller state" |
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" for IRQ %d: %s", i + ics->offset, strerror(errno)); |
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exit(1); |
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} |
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irq->server = state & KVM_XICS_DESTINATION_MASK; |
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irq->saved_priority = (state >> KVM_XICS_PRIORITY_SHIFT) |
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& KVM_XICS_PRIORITY_MASK; |
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/*
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* To be consistent with the software emulation in xics.c, we |
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* split out the masked state + priority that we get from the |
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* kernel into 'current priority' (0xff if masked) and |
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* 'saved priority' (if masked, this is the priority the |
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* interrupt had before it was masked). Masking and unmasking |
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* are done with the ibm,int-off and ibm,int-on RTAS calls. |
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*/ |
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if (state & KVM_XICS_MASKED) { |
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irq->priority = 0xff; |
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} else { |
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irq->priority = irq->saved_priority; |
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} |
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if (state & KVM_XICS_PENDING) { |
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if (state & KVM_XICS_LEVEL_SENSITIVE) { |
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irq->status |= XICS_STATUS_ASSERTED; |
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} else { |
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/*
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* A pending edge-triggered interrupt (or MSI) |
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* must have been rejected previously when we |
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* first detected it and tried to deliver it, |
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* so mark it as pending and previously rejected |
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* for consistency with how xics.c works. |
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*/ |
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irq->status |= XICS_STATUS_MASKED_PENDING |
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| XICS_STATUS_REJECTED; |
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} |
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} |
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} |
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} |
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static int ics_set_kvm_state(ICSState *ics, int version_id) |
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{ |
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KVMXICSState *icpkvm = KVM_XICS(ics->icp); |
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uint64_t state; |
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struct kvm_device_attr attr = { |
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.flags = 0, |
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.group = KVM_DEV_XICS_GRP_SOURCES, |
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.addr = (uint64_t)(uintptr_t)&state, |
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}; |
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int i; |
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for (i = 0; i < ics->nr_irqs; i++) { |
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ICSIRQState *irq = &ics->irqs[i]; |
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int ret; |
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attr.attr = i + ics->offset; |
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state = irq->server; |
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state |= (uint64_t)(irq->saved_priority & KVM_XICS_PRIORITY_MASK) |
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<< KVM_XICS_PRIORITY_SHIFT; |
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if (irq->priority != irq->saved_priority) { |
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assert(irq->priority == 0xff); |
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state |= KVM_XICS_MASKED; |
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} |
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if (ics->islsi[i]) { |
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state |= KVM_XICS_LEVEL_SENSITIVE; |
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if (irq->status & XICS_STATUS_ASSERTED) { |
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state |= KVM_XICS_PENDING; |
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} |
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} else { |
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if (irq->status & XICS_STATUS_MASKED_PENDING) { |
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state |= KVM_XICS_PENDING; |
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} |
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} |
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ret = ioctl(icpkvm->kernel_xics_fd, KVM_SET_DEVICE_ATTR, &attr); |
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if (ret != 0) { |
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error_report("Unable to restore KVM interrupt controller state" |
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" for IRQs %d: %s", i + ics->offset, strerror(errno)); |
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return ret; |
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} |
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} |
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return 0; |
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} |
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static void ics_kvm_set_irq(void *opaque, int srcno, int val) |
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{ |
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ICSState *ics = opaque; |
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struct kvm_irq_level args; |
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int rc; |
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args.irq = srcno + ics->offset; |
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if (!ics->islsi[srcno]) { |
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if (!val) { |
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return; |
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} |
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args.level = KVM_INTERRUPT_SET; |
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} else { |
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args.level = val ? KVM_INTERRUPT_SET_LEVEL : KVM_INTERRUPT_UNSET; |
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} |
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rc = kvm_vm_ioctl(kvm_state, KVM_IRQ_LINE, &args); |
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if (rc < 0) { |
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perror("kvm_irq_line"); |
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} |
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} |
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static void ics_kvm_reset(DeviceState *dev) |
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{ |
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ics_set_kvm_state(ICS(dev), 1); |
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} |
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static void ics_kvm_realize(DeviceState *dev, Error **errp) |
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{ |
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ICSState *ics = ICS(dev); |
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if (!ics->nr_irqs) { |
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error_setg(errp, "Number of interrupts needs to be greater 0"); |
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return; |
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} |
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ics->irqs = g_malloc0(ics->nr_irqs * sizeof(ICSIRQState)); |
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ics->islsi = g_malloc0(ics->nr_irqs * sizeof(bool)); |
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ics->qirqs = qemu_allocate_irqs(ics_kvm_set_irq, ics, ics->nr_irqs); |
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} |
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static void ics_kvm_class_init(ObjectClass *klass, void *data) |
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{ |
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DeviceClass *dc = DEVICE_CLASS(klass); |
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ICSStateClass *icsc = ICS_CLASS(klass); |
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dc->realize = ics_kvm_realize; |
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dc->reset = ics_kvm_reset; |
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icsc->pre_save = ics_get_kvm_state; |
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icsc->post_load = ics_set_kvm_state; |
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} |
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static const TypeInfo ics_kvm_info = { |
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.name = TYPE_KVM_ICS, |
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.parent = TYPE_ICS, |
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.instance_size = sizeof(ICSState), |
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.class_init = ics_kvm_class_init, |
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}; |
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/*
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* XICS-KVM |
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*/ |
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static void xics_kvm_cpu_setup(XICSState *icp, PowerPCCPU *cpu) |
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{ |
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CPUState *cs; |
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ICPState *ss; |
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KVMXICSState *icpkvm = KVM_XICS(icp); |
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cs = CPU(cpu); |
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ss = &icp->ss[cs->cpu_index]; |
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assert(cs->cpu_index < icp->nr_servers); |
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if (icpkvm->kernel_xics_fd == -1) { |
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abort(); |
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} |
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if (icpkvm->kernel_xics_fd != -1) { |
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int ret; |
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struct kvm_enable_cap xics_enable_cap = { |
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.cap = KVM_CAP_IRQ_XICS, |
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.flags = 0, |
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.args = {icpkvm->kernel_xics_fd, cs->cpu_index, 0, 0}, |
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}; |
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ss->cs = cs; |
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ret = kvm_vcpu_ioctl(ss->cs, KVM_ENABLE_CAP, &xics_enable_cap); |
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if (ret < 0) { |
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error_report("Unable to connect CPU%d to kernel XICS: %s", |
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cs->cpu_index, strerror(errno)); |
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exit(1); |
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} |
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} |
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} |
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static void xics_kvm_set_nr_irqs(XICSState *icp, uint32_t nr_irqs, Error **errp) |
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{ |
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icp->nr_irqs = icp->ics->nr_irqs = nr_irqs; |
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} |
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static void xics_kvm_set_nr_servers(XICSState *icp, uint32_t nr_servers, |
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Error **errp) |
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{ |
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int i; |
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icp->nr_servers = nr_servers; |
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icp->ss = g_malloc0(icp->nr_servers*sizeof(ICPState)); |
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for (i = 0; i < icp->nr_servers; i++) { |
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char buffer[32]; |
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object_initialize(&icp->ss[i], sizeof(icp->ss[i]), TYPE_KVM_ICP); |
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snprintf(buffer, sizeof(buffer), "icp[%d]", i); |
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object_property_add_child(OBJECT(icp), buffer, OBJECT(&icp->ss[i]), |
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errp); |
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} |
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} |
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static void rtas_dummy(PowerPCCPU *cpu, sPAPREnvironment *spapr, |
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uint32_t token, |
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uint32_t nargs, target_ulong args, |
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uint32_t nret, target_ulong rets) |
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{ |
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error_report("pseries: %s must never be called for in-kernel XICS", |
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__func__); |
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} |
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static void xics_kvm_realize(DeviceState *dev, Error **errp) |
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{ |
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KVMXICSState *icpkvm = KVM_XICS(dev); |
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XICSState *icp = XICS_COMMON(dev); |
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int i, rc; |
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Error *error = NULL; |
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struct kvm_create_device xics_create_device = { |
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.type = KVM_DEV_TYPE_XICS, |
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.flags = 0, |
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}; |
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if (!kvm_enabled() || !kvm_check_extension(kvm_state, KVM_CAP_IRQ_XICS)) { |
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error_setg(errp, |
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"KVM and IRQ_XICS capability must be present for in-kernel XICS"); |
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goto fail; |
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} |
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icpkvm->set_xive_token = spapr_rtas_register("ibm,set-xive", rtas_dummy); |
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icpkvm->get_xive_token = spapr_rtas_register("ibm,get-xive", rtas_dummy); |
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icpkvm->int_off_token = spapr_rtas_register("ibm,int-off", rtas_dummy); |
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icpkvm->int_on_token = spapr_rtas_register("ibm,int-on", rtas_dummy); |
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rc = kvmppc_define_rtas_kernel_token(icpkvm->set_xive_token, |
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"ibm,set-xive"); |
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if (rc < 0) { |
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error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,set-xive"); |
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goto fail; |
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} |
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rc = kvmppc_define_rtas_kernel_token(icpkvm->get_xive_token, |
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"ibm,get-xive"); |
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if (rc < 0) { |
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error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,get-xive"); |
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goto fail; |
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} |
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rc = kvmppc_define_rtas_kernel_token(icpkvm->int_on_token, "ibm,int-on"); |
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if (rc < 0) { |
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error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,int-on"); |
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goto fail; |
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} |
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rc = kvmppc_define_rtas_kernel_token(icpkvm->int_off_token, "ibm,int-off"); |
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if (rc < 0) { |
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error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,int-off"); |
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goto fail; |
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} |
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/* Create the kernel ICP */ |
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rc = kvm_vm_ioctl(kvm_state, KVM_CREATE_DEVICE, &xics_create_device); |
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if (rc < 0) { |
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error_setg_errno(errp, -rc, "Error on KVM_CREATE_DEVICE for XICS"); |
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goto fail; |
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} |
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icpkvm->kernel_xics_fd = xics_create_device.fd; |
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object_property_set_bool(OBJECT(icp->ics), true, "realized", &error); |
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if (error) { |
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error_propagate(errp, error); |
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goto fail; |
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} |
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assert(icp->nr_servers); |
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for (i = 0; i < icp->nr_servers; i++) { |
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object_property_set_bool(OBJECT(&icp->ss[i]), true, "realized", &error); |
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if (error) { |
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error_propagate(errp, error); |
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goto fail; |
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} |
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} |
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return; |
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fail: |
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kvmppc_define_rtas_kernel_token(0, "ibm,set-xive"); |
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kvmppc_define_rtas_kernel_token(0, "ibm,get-xive"); |
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kvmppc_define_rtas_kernel_token(0, "ibm,int-on"); |
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kvmppc_define_rtas_kernel_token(0, "ibm,int-off"); |
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} |
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static void xics_kvm_initfn(Object *obj) |
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{ |
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XICSState *xics = XICS_COMMON(obj); |
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xics->ics = ICS(object_new(TYPE_KVM_ICS)); |
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object_property_add_child(obj, "ics", OBJECT(xics->ics), NULL); |
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xics->ics->icp = xics; |
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} |
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static void xics_kvm_class_init(ObjectClass *oc, void *data) |
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{ |
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DeviceClass *dc = DEVICE_CLASS(oc); |
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XICSStateClass *xsc = XICS_COMMON_CLASS(oc); |
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dc->realize = xics_kvm_realize; |
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xsc->cpu_setup = xics_kvm_cpu_setup; |
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xsc->set_nr_irqs = xics_kvm_set_nr_irqs; |
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xsc->set_nr_servers = xics_kvm_set_nr_servers; |
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} |
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static const TypeInfo xics_kvm_info = { |
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.name = TYPE_KVM_XICS, |
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.parent = TYPE_XICS_COMMON, |
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.instance_size = sizeof(KVMXICSState), |
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.class_init = xics_kvm_class_init, |
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.instance_init = xics_kvm_initfn, |
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}; |
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|
|||
static void xics_kvm_register_types(void) |
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{ |
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type_register_static(&xics_kvm_info); |
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type_register_static(&ics_kvm_info); |
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type_register_static(&icp_kvm_info); |
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} |
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|
|||
type_init(xics_kvm_register_types) |
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Loading…
Reference in new issue