@ -7,6 +7,8 @@
* COPYING file in the top - level directory .
*/
# include <math.h>
# include "qemu/osdep.h"
# include "hw/pci/msi.h"
# include "hw/pci/msix.h"
@ -56,6 +58,8 @@ enum {
INFOSTAT = 0x00 ,
# define IS_IDENTIFY 0x1
# define BACKGROUND_OPERATION_STATUS 0x2
# define GET_RESPONSE_MSG_LIMIT 0x3
# define SET_RESPONSE_MSG_LIMIT 0x4
# define BACKGROUND_OPERATION_ABORT 0x5
EVENTS = 0x01 ,
# define GET_RECORDS 0x0
@ -413,12 +417,58 @@ static CXLRetCode cmd_infostat_identify(const struct cxl_cmd *cmd,
is_identify - > component_type = 0x3 ; /* Type 3 */
}
/* TODO: Allow this to vary across different CCIs */
is_identify - > max_message_size = 9 ; /* 512 bytes - MCTP_CXL_MAILBOX_BYTES */
is_identify - > max_message_size = ( uint8_t ) log2 ( cci - > payload_max ) ;
* len_out = sizeof ( * is_identify ) ;
return CXL_MBOX_SUCCESS ;
}
/* CXL r3.1 section 8.2.9.1.3: Get Response Message Limit (Opcode 0003h) */
static CXLRetCode cmd_get_response_msg_limit ( const struct cxl_cmd * cmd ,
uint8_t * payload_in ,
size_t len_in ,
uint8_t * payload_out ,
size_t * len_out ,
CXLCCI * cci )
{
struct {
uint8_t rsp_limit ;
} QEMU_PACKED * get_rsp_msg_limit = ( void * ) payload_out ;
QEMU_BUILD_BUG_ON ( sizeof ( * get_rsp_msg_limit ) ! = 1 ) ;
get_rsp_msg_limit - > rsp_limit = ( uint8_t ) log2 ( cci - > payload_max ) ;
* len_out = sizeof ( * get_rsp_msg_limit ) ;
return CXL_MBOX_SUCCESS ;
}
/* CXL r3.1 section 8.2.9.1.4: Set Response Message Limit (Opcode 0004h) */
static CXLRetCode cmd_set_response_msg_limit ( const struct cxl_cmd * cmd ,
uint8_t * payload_in ,
size_t len_in ,
uint8_t * payload_out ,
size_t * len_out ,
CXLCCI * cci )
{
struct {
uint8_t rsp_limit ;
} QEMU_PACKED * in = ( void * ) payload_in ;
QEMU_BUILD_BUG_ON ( sizeof ( * in ) ! = 1 ) ;
struct {
uint8_t rsp_limit ;
} QEMU_PACKED * out = ( void * ) payload_out ;
QEMU_BUILD_BUG_ON ( sizeof ( * out ) ! = 1 ) ;
if ( in - > rsp_limit < 8 | | in - > rsp_limit > 10 ) {
return CXL_MBOX_INVALID_INPUT ;
}
cci - > payload_max = 1 < < in - > rsp_limit ;
out - > rsp_limit = in - > rsp_limit ;
* len_out = sizeof ( * out ) ;
return CXL_MBOX_SUCCESS ;
}
static void cxl_set_dsp_active_bm ( PCIBus * b , PCIDevice * d ,
void * private )
{
@ -3105,6 +3155,10 @@ void cxl_initialize_t3_ld_cci(CXLCCI *cci, DeviceState *d, DeviceState *intf,
static const struct cxl_cmd cxl_cmd_set_t3_fm_owned_ld_mctp [ 256 ] [ 256 ] = {
[ INFOSTAT ] [ IS_IDENTIFY ] = { " IDENTIFY " , cmd_infostat_identify , 0 , 0 } ,
[ INFOSTAT ] [ GET_RESPONSE_MSG_LIMIT ] = { " GET_RESPONSE_MSG_LIMIT " ,
cmd_get_response_msg_limit , 0 , 0 } ,
[ INFOSTAT ] [ SET_RESPONSE_MSG_LIMIT ] = { " SET_RESPONSE_MSG_LIMIT " ,
cmd_set_response_msg_limit , 1 , 0 } ,
[ LOGS ] [ GET_SUPPORTED ] = { " LOGS_GET_SUPPORTED " , cmd_logs_get_supported , 0 ,
0 } ,
[ LOGS ] [ GET_LOG ] = { " LOGS_GET_LOG " , cmd_logs_get_log , 0x18 , 0 } ,