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Add a system controller for the m68k-virt machine. This controller allows the kernel to power off or reset the machine. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210312214145.2936082-5-laurent@vivier.eu>pull/113/head
Laurent Vivier
5 years ago
6 changed files with 212 additions and 0 deletions
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Virtual System Controller |
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========================= |
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This device is a simple interface defined for the pure virtual machine with no |
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hardware reference implementation to allow the guest kernel to send command |
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to the host hypervisor. |
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The specification can evolve, the current state is defined as below. |
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This is a MMIO mapped device using 256 bytes. |
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Two 32bit registers are defined: |
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1- the features register (read-only, address 0x00) |
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This register allows the device to report features supported by the |
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controller. |
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The only feature supported for the moment is power control (0x01). |
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2- the command register (write-only, address 0x04) |
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This register allows the kernel to send the commands to the hypervisor. |
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The implemented commands are part of the power control feature and |
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are reset (1), halt (2) and panic (3). |
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A basic command, no-op (0), is always present and can be used to test the |
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register access. This command has no effect. |
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/*
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* SPDX-License-Identifer: GPL-2.0-or-later |
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* |
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* Virt system Controller |
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*/ |
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#include "qemu/osdep.h" |
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#include "hw/irq.h" |
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#include "hw/qdev-properties.h" |
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#include "hw/sysbus.h" |
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#include "migration/vmstate.h" |
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#include "qemu/log.h" |
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#include "trace.h" |
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#include "sysemu/runstate.h" |
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#include "hw/misc/virt_ctrl.h" |
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enum { |
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REG_FEATURES = 0x00, |
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REG_CMD = 0x04, |
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}; |
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#define FEAT_POWER_CTRL 0x00000001 |
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enum { |
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CMD_NOOP, |
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CMD_RESET, |
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CMD_HALT, |
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CMD_PANIC, |
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}; |
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static uint64_t virt_ctrl_read(void *opaque, hwaddr addr, unsigned size) |
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{ |
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VirtCtrlState *s = opaque; |
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uint64_t value = 0; |
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switch (addr) { |
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case REG_FEATURES: |
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value = FEAT_POWER_CTRL; |
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break; |
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default: |
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qemu_log_mask(LOG_UNIMP, |
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"%s: unimplemented register read 0x%02"HWADDR_PRIx"\n", |
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__func__, addr); |
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break; |
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} |
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trace_virt_ctrl_write(s, addr, size, value); |
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return value; |
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} |
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static void virt_ctrl_write(void *opaque, hwaddr addr, uint64_t value, |
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unsigned size) |
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{ |
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VirtCtrlState *s = opaque; |
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trace_virt_ctrl_write(s, addr, size, value); |
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switch (addr) { |
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case REG_CMD: |
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switch (value) { |
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case CMD_NOOP: |
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break; |
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case CMD_RESET: |
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qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET); |
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break; |
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case CMD_HALT: |
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qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN); |
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break; |
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case CMD_PANIC: |
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qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_PANIC); |
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break; |
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} |
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break; |
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default: |
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qemu_log_mask(LOG_UNIMP, |
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"%s: unimplemented register write 0x%02"HWADDR_PRIx"\n", |
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__func__, addr); |
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break; |
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} |
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} |
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static const MemoryRegionOps virt_ctrl_ops = { |
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.read = virt_ctrl_read, |
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.write = virt_ctrl_write, |
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.endianness = DEVICE_NATIVE_ENDIAN, |
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.valid.max_access_size = 4, |
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.impl.max_access_size = 4, |
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}; |
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static void virt_ctrl_reset(DeviceState *dev) |
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{ |
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VirtCtrlState *s = VIRT_CTRL(dev); |
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trace_virt_ctrl_reset(s); |
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} |
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static void virt_ctrl_realize(DeviceState *dev, Error **errp) |
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{ |
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VirtCtrlState *s = VIRT_CTRL(dev); |
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trace_virt_ctrl_instance_init(s); |
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memory_region_init_io(&s->iomem, OBJECT(s), &virt_ctrl_ops, s, |
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"virt-ctrl", 0x100); |
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} |
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static const VMStateDescription vmstate_virt_ctrl = { |
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.name = "virt-ctrl", |
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.version_id = 1, |
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.minimum_version_id = 1, |
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.fields = (VMStateField[]) { |
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VMSTATE_UINT32(irq_enabled, VirtCtrlState), |
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VMSTATE_END_OF_LIST() |
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} |
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}; |
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static void virt_ctrl_instance_init(Object *obj) |
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{ |
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SysBusDevice *dev = SYS_BUS_DEVICE(obj); |
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VirtCtrlState *s = VIRT_CTRL(obj); |
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trace_virt_ctrl_instance_init(s); |
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sysbus_init_mmio(dev, &s->iomem); |
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sysbus_init_irq(dev, &s->irq); |
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} |
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static void virt_ctrl_class_init(ObjectClass *oc, void *data) |
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{ |
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DeviceClass *dc = DEVICE_CLASS(oc); |
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dc->reset = virt_ctrl_reset; |
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dc->realize = virt_ctrl_realize; |
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dc->vmsd = &vmstate_virt_ctrl; |
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} |
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static const TypeInfo virt_ctrl_info = { |
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.name = TYPE_VIRT_CTRL, |
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.parent = TYPE_SYS_BUS_DEVICE, |
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.class_init = virt_ctrl_class_init, |
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.instance_init = virt_ctrl_instance_init, |
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.instance_size = sizeof(VirtCtrlState), |
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}; |
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static void virt_ctrl_register_types(void) |
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{ |
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type_register_static(&virt_ctrl_info); |
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} |
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type_init(virt_ctrl_register_types) |
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/*
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* SPDX-License-Identifer: GPL-2.0-or-later |
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* |
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* Virt system Controller |
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*/ |
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#ifndef VIRT_CTRL_H |
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#define VIRT_CTRL_H |
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#define TYPE_VIRT_CTRL "virt-ctrl" |
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OBJECT_DECLARE_SIMPLE_TYPE(VirtCtrlState, VIRT_CTRL) |
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struct VirtCtrlState { |
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SysBusDevice parent_obj; |
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MemoryRegion iomem; |
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qemu_irq irq; |
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uint32_t irq_enabled; |
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}; |
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#endif |
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