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softfloat: Inline float64 compare specializations 

Replace the float64 compare specializations with inline functions
that call the standard float64_compare{,_quiet} functions.
Use bool as the return type.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
pull/93/head
Richard Henderson 6 years ago
parent
5da2d2d8e5
commit
0673ecdf6c
3 changed files with 42 additions and 229 deletions
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  1. 220
      fpu/softfloat.c
  2. 49
      include/fpu/softfloat.h
  3. 2
      target/s390x/vec_fpu_helper.c

220
fpu/softfloat.c
View File

@ -4941,226 +4941,6 @@ float64 float64_log2(float64 a, float_status *status)
return normalizeRoundAndPackFloat64(zSign, 0x408, zSig, status);
}
/*----------------------------------------------------------------------------
| Returns 1 if the double-precision floating-point value `a' is equal to the
| corresponding value `b', and 0 otherwise. The invalid exception is raised
| if either operand is a NaN. Otherwise, the comparison is performed
| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/
int float64_eq(float64 a, float64 b, float_status *status)
{
uint64_t av, bv;
a = float64_squash_input_denormal(a, status);
b = float64_squash_input_denormal(b, status);
if ( ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )
|| ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )
) {
float_raise(float_flag_invalid, status);
return 0;
}
av = float64_val(a);
bv = float64_val(b);
return ( av == bv ) || ( (uint64_t) ( ( av | bv )<<1 ) == 0 );
}
/*----------------------------------------------------------------------------
| Returns 1 if the double-precision floating-point value `a' is less than or
| equal to the corresponding value `b', and 0 otherwise. The invalid
| exception is raised if either operand is a NaN. The comparison is performed
| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/
int float64_le(float64 a, float64 b, float_status *status)
{
bool aSign, bSign;
uint64_t av, bv;
a = float64_squash_input_denormal(a, status);
b = float64_squash_input_denormal(b, status);
if ( ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )
|| ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )
) {
float_raise(float_flag_invalid, status);
return 0;
}
aSign = extractFloat64Sign( a );
bSign = extractFloat64Sign( b );
av = float64_val(a);
bv = float64_val(b);
if ( aSign != bSign ) return aSign || ( (uint64_t) ( ( av | bv )<<1 ) == 0 );
return ( av == bv ) || ( aSign ^ ( av < bv ) );
}
/*----------------------------------------------------------------------------
| Returns 1 if the double-precision floating-point value `a' is less than
| the corresponding value `b', and 0 otherwise. The invalid exception is
| raised if either operand is a NaN. The comparison is performed according
| to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/
int float64_lt(float64 a, float64 b, float_status *status)
{
bool aSign, bSign;
uint64_t av, bv;
a = float64_squash_input_denormal(a, status);
b = float64_squash_input_denormal(b, status);
if ( ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )
|| ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )
) {
float_raise(float_flag_invalid, status);
return 0;
}
aSign = extractFloat64Sign( a );
bSign = extractFloat64Sign( b );
av = float64_val(a);
bv = float64_val(b);
if ( aSign != bSign ) return aSign && ( (uint64_t) ( ( av | bv )<<1 ) != 0 );
return ( av != bv ) && ( aSign ^ ( av < bv ) );
}
/*----------------------------------------------------------------------------
| Returns 1 if the double-precision floating-point values `a' and `b' cannot
| be compared, and 0 otherwise. The invalid exception is raised if either
| operand is a NaN. The comparison is performed according to the IEC/IEEE
| Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/
int float64_unordered(float64 a, float64 b, float_status *status)
{
a = float64_squash_input_denormal(a, status);
b = float64_squash_input_denormal(b, status);
if ( ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )
|| ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )
) {
float_raise(float_flag_invalid, status);
return 1;
}
return 0;
}
/*----------------------------------------------------------------------------
| Returns 1 if the double-precision floating-point value `a' is equal to the
| corresponding value `b', and 0 otherwise. Quiet NaNs do not cause an
| exception.The comparison is performed according to the IEC/IEEE Standard
| for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/
int float64_eq_quiet(float64 a, float64 b, float_status *status)
{
uint64_t av, bv;
a = float64_squash_input_denormal(a, status);
b = float64_squash_input_denormal(b, status);
if ( ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )
|| ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )
) {
if (float64_is_signaling_nan(a, status)
|| float64_is_signaling_nan(b, status)) {
float_raise(float_flag_invalid, status);
}
return 0;
}
av = float64_val(a);
bv = float64_val(b);
return ( av == bv ) || ( (uint64_t) ( ( av | bv )<<1 ) == 0 );
}
/*----------------------------------------------------------------------------
| Returns 1 if the double-precision floating-point value `a' is less than or
| equal to the corresponding value `b', and 0 otherwise. Quiet NaNs do not
| cause an exception. Otherwise, the comparison is performed according to the
| IEC/IEEE Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/
int float64_le_quiet(float64 a, float64 b, float_status *status)
{
bool aSign, bSign;
uint64_t av, bv;
a = float64_squash_input_denormal(a, status);
b = float64_squash_input_denormal(b, status);
if ( ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )
|| ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )
) {
if (float64_is_signaling_nan(a, status)
|| float64_is_signaling_nan(b, status)) {
float_raise(float_flag_invalid, status);
}
return 0;
}
aSign = extractFloat64Sign( a );
bSign = extractFloat64Sign( b );
av = float64_val(a);
bv = float64_val(b);
if ( aSign != bSign ) return aSign || ( (uint64_t) ( ( av | bv )<<1 ) == 0 );
return ( av == bv ) || ( aSign ^ ( av < bv ) );
}
/*----------------------------------------------------------------------------
| Returns 1 if the double-precision floating-point value `a' is less than
| the corresponding value `b', and 0 otherwise. Quiet NaNs do not cause an
| exception. Otherwise, the comparison is performed according to the IEC/IEEE
| Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/
int float64_lt_quiet(float64 a, float64 b, float_status *status)
{
bool aSign, bSign;
uint64_t av, bv;
a = float64_squash_input_denormal(a, status);
b = float64_squash_input_denormal(b, status);
if ( ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )
|| ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )
) {
if (float64_is_signaling_nan(a, status)
|| float64_is_signaling_nan(b, status)) {
float_raise(float_flag_invalid, status);
}
return 0;
}
aSign = extractFloat64Sign( a );
bSign = extractFloat64Sign( b );
av = float64_val(a);
bv = float64_val(b);
if ( aSign != bSign ) return aSign && ( (uint64_t) ( ( av | bv )<<1 ) != 0 );
return ( av != bv ) && ( aSign ^ ( av < bv ) );
}
/*----------------------------------------------------------------------------
| Returns 1 if the double-precision floating-point values `a' and `b' cannot
| be compared, and 0 otherwise. Quiet NaNs do not cause an exception. The
| comparison is performed according to the IEC/IEEE Standard for Binary
| Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/
int float64_unordered_quiet(float64 a, float64 b, float_status *status)
{
a = float64_squash_input_denormal(a, status);
b = float64_squash_input_denormal(b, status);
if ( ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )
|| ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )
) {
if (float64_is_signaling_nan(a, status)
|| float64_is_signaling_nan(b, status)) {
float_raise(float_flag_invalid, status);
}
return 1;
}
return 0;
}
/*----------------------------------------------------------------------------
| Returns the result of converting the extended double-precision floating-
| point value `a' to the 32-bit two's complement integer format. The

49
include/fpu/softfloat.h
View File

@ -532,14 +532,6 @@ float64 float64_rem(float64, float64, float_status *status);
float64 float64_muladd(float64, float64, float64, int, float_status *status);
float64 float64_sqrt(float64, float_status *status);
float64 float64_log2(float64, float_status *status);
int float64_eq(float64, float64, float_status *status);
int float64_le(float64, float64, float_status *status);
int float64_lt(float64, float64, float_status *status);
int float64_unordered(float64, float64, float_status *status);
int float64_eq_quiet(float64, float64, float_status *status);
int float64_le_quiet(float64, float64, float_status *status);
int float64_lt_quiet(float64, float64, float_status *status);
int float64_unordered_quiet(float64, float64, float_status *status);
FloatRelation float64_compare(float64, float64, float_status *status);
FloatRelation float64_compare_quiet(float64, float64, float_status *status);
float64 float64_min(float64, float64, float_status *status);
@ -615,6 +607,47 @@ static inline float64 float64_set_sign(float64 a, int sign)
| ((int64_t)sign << 63));
}
static inline bool float64_eq(float64 a, float64 b, float_status *s)
{
return float64_compare(a, b, s) == float_relation_equal;
}
static inline bool float64_le(float64 a, float64 b, float_status *s)
{
return float64_compare(a, b, s) <= float_relation_equal;
}
static inline bool float64_lt(float64 a, float64 b, float_status *s)
{
return float64_compare(a, b, s) < float_relation_equal;
}
static inline bool float64_unordered(float64 a, float64 b, float_status *s)
{
return float64_compare(a, b, s) == float_relation_unordered;
}
static inline bool float64_eq_quiet(float64 a, float64 b, float_status *s)
{
return float64_compare_quiet(a, b, s) == float_relation_equal;
}
static inline bool float64_le_quiet(float64 a, float64 b, float_status *s)
{
return float64_compare_quiet(a, b, s) <= float_relation_equal;
}
static inline bool float64_lt_quiet(float64 a, float64 b, float_status *s)
{
return float64_compare_quiet(a, b, s) < float_relation_equal;
}
static inline bool float64_unordered_quiet(float64 a, float64 b,
float_status *s)
{
return float64_compare_quiet(a, b, s) == float_relation_unordered;
}
#define float64_zero make_float64(0)
#define float64_half make_float64(0x3fe0000000000000LL)
#define float64_one make_float64(0x3ff0000000000000LL)

2
target/s390x/vec_fpu_helper.c
View File

@ -174,7 +174,7 @@ void HELPER(gvec_wfk64)(const void *v1, const void *v2, CPUS390XState *env,
env->cc_op = wfc64(v1, v2, env, true, GETPC());
}
typedef int (*vfc64_fn)(float64 a, float64 b, float_status *status);
typedef bool (*vfc64_fn)(float64 a, float64 b, float_status *status);
static int vfc64(S390Vector *v1, const S390Vector *v2, const S390Vector *v3,
CPUS390XState *env, bool s, vfc64_fn fn, uintptr_t retaddr)
{

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