Browse Source
* m32c/varvects.h: New. * m32c/sample.c: New. * m32c/Makefile.in: Add m32cgloss library support. * m32c/crt0.S: Tweaks to support interrupts by default. * m32c/m32c.tmpl: Likewise.multiprocess-20081120-branch
DJ Delorie
18 years ago
7 changed files with 300 additions and 10 deletions
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/*
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Copyright (c) 2008 Red Hat Incorporated. |
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All rights reserved. |
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Redistribution and use in source and binary forms, with or without |
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modification, are permitted provided that the following conditions are met: |
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Redistributions of source code must retain the above copyright |
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notice, this list of conditions and the following disclaimer. |
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Redistributions in binary form must reproduce the above copyright |
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notice, this list of conditions and the following disclaimer in the |
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documentation and/or other materials provided with the distribution. |
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The name of Red Hat Incorporated may not be used to endorse |
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or promote products derived from this software without specific |
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prior written permission. |
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
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DISCLAIMED. IN NO EVENT SHALL RED HAT INCORPORATED BE LIABLE FOR ANY |
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DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
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(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
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LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND |
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ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
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SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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*/ |
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/* This is a sample program that shows how to use a few of the
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features of the M32C port of GCC, Binutils, and Newlib. */ |
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#include <varvects.h> |
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typedef unsigned char byte; |
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typedef unsigned short word; |
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#define prcr (*(volatile byte *)0x000a) |
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#define cm0 (*(volatile byte *)0x0006) |
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#define cm1 (*(volatile byte *)0x0007) |
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#define ocd (*(volatile byte *)0x000c) |
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#ifdef __r8c_cpu__ |
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/* These are for the R8C/20 with LEDs on port P2 */ |
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#define tracr (*(volatile byte *)0x0100) |
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#define traioc (*(volatile byte *)0x0101) |
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#define tramr (*(volatile byte *)0x0102) |
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#define trapre (*(volatile byte *)0x0103) |
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#define tra (*(volatile byte *)0x0104) |
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#define traic (*(volatile byte *)0x0056) |
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#define pd2 (*(volatile byte *)0x00e6) |
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#define p2 (*(volatile byte *)0x00e4) |
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#define ivec_timer_ra 22 |
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#endif |
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#ifdef __m32c_cpu__ |
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/* These are for the M32C/83 with LEDs on port P0 and P1 */ |
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#define ta0 (*(volatile word *)0x0346) |
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#define ta0mr (*(volatile byte *)0x0356) |
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#define tabsr (*(volatile byte *)0x0340) |
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#define ta0ic (*(volatile byte *)0x006c) |
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#define pd0 (*(volatile byte *)0x03e2) |
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#define pd1 (*(volatile byte *)0x03e3) |
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#define p0 (*(volatile byte *)0x03e0) |
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#define p1 (*(volatile byte *)0x03e1) |
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#define ivec_timer_a0 12 |
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#endif |
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/* Newlib's exit() pulls in lots of other things. Main() should never
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exit, but if it did, you could hard-reset the chip here. */ |
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void |
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exit(int rv) |
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{ |
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while (1) |
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asm volatile (""); |
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} |
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#ifdef __r8c_cpu__ |
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/* The "constructor" attribute causes the startup code to call this
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sometime before main() is called. */ |
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__attribute__((constructor)) |
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void |
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fast_clock(void) |
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{ |
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asm("fclr I"); |
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prcr = 1; |
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cm0 = 0x08; |
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cm1 = 0x38; |
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asm("nop"); |
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asm("nop"); |
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asm("nop"); |
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asm("nop"); |
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ocd = 0; |
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prcr = 0; |
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asm("fset I"); |
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} |
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#endif |
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/* We mark this volatile in case a non-interrupt function wants to
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read it, else gcc may optimize away extra reads. */ |
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static volatile int tc = 1; |
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/* The "interrupt" attribute changes the function entry/exit to
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properly preserve any changed registers. */ |
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static void __attribute__((interrupt)) |
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timer_ra_interrupt() |
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{ |
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tc ++; |
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#ifdef __r8c_cpu__ |
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p2 = tc >> 4; |
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#else |
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p1 = tc; |
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p0 = tc >> 8; |
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#endif |
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} |
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main() |
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{ |
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#ifdef __r8c_cpu__ |
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pd2 = 0xff; |
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/* TIMER RA */ |
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tracr = 0x00; |
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traioc = 0x00; |
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tramr = 0x00; /* timer mode, f1 */ |
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trapre = 255; /* prescaler */ |
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tra = 255; /* cycle count */ |
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_set_var_vect (timer_ra_interrupt, ivec_timer_ra); |
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traic = 5; |
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tracr = 1; |
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#endif |
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#ifdef __m32c_cpu__ |
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pd0 = 0xff; |
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pd1 = 0xff; |
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/* TIMER A0 */ |
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ta0mr = 0x00; /* Timer A0 mode register */ |
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ta0 = 65535; /* Timer A0 register */ |
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_set_var_vect (timer_ra_interrupt, ivec_timer_a0); |
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ta0ic = 5; |
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tabsr = 0xff; |
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#endif |
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/* main() must never return. */ |
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while (1) |
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; |
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} |
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@ -0,0 +1,43 @@ |
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/* |
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Copyright (c) 2008 Red Hat Incorporated. |
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All rights reserved. |
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|
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Redistribution and use in source and binary forms, with or without |
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modification, are permitted provided that the following conditions are met: |
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|
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Redistributions of source code must retain the above copyright |
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notice, this list of conditions and the following disclaimer. |
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|
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Redistributions in binary form must reproduce the above copyright |
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notice, this list of conditions and the following disclaimer in the |
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documentation and/or other materials provided with the distribution. |
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|
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The name of Red Hat Incorporated may not be used to endorse |
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or promote products derived from this software without specific |
|||
prior written permission. |
|||
|
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
|||
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
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DISCLAIMED. IN NO EVENT SHALL RED HAT INCORPORATED BE LIABLE FOR ANY |
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DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
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(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
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LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND |
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ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
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SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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*/ |
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/* This works with varvects.h |
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*/ |
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.section ".var_vects","aw",@progbits |
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.global __var_vects |
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.type __var_vects,@object |
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.size __var_vects, 256 |
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__var_vects: |
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.zero 256 |
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.text |
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@ -0,0 +1,54 @@ |
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/*
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Copyright (c) 2008 Red Hat Incorporated. |
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All rights reserved. |
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|
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Redistribution and use in source and binary forms, with or without |
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modification, are permitted provided that the following conditions are met: |
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|
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Redistributions of source code must retain the above copyright |
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notice, this list of conditions and the following disclaimer. |
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|
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Redistributions in binary form must reproduce the above copyright |
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notice, this list of conditions and the following disclaimer in the |
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documentation and/or other materials provided with the distribution. |
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|
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The name of Red Hat Incorporated may not be used to endorse |
|||
or promote products derived from this software without specific |
|||
prior written permission. |
|||
|
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
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DISCLAIMED. IN NO EVENT SHALL RED HAT INCORPORATED BE LIABLE FOR ANY |
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DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
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(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
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LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND |
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ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
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SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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*/ |
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/* This file defines the interface to the built-in variable vector
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table in R8C/M16C/M32C chips. */ |
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#ifndef _VARVECTS_H_ |
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#define _VARVECTS_H_ |
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typedef void (*_m32c_interrupt_func)() __attribute__((mode(SI))); |
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extern _m32c_interrupt_func _var_vects[]; |
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#if defined(__r8c_cpu__) || defined (__m16c_cpu__) |
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#define _set_var_vect(f,n) \ |
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{ asm ("mov.w #%%lo16(%d0),__var_vects+%d1" : : "s" (f), "g" (n*4)); \ |
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asm ("mov.w #%%hi16(%d0),__var_vects+%d1" : : "s" (f), "g" (n*4+2)); } |
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#else |
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#define _set_var_vect(f,n) \ |
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_var_vects[n] = f |
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#endif |
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#endif |
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