riscv/musl - musl - Gitea: Git with a cup of tea

Author	SHA1	Message	Date
Stefan Kristiansson	200d15479c	add or1k (OpenRISC 1000) architecture port With the exception of a fenv implementation, the port is fully featured. The port has been tested in or1ksim, the golden reference functional simulator for OpenRISC 1000. It passes all libc-test tests (except the math tests that requires a fenv implementation). The port assumes an or1k implementation that has support for atomic instructions (l.lwa/l.swa). Although it passes all the libc-test tests, the port is still in an experimental state, and has yet experienced very little 'real-world' use.	12 years ago
Szabolcs Nagy	056c8b1ab5	add missing EHWPOISON to bits/errno.h it was already defined for mips, but was missing from other archs	14 years ago
Rich Felker	d960d4f2cb	initial commit of the arm port this port assumes eabi calling conventions, eabi linux syscall convention, and presence of the kernel helpers at 0xffff0f?0 needed for threads support. otherwise it makes very few assumptions, and the code should work even on armv4 without thumb support, as well as on systems with thumb interworking. the bits headers declare this a little endian system, but as far as i can tell the code should work equally well on big endian. some small details are probably broken; so far, testing has been limited to qemu/aboriginal linux.	15 years ago
Rich Felker	cabf2ff349	fix missing ENOTSUP error code	15 years ago
Rich Felker	1355fdca7c	preparing build system to handle ports - step 1	15 years ago
Rich Felker	c316b28445	update various bits headers for new linux additions based on patch by nik	15 years ago
Rich Felker	0b44a0315b	initial check-in, version 0.5.0	15 years ago