3 Commits (9d35fec9e1f391d56faee20b868ef4114bcc4d8a)

Author SHA1 Message Date
Rich Felker f0eb2e77b2 use register constraint instead of memory operand for riscv64 atomics 7 years ago
Rich Felker 2dcbeabd91 fix riscv64 atomic asm constraints 7 years ago
Rich Felker 0a48860c27 add riscv64 architecture support 7 years ago