riscv/musl - musl - Gitea: Git with a cup of tea

Author	SHA1	Message	Date
Rich Felker	7be59733d7	add SPE FPU support to powerpc-sf When the soft-float ABI for PowerPC was added in commit `5a92dd95c7`, with Freescale cpus using the alternative SPE FPU as the main use case, it was noted that we could probably support hard float on them, but that it would involve determining some difficult ABI constraints. This commit is the completion of that work. The Power-Arch-32 ABI supplement defines the ABI profiles, and indeed ATR-SPE is built on ATR-SOFT-FLOAT. But setjmp/longjmp compatibility are problematic for the same reason they're problematic on ARM, where optional float-related parts of the register file are "call-saved if present". This requires testing __hwcap, which is now done. In keeping with the existing powerpc-sf subarch definition, which did not have fenv, the fenv macros are not defined for SPE and the SPEFSCR control register is left (and assumed to start in) the default mode.	5 years ago
Felix Fietkau	5a92dd95c7	add powerpc soft-float support Some PowerPC CPUs (e.g. Freescale MPC85xx) have a completely different instruction set for floating point operations (SPE). Executing regular PowerPC floating point instructions results in "Illegal instruction" errors. Make it possible to run these devices in soft-float mode.	10 years ago
Rich Felker	f54ac2446a	add missing const on powerpc FE_DFL_ENV	14 years ago
Rich Felker	75c450cff3	fenv support for ppc, untested based on code sent to the mailing list by nsz, with minor changes.	14 years ago
rofl0r	1c8eb8bad7	PPC port cleaned up, static linking works well now.	14 years ago
Richard Pennington	7669d1e334	import preliminary ppc work by rdp.	14 years ago
Rich Felker	d960d4f2cb	initial commit of the arm port this port assumes eabi calling conventions, eabi linux syscall convention, and presence of the kernel helpers at 0xffff0f?0 needed for threads support. otherwise it makes very few assumptions, and the code should work even on armv4 without thumb support, as well as on systems with thumb interworking. the bits headers declare this a little endian system, but as far as i can tell the code should work equally well on big endian. some small details are probably broken; so far, testing has been limited to qemu/aboriginal linux.	15 years ago