bits/syscall.h: add cachestat from linux v6.4

see

    linux commit cf264e1329fb0307e044f7675849f9f38b44c11a
    cachestat: implement cachestat syscall

    linux commit 946e697c69ffeeefdd84dad90eac307284df46be
    cachestat: wire up cachestat for other architectures

arch/aarch64/bits/syscall.h.in

@@ -302,4 +302,5 @@
 #define __NR_process_mrelease	448
 #define __NR_futex_waitv	449
 #define __NR_set_mempolicy_home_node	450
+#define __NR_cachestat		451
 

arch/arm/bits/syscall.h.in

@@ -402,6 +402,7 @@
 #define __NR_process_mrelease	448
 #define __NR_futex_waitv	449
 #define __NR_set_mempolicy_home_node	450
+#define __NR_cachestat		451
 
 #define __ARM_NR_breakpoint	0x0f0001
 #define __ARM_NR_cacheflush	0x0f0002

arch/i386/bits/syscall.h.in

@@ -440,4 +440,5 @@
 #define __NR_process_mrelease	448
 #define __NR_futex_waitv	449
 #define __NR_set_mempolicy_home_node	450
+#define __NR_cachestat		451
 

arch/m68k/bits/syscall.h.in

@@ -419,3 +419,4 @@
 #define __NR_process_mrelease	448
 #define __NR_futex_waitv	449
 #define __NR_set_mempolicy_home_node	450
+#define __NR_cachestat		451

arch/microblaze/bits/syscall.h.in

@@ -440,4 +440,5 @@
 #define __NR_process_mrelease	448
 #define __NR_futex_waitv	449
 #define __NR_set_mempolicy_home_node	450
+#define __NR_cachestat		451
 

arch/mips/bits/syscall.h.in

@@ -421,4 +421,5 @@
 #define __NR_process_mrelease	4448
 #define __NR_futex_waitv	4449
 #define __NR_set_mempolicy_home_node	4450
+#define __NR_cachestat		4451
 

arch/mips64/bits/syscall.h.in

@@ -351,4 +351,5 @@
 #define __NR_process_mrelease	5448
 #define __NR_futex_waitv	5449
 #define __NR_set_mempolicy_home_node	5450
+#define __NR_cachestat		5451
 

arch/mipsn32/bits/syscall.h.in

@@ -375,4 +375,5 @@
 #define __NR_process_mrelease	6448
 #define __NR_futex_waitv	6449
 #define __NR_set_mempolicy_home_node	6450
+#define __NR_cachestat		6451
 

arch/or1k/bits/syscall.h.in

@@ -324,4 +324,5 @@
 #define __NR_process_mrelease	448
 #define __NR_futex_waitv	449
 #define __NR_set_mempolicy_home_node	450
+#define __NR_cachestat		451
 

arch/powerpc/bits/syscall.h.in

@@ -428,4 +428,5 @@
 #define __NR_process_mrelease	448
 #define __NR_futex_waitv	449
 #define __NR_set_mempolicy_home_node	450
+#define __NR_cachestat		451
 

arch/powerpc64/bits/syscall.h.in

@@ -400,4 +400,5 @@
 #define __NR_process_mrelease	448
 #define __NR_futex_waitv	449
 #define __NR_set_mempolicy_home_node	450
+#define __NR_cachestat		451
 

arch/riscv64/bits/syscall.h.in

@@ -302,6 +302,7 @@
 #define __NR_process_mrelease	448
 #define __NR_futex_waitv	449
 #define __NR_set_mempolicy_home_node	450
+#define __NR_cachestat		451
 
 #define __NR_sysriscv __NR_arch_specific_syscall
 #define __NR_riscv_flush_icache (__NR_sysriscv + 15)

arch/s390x/bits/syscall.h.in

@@ -366,4 +366,5 @@
 #define __NR_process_mrelease	448
 #define __NR_futex_waitv	449
 #define __NR_set_mempolicy_home_node	450
+#define __NR_cachestat		451
 

arch/sh/bits/syscall.h.in

@@ -412,4 +412,5 @@
 #define __NR_process_mrelease	448
 #define __NR_futex_waitv	449
 #define __NR_set_mempolicy_home_node	450
+#define __NR_cachestat		451
 

arch/x32/bits/syscall.h.in

@@ -312,6 +312,7 @@
 #define __NR_process_mrelease	(0x40000000 + 448)
 #define __NR_futex_waitv	(0x40000000 + 449)
 #define __NR_set_mempolicy_home_node	(0x40000000 + 450)
+#define __NR_cachestat		(0x40000000 + 451)
 
 
 #define __NR_rt_sigaction (0x40000000 + 512)

arch/x86_64/bits/syscall.h.in

@@ -359,4 +359,5 @@
 #define __NR_process_mrelease	448
 #define __NR_futex_waitv	449
 #define __NR_set_mempolicy_home_node	450
+#define __NR_cachestat		451