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add explicit barrier operation to internal atomic.h API

master
Rich Felker 12 years ago
parent
commit
867b1822f3
  1. 4
      arch/arm/atomic.h
  2. 5
      arch/i386/atomic.h
  3. 4
      arch/microblaze/atomic.h
  4. 4
      arch/mips/atomic.h
  5. 4
      arch/or1k/atomic.h
  6. 4
      arch/powerpc/atomic.h
  7. 4
      arch/sh/atomic.h
  8. 5
      arch/x32/atomic.h
  9. 5
      arch/x86_64/atomic.h

4
arch/arm/atomic.h

@ -101,7 +101,9 @@ static inline void a_store(volatile int *p, int x)
while (__k_cas(*p, x, p));
}
static inline void a_spin()
#define a_spin a_barrier
static inline void a_barrier()
{
__k_cas(0, 0, &(int){0});
}

5
arch/i386/atomic.h

@ -96,6 +96,11 @@ static inline void a_spin()
__asm__ __volatile__( "pause" : : : "memory" );
}
static inline void a_barrier()
{
__asm__ __volatile__( "" : : : "memory" );
}
static inline void a_crash()
{
__asm__ __volatile__( "hlt" : : : "memory" );

4
arch/microblaze/atomic.h

@ -95,7 +95,9 @@ static inline void a_store(volatile int *p, int x)
: "=m"(*p) : "r"(x) : "memory" );
}
static inline void a_spin()
#define a_spin a_barrier
static inline void a_barrier()
{
a_cas(&(int){0}, 0, 0);
}

4
arch/mips/atomic.h

@ -135,7 +135,9 @@ static inline void a_store(volatile int *p, int x)
: "+m"(*p) : "r"(x) : "memory" );
}
static inline void a_spin()
#define a_spin a_barrier
static inline void a_barrier()
{
a_cas(&(int){0}, 0, 0);
}

4
arch/or1k/atomic.h

@ -72,7 +72,9 @@ static inline void a_store(volatile int *p, int x)
a_swap(p, x);
}
static inline void a_spin()
#define a_spin a_barrier
static inline void a_barrier()
{
a_cas(&(int){0}, 0, 0);
}

4
arch/powerpc/atomic.h

@ -78,7 +78,9 @@ static inline void a_store(volatile int *p, int x)
: "=m"(*p) : "r"(x) : "memory" );
}
static inline void a_spin()
#define a_spin a_barrier
static inline void a_barrier()
{
a_cas(&(int){0}, 0, 0);
}

4
arch/sh/atomic.h

@ -51,7 +51,9 @@ static inline void a_dec(volatile int *x)
a_fetch_add(x, -1);
}
static inline void a_spin()
#define a_spin a_barrier
static inline void a_barrier()
{
a_cas(&(int){0}, 0, 0);
}

5
arch/x32/atomic.h

@ -91,6 +91,11 @@ static inline void a_spin()
__asm__ __volatile__( "pause" : : : "memory" );
}
static inline void a_barrier()
{
__asm__ __volatile__( "" : : : "memory" );
}
static inline void a_crash()
{
__asm__ __volatile__( "hlt" : : : "memory" );

5
arch/x86_64/atomic.h

@ -91,6 +91,11 @@ static inline void a_spin()
__asm__ __volatile__( "pause" : : : "memory" );
}
static inline void a_barrier()
{
__asm__ __volatile__( "" : : : "memory" );
}
static inline void a_crash()
{
__asm__ __volatile__( "hlt" : : : "memory" );

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