fix condition for riscv{32,64} non-stup fenv

whether fenv is supported depends on the ABI, not whether the target cpu ISA level has floating point support.
2 months ago · 3df932bc33
4 changed files with 4 additions and 4 deletions
--- a/src/fenv/riscv32/fenv-sf.c
+++ b/src/fenv/riscv32/fenv-sf.c
@ -1,3 +1,3 @@
-#ifndef __riscv_flen
+#ifdef __riscv_float_abi_soft
 #include "../fenv.c"
 #endif
--- a/src/fenv/riscv32/fenv.S
+++ b/src/fenv/riscv32/fenv.S
@ -1,4 +1,4 @@
-#ifdef __riscv_flen
+#ifndef __riscv_float_abi_soft
 .global feclearexcept
 .type feclearexcept, %function
--- a/src/fenv/riscv64/fenv-sf.c
+++ b/src/fenv/riscv64/fenv-sf.c
@ -1,3 +1,3 @@
-#ifndef __riscv_flen
+#ifdef __riscv_float_abi_soft
 #include "../fenv.c"
 #endif
--- a/src/fenv/riscv64/fenv.S
+++ b/src/fenv/riscv64/fenv.S
@ -1,4 +1,4 @@
-#ifdef __riscv_flen
+#ifndef __riscv_float_abi_soft
 .global feclearexcept
 .type feclearexcept, %function