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44 lines
2.8 KiB
44 lines
2.8 KiB
[^:]*: Assembler messages:
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[^:]*:10: Error: bad type in SIMD instruction -- `vshl.i64 q0,q0,#0'
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[^:]*:11: Error: immediate out of range for shift -- `vshl.i8 q0,q1,#8'
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[^:]*:12: Error: immediate out of range for shift -- `vshl.i16 q0,q1,#16'
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[^:]*:13: Error: immediate out of range for shift -- `vshl.i32 q0,q1,#32'
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[^:]*:14: Error: bad type in SIMD instruction -- `vshl.s64 q0,r1'
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[^:]*:15: Error: bad type in SIMD instruction -- `vshl.i16 q0,r1'
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[^:]*:16: Warning: instruction is UNPREDICTABLE with SP operand
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[^:]*:17: Warning: instruction is UNPREDICTABLE with PC operand
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[^:]*:18: Error: bad type in SIMD instruction -- `vshl.s64 q0,q1,q2'
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[^:]*:19: Error: bad type in SIMD instruction -- `vshl.i32 q0,q1,q2'
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[^:]*:20: Warning: instruction is UNPREDICTABLE in an IT block
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[^:]*:20: Warning: instruction is UNPREDICTABLE in an IT block
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[^:]*:20: Warning: instruction is UNPREDICTABLE in an IT block
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[^:]*:20: Warning: instruction is UNPREDICTABLE in an IT block
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[^:]*:20: Warning: instruction is UNPREDICTABLE in an IT block
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[^:]*:20: Warning: instruction is UNPREDICTABLE in an IT block
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[^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block
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[^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block
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[^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block
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[^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block
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[^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block
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[^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block
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[^:]*:22: Warning: instruction is UNPREDICTABLE in an IT block
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[^:]*:22: Warning: instruction is UNPREDICTABLE in an IT block
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[^:]*:22: Warning: instruction is UNPREDICTABLE in an IT block
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[^:]*:22: Warning: instruction is UNPREDICTABLE in an IT block
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[^:]*:22: Warning: instruction is UNPREDICTABLE in an IT block
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[^:]*:22: Warning: instruction is UNPREDICTABLE in an IT block
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[^:]*:24: Error: syntax error -- `vshleq.i16 q0,q1,#0'
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[^:]*:25: Error: syntax error -- `vshleq.i16 q0,q1,#0'
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[^:]*:27: Error: syntax error -- `vshleq.i16 q0,q1,#0'
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[^:]*:28: Error: vector predicated instruction should be in VPT/VPST block -- `vshlt.i16 q0,q1,#0'
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[^:]*:30: Error: instruction missing MVE vector predication code -- `vshl.i16 q0,q1,#0'
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[^:]*:32: Error: syntax error -- `vshleq.s16 q0,r1'
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[^:]*:33: Error: syntax error -- `vshleq.s16 q0,r1'
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[^:]*:35: Error: syntax error -- `vshleq.s16 q0,r1'
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[^:]*:36: Error: vector predicated instruction should be in VPT/VPST block -- `vshlt.s16 q0,r1'
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[^:]*:38: Error: instruction missing MVE vector predication code -- `vshl.s16 q0,r1'
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[^:]*:40: Error: syntax error -- `vshleq.s16 q0,q1,q2'
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[^:]*:41: Error: syntax error -- `vshleq.s16 q0,q1,q2'
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[^:]*:43: Error: syntax error -- `vshleq.s16 q0,q1,q2'
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[^:]*:44: Error: vector predicated instruction should be in VPT/VPST block -- `vshlt.s16 q0,q1,q2'
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[^:]*:46: Error: instruction missing MVE vector predication code -- `vshl.s16 q0,q1,q2'
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