Nick Clifton
86e0da7a81
Use GPR_CLEAR instead of GPR_SET
27 years ago
Andrew Cagney
eb2d80b469
Change profiling so that it is enabled by default. Re-generate everything.
27 years ago
Stan Shebs
d4f3574e77
import gdb-1999-09-08 snapshot
27 years ago
Stan Shebs
cd0fc7c3eb
import gdb-1999-05-10
28 years ago
Stan Shebs
c906108c21
Initial creation of sourceware repository
28 years ago
Stan Shebs
071ea11e85
Initial creation of sourceware repository
28 years ago
Andrew Cagney
33ccdb1b97
* gen-engine.c (print_run_body): Prefix instruction_address.
28 years ago
Andrew Cagney
8d3580d090
Fix incorrect calculation of conditional field when being extracted
from a previous decode.
28 years ago
Andrew Cagney
f6b7bfcfa0
Add note about limitations of insn_field_cmp().
28 years ago
Andrew Cagney
07c2bd1455
Problems with conditional instruction-table fields (N!M, N=M, ...).
Was restricting `M' to opcode fields in the current word.
28 years ago
Tom Tromey
5da9ce07eb
* configure: Regenerated to track ../common/aclocal.m4 changes.
* config.in: Ditto.
* acconfig.h: New file.
* configure.in: Reverted change of Apr 24; use sinclude again.
29 years ago
Tom Tromey
b1df34b9ed
* configure: Regenerated to track ../common/aclocal.m4 changes.
* config.in: Ditto.
* configure.in: Don't call sinclude.
29 years ago
Andrew Cagney
e9164db545
* ld-insn.c (load_insn_table): Terminate error with NL.
* gen.c (insns_bit_useless): Perform unsigned bit comparisons.
* filter.c (is_filtered_out, filter_parse): Pacify GCC, len is unsigned.
* gen-icache.c (print_icache_extraction): Do not type cast pointers.
29 years ago
Michael Meissner
d865fb6e56
Regenerate configure
29 years ago
Andrew Cagney
98f5dae13b
* gen-icache.c (print_icache_extraction): When generating #define
force the expression to the correct type.
29 years ago
Andrew Cagney
13eaae2fd0
Broke parsing of !<val>!<val> when adding support for =<field>. Fix.
Add support for the -S<suffix> option.
29 years ago
Andrew Cagney
346a3d6c11
Add support for instruction word conditionals of the form `XXX!YYY'
and XXX=YYY'. See mn10300 for examples.
29 years ago
Andrew Cagney
278bda4050
Cleanup INLINE support for simulators using common framework.
Make IGEN responsible for co-ordinating inlining of generated files.
By default, aclocal.m4 disabled all inlining.
29 years ago
Andrew Cagney
72a08ce565
Don't bother generating trace prefix string when not tracing.
29 years ago
Andrew Cagney
d797f46f3c
* gen-engine.c (print_run_body): Re-extract the CIA after
processing any events. Events may not restart the simulator.
29 years ago
Stu Grossman
753ad2d3c5
* Makefile.in: Get SHELL from configure.
* configure: Regenerate with autoconf 2.12.1 to fix shell issues for
NT native builds.
29 years ago
Andrew Cagney
2c3c3f790d
Generate ENGINE_ISSUE hooks as part of SMP simulator.
29 years ago
Andrew Cagney
3c1e924307
* ld-insn.c (parse_function_record): When -Wnodiscard, suppress
discarded function warning.
* igen.c (main): Clarify -Wnodiscard.
* ld-insn.c (parse_function_record): For functions, allow use of
instruction style function model records
29 years ago
Andrew Cagney
c4db5b04f8
mips - for r5900 generate igen simulator.
igen - stop crash when simulator isn't multi-sim'ed
29 years ago
Andrew Cagney
9ec6741b17
igen: Fix SMP simulator generator support.
Use the bfd-processor name in the sim-engine switch.
Add nr_cpus argument to sim_engine_run.
tic80, v850, d30v, mips, common:
Update
mips: Fill in bfd-processor field of model records so that
they match ../bfd/archures.
29 years ago
Andrew Cagney
2d44e12a27
Use macro GPR_SET(N,VAL) to clear zero registers.
29 years ago
Brendan Kehoe
3b5bd034f5
* gen-idecode.c (print_jump_until_stop_body): Use `#if 0' instead of
`#ifdef 0' around this.
29 years ago
Michael Meissner
5aa52e3d26
do not assume NULL is an integer constant
29 years ago
Andrew Cagney
01b9cd49ca
common/sim-bits.h: Document ROTn macro.
igen/{igen.c,ld-insns.h}: Document mnemonic string formats.
mips/Makefile.in: Add dependencies for files included by mips.igen
mips/vr5400.igen: checkpoint vr5400 instructions.
29 years ago
Andrew Cagney
89d0973831
Add support for 16 byte quantities to sim-endian macro H2T.
Add model-filter field to option, include, model anf function igen records
29 years ago
Andrew Cagney
e2880fadf3
Add include-file support to igen.
29 years ago
Andrew Cagney
eaa202ddd4
* gen-semantics.c (print_semantic_body): Use CIA not cia.ip. Escape
newlines at end of generated call to sim_engine_abort.
29 years ago
Andrew Cagney
d5cecca93c
Output line-ref to original igen source file when generating trace
statements.
Define NIA macro (dependant on gen-delayed-branch).
Verify opening/closing quote in input assembler strings.
29 years ago
Andrew Cagney
8782bfcfc4
Add -Wnodiscard option so that warning about discarded instructions
can be suppressed.
Allow ``<insn-spec> { <nmemonic> | <model> }'' in instruction file.
29 years ago
Felix Lee
8f80453197
* configure.in: i386-windows is a cross, so don't expect
libiberty to be there.
* configure: updated.
29 years ago
Andrew Cagney
4410c4b925
Correctly locate `_' in generated names.
29 years ago
Andrew Cagney
6a4c8f1e29
Change semantic function name to semantic_<INSN>_<FMT> instead of
semantic_<FMT>_<INSN>.
29 years ago
Andrew Cagney
3484de0091
Differentiate between a non-zero string and a constant zero field.
29 years ago
Andrew Cagney
0604253676
* igen.c (gen_run_c): Handle non-multi-sim case.
29 years ago
Andrew Cagney
a2ab5e65eb
Update to reflect change to sim/common/aclocal.m4 (allow sim/common
directory to specify its own unqiue config.h file).
29 years ago
Andrew Cagney
cf5c6e6e5d
Generate instruction profile call with each instruction.
29 years ago
Andrew Cagney
8f050205eb
(gen_itable_h): Output an enum defining the max size of the itable
string members.
29 years ago
Andrew Cagney
687f3f1cef
Add multi-sim support to simulator.
29 years ago
Andrew Cagney
9f3f352539
Passify cross compilation and GCC -Wall
29 years ago
Andrew Cagney
0bdfae1167
Clean up formatting of instruction traces.
30 years ago
Andrew Cagney
efe4f1cbf8
Add a simple dissasembler to igen
30 years ago
Andrew Cagney
2f2e6c5d5b
Extend xor-endian and per-cpu support in core module.
Allow negated test when watching value within core.
30 years ago
Andrew Cagney
cd0d873d0f
Preliminary suport for xor-endian suport in core module.
30 years ago
Andrew Cagney
b526378484
Incorrect test for zero-r0 code gen.
30 years ago
Andrew Cagney
37a684b84d
o Make tic80 insn file more `cache ready'
o Have igen always zero r0 instead of constantly checking if
the designated register is r0.
30 years ago