e53a5a69d7
2003-07-03 Michael Snyder <msnyder@redhat.com>
* gencode.c (movs): Fix a couple of text transpositions.
23 years ago
f0861129d5
2003-06-24 Michael Snyder <msnyder@redhat.com>
* sim-main.h (SIM_WIFSTOPPED, SIM_WSTOPSIG): Define.
* compile.c (sim_resume): Use the above to return stop signal.
23 years ago
0b2828595e
2003-06-27 Michael Snyder <msnyder@redhat.com>
* gencode.c (op movsxy_tab): Fix up some copy/paste errors
in name: s/REG_x/REG_y/.
23 years ago
8dc30ef74a
2003-06-27 Michael Snyder <msnyder@redhat.com>
* gencode.c (op tab): Move misplaced semicolon.
23 years ago
ac59bf8dbf
2003-06-23 Michael Snyder <msnyder@redhat.com>
* nrun.c (main): Delete h8/300 ifdef (sim now handles signals).
24 years ago
72f536bd78
2003-06-23 Michael Snyder <msnyder@redhat.com>
* sim-reg.c: Fix cut-and-paste bug in comment.
24 years ago
345d88d96e
2003-06-22 Andrew Cagney <cagney@redhat.com>
Written by matthew green <mrg@redhat.com>, with fixes from Aldy
Hernandez <aldyh@redhat.com>, Jim Wilson <wilson@redhat.com>, and
Nick Clifton <nickc@redhat.com>.
* ppc-instructions: Include altivec.igen and e500.igen.
(model_busy, model_data): Add vr_busy and vscr_busy.
(model_trace_release): Trace vr_busy and vscr_busy.
(model_new_cycle): Update vr_busy and vscr_busy.
(model_make_busy): Update vr_busy and vscr_busy.
* registers.c (register_description): Add Altivec and e500
registers.
* psim.c (psim_read_register, psim_read_register): Handle Altivec
and e500 registers.
* ppc-spr-table (SPEFSCR): Add VRSAVE and SPEFSCR registers.
* configure.in (sim_filter): When *altivec* add "av". When *spe*
or *simd* add e500.
(sim_float): When *altivec* define WITH_ALTIVEC. When *spe* add
WITH_E500.
* configure: Re-generate.
* e500.igen, altivec.igen: New files.
* e500_expression.h, altivec_expression.h: New files.
* idecode_expression.h: Update copyright. Include
"e500_expression.h" and "altivec_expression.h".
* e500_registers.h, altivec_registers.h: New files.
* registers.h: Update copyright. Include "e500_registers.h" and
"altivec_registers.h".
(registers): Add Altivec and e500 specific registers.
* Makefile.in (IDECODE_H): Add "idecode_e500.h" and
"idecode_altivec.h".
(REGISTERS_H): Add "e500_registers.h" and "altivec_registers.h".
(tmp-igen): Add dependencies on altivec.igen and e500.igen .
24 years ago
ea0869653a
2003-06-22 Andrew Cagney <cagney@redhat.com>
* interp.c (xfer_mem): Simplify. Only do a single partial
transfer. Problem reported by Tom Rix.
24 years ago
1f1b28179f
2003-06-22 Andrew Cagney <cagney@redhat.com>
From matthew green <mrg@redhat.com>:
* sim-fpu.h: Update copyright.
(sim_fpu_fraction, sim_fpu_guard): New prototypes.
* sim-fpu.c: Update copyright.
(sim_fpu_fraction, sim_fpu_guard): New inline functions.
24 years ago
4056a1ef29
Oops! Committed to much, reverting :-(
24 years ago
89c0d7ddd7
Fix changelog
24 years ago
911b23336b
2003-06-22 Andrew Cagney <cagney@redhat.com>
Problems reported by Joshua LeVasseur.
* emul_chirp.c: Update copyright.
(chirp_emul_nextprop): Return the first property.
* hw_htab.c: Update copyright.
(htab_decode_hash_table): Fix check for htab size.
24 years ago
945d18fb9c
2003-06-21 Andrew Cagney <cagney@redhat.com>
* interrupts.c: Update copyright.
(external_interrupt): Fix test for already pending interrupt.
Problem found by Joshua LeVasseur.
24 years ago
21f86aab13
2003-06-21 Andrew Cagney <cagney@redhat.com>
* ppc-instructions: Add missing +8 line. Found by blofeldus at
yahoo.com.
24 years ago
0f2f1341dd
2003-06-21 Andrew Cagney <cagney@redhat.com>
From Ian Lance Taylor <ian@airs.com>:
* hw_nvram.c (hw_nvram_init_address): Correct call to memset--swap
second and third arguments.
24 years ago
61ca1de73a
2003-06-21 Andrew Cagney <cagney@redhat.com>
* hw_com.c (hw_com_device_init_data): Check that the output, and
not input file opened. Pointed out by masahino tky3.3web.ne.jp.
24 years ago
6ec8fa7a80
2003-06-17 Doug Evans <dje@sebabeach.org>
* cgen-trace.h (sim_disasm_read_memory): Update args to be compatible
with disassemble_info:read_memory_func.
* cgen-trace.c (sim_disasm_read_memory): Ditto.
24 years ago
601cecf016
2003-06-20 Andrew Cagney <cagney@redhat.com>
* sim_calls.c (sim_create_inferior): Assert that
psim_write_register succeeded.
(sim_fetch_register, sim_store_register): Make "regname" constant.
Delete Altivec hack. Return result from psim_read_register /
psim_write_register.
* psim.h (psim_read_register, psim_write_register): Change return
type to int. Update comments.
* psim.c: Update copyright.
(psim_stack): Assert that the psim_read_register worked.
(psim_read_register, psim_read_register): Return the register's
size. Allocate the cooked buffer dynamically.
* hw_register.c: Update copyright.
(do_register_init): Check that psim_write_register succeeded.
* hw_init.c: Update copyright.
(create_ppc_elf_stack_frame, create_ppc_aix_stack_frame): Assert
that the register transfer worked.
24 years ago
d81bb16ac0
2003-06-19 Andrew Cagney <cagney@redhat.com>
* ld-insn.h: Update copyright.
(cache_fields): Define.
(insn_table_fields): Add insn_field_6 and insn_field_7.
(load_insn_table): Pass in the "cache_rules".
* ld-insn.c: Update copyright.
(load_insn_table): Add parameter "cache_rules". Handle "cache",
"computed" and "scratch" fields.
(main): Pass "cache_rules" to load_insn_table.
* ld-cache.h: Update copyright.
(append_cache_table): Declare.
* ld-cache.c: Update copyright.
(append_cache_table): New function.
(load_cache_table): Call.
* gen-model.c: Include "ld-cache.h".
* gen-itable.c: Include "ld-cache.h".
* igen.c: Move #include "ld-cache.h" to earlier. Update
copyright.
(main): Permit a NULL "cache_rules". Pass address of
"cache_rules" to load_insn_table.
* Makefile.in (tmp-ld-insn): Add "ld-cache.o".
(tmp-igen): Do not include ppc-cache-rules.
(gen-itable.o, gen-model.o): Add "ld-cache.h".
* ppc-cache-rules: Delete file.
* ppc-instructions: Add cache rules.
24 years ago
8d64d0fdca
2003-06-19 Andrew Cagney <cagney@redhat.com>
* Makefile.in (ICACHE_CFLAGS, SEMANTICS_CFLAGS): Delete.
(SIM_FPU_FLAGS): Define.
(icache.o): Delete explicit compile command.
(semantics.o, idecode.o): Delete explicit compile command.
(NOWARN_CFLAGS, STD_CFLAGS): Append SIM_FPU_CFLAGS.
* gen-support.c (gen_support_c): Generate #include of
"sim-inline.h" and "sim-fpu.h", but conditional on
HAVE_COMMON_FPU.
* gen-idecode.c (gen_idecode_c): Ditto.
* igen.c (gen_icache_c, gen_semantics_c): Wrap #include of
"sim-inline.h" and "sim-fpu.h" in HAVE_COMMON_FPU conditional.
Move to before "support.h".
* Makefile.in, gen-support.c, gen-idecode.c, igen.c: Update
copyright.
24 years ago
3df3a316d3
2003-05-30 Alexandre Oliva <aoliva@redhat.com>
* allinsn.exp: Fix typos introduced on 2003-05-27.
2003-05-29 Michael Snyder <msnyder@redhat.com>
* tas.s: Use er4 for h8h and h8s, er3 for h8sx.
2003-05-28 Michael Snyder <msnyder@redhat.com>
* subs.s: New file.
* subx.s: New file.
* allinsn.exp: Add new subs and subx tests.
* testutils.inc: Simplify (and fix) set_carry_flag.
(clear_carry_flag, set_zero_flag, clear_zero_flag...): New macros.
* addx.s: Use simplified set_carry_flag.
2003-05-27 Michael Snyder <msnyder@redhat.com>
* tas.s: New file.
* band.s: New file.
* biand.s: New file.
* allinsn.exp: Add tas, band, biand tests.
* brabc.s: Add abs8 test.
* bset.s: Add bset/ne, bclr/ne tests.
2003-05-23 Michael Snyder <msnyder@redhat.com>
* and.b.s: Add andc exr.
* or.b.s: Add orc.exr.
* xor.b.s: Add xor exr.
* jmp.s: Fix 8-bit indirect test. Add 7-bit vector test.
2003-05-22 Michael Snyder <msnyder@redhat.com>
* stack.s: Add rte/l and rts/l tests.
* allinsn.exp: Add stack tests.
2003-05-21 Michael Snyder <msnyder@redhat.com>
* stack.s: New file: test stack operations.
* stack.s: Add bsr, jsr tests.
* stack.s: Add trapa, rte tests.
* div.s: Corrections for size of dividend.
2003-05-20 Michael Snyder <msnyder@redhat.com>
* mul.s: Corrections for unsigned multiply.
* div.s: New file, test div instructions.
* allinsn.exp: Add div test.
2003-05-19 Michael Snyder <msnyder@redhat.com>
* mul.s: New file, test mul instructions.
* allinsn.exp: Add mul test.
24 years ago
9f70f8ec04
2003-06-18 Michael Snyder <msnyder@redhat.com>
* compile.c: Replace "Hitachi" with "Renesas".
(decode): Distinguish AV_H8S from AV_H8H.
(sim_resume): H8SX can use any register for TAS.
(decode): Add support for VECIND.
(sim_resume): Implement rte/l and rts/l.
(GETSR): New macro (actually old macro reincarnated).
(decode): Add handling for IMM2.
(sim_resume): Drop extra block around jmp, jsr, rts.
Add handling for trapa and rte.
For divxu.b, change 0xffff mask to 0xff.
(set_h8300h): Add bfd_mach_h8300sxn machine.
24 years ago
18ad32b593
2003-06-18 Corinna Vinschen <vinschen@redhat.com>
* sim-main.h (enum h8_regnum): Turn around order of MACH, MACL
and SBR, VBR (for benefit of gdb).
24 years ago
173b1c982a
2003-06-05 Michael Snyder <msnyder@redhat.com>
* compile.c (sim_fetch_register): Handle SBR, VBR, MACH, MACL.
(sim_store_register): Ditto.
24 years ago
9a1d84fb16
2003-06-17 Richard Sandiford <rsandifo@redhat.com>
* mips.igen (do_dmultx): Fix check for negative operands.
24 years ago
27ebfdf49b
2003-06-04 Michael Snyder <msnyder@redhat.com>
* compile.c (sim_info): Fix typo in output.
* h8300/compile.c (set_h8300h): Replace 'flag' arguments
with a bfd_machine argument, and decode it inline.
Check for bfd_mach_h8300hn and bfd_mach_h8300sn.
24 years ago
828c9ae668
2003-06-04 Michael Snyder <msnyder@redhat.com>
* common/run.c (main): Remove SIM_H8300 ifdef.
(usage): Ditto.
* common/sim-options.c (STANDARD_OPTIONS): Add SIM_H8300SX.
(standard_options): Add '-x' for h8/300sx.
(standard_option_handler): Add case for SIM_H8300SX.
24 years ago
e8c1a4e716
2003-06-04 Michael Snyder <msnyder@redhat.com>
* compile.c (sim_info): Fix typo in output.
24 years ago
dc5c3759e0
2003-06-03 Michael Snyder <msnyder@redhat.com>
* h8300/compile.c: Add h8300sx insns and addressing modes.
* h8300/sim-main.h: Replaces h8300/inst.h.
* h8300/Makefile.in: Tweak to bring in some sim/common stuff.
24 years ago
ae451ac6d4
Use $(SHELL) whenever we invoke move-if-change.
24 years ago
a27a0651eb
2003-04-13 Michael Snyder <msnyder@redhat.com>
* sim/h8300: New directory. Tests for Renesas h8/300 family.
24 years ago
cd44367114
New ChangeLog
24 years ago
32ebdc4ce3
2003-05-14 Michael Snyder <msnyder@redhat.com>
* addb.s, addw.s, addl.s, addw.s, addx.s, andb.s, andw.s, andl.s,
bfld.s, brabc.s, bra.s, bset.s, cmpb.s, cmpw.s, cmpl.s, daa.s,
das.s, dec.s, extw.s, extl.s, inc.s, jmp.s, ldc.s, ldm.s, mac.s,
mova.s, movb.s, movw.s, movl.s, movmd.s, movsd.s, neg.s, nop.s,
not.s, orb.s, orw.s, orl.s, rotl.s, rotr.s, rotxl.s, rotxr.s,
shal.s, shar.s, shll.s, shlr.s, stc.s, subb.s, subw.s, subl.s,
xorb.s, xorw.s, xorl.s: New files.
* allinsn.exp: New file.
24 years ago
105e800205
Remove for renaming with 8.3 dos-compatible names.
24 years ago
ab12e95ba6
Remove, rename using dos-compatible 8.3 names.
24 years ago
f6684c3170
Index: gdb/ChangeLog
2003-05-07 Andrew Cagney <cagney@redhat.com>
* d10v-tdep.c (remote_d10v_translate_xfer_address): Add
"regcache".
(d10v_print_registers_info): Update.
(d10v_dmap_register, d10v_imap_register): Delete functions.
(struct gdbarch_tdep): Add "regcache" parameter to "dmap_register"
and "imap_register".
(d10v_ts2_dmap_register, d10v_ts2_imap_register): Add "regcache".
(d10v_ts3_dmap_register, d10v_ts3_imap_register): Add "regcache".
* arch-utils.c (generic_remote_translate_xfer_address): Add
"regcache" and "gdbarch" parameters.
* gdbarch.sh (REMOTE_TRANSLATE_XFER_ADDRESS): Add "regcache"
parameter. Change class to multi-arch.
* gdbarch.h, gdbarch.c: Re-generate.
* remote.c (remote_xfer_memory): Use
gdbarch_remote_translate_xfer_address.
Index: include/gdb/ChangeLog
2003-05-07 Andrew Cagney <cagney@redhat.com>
* sim-d10v.h (sim_d10v_translate_addr): Add regcache parameter.
(sim_d10v_translate_imap_addr): Add regcache parameter.
(sim_d10v_translate_dmap_addr): Ditto.
Index: sim/d10v/ChangeLog
2003-05-07 Andrew Cagney <cagney@redhat.com>
* interp.c (sim_d10v_translate_addr): Add "regcache" parameter.
(sim_d10v_translate_imap_addr): Ditto.
(sim_d10v_translate_dmap_addr): Ditto.
(xfer_mem): Pass NULL regcache to sim_d10v_translate_addr.
(dmem_addr): Pass NULL regcache to sim_d10v_translate_dmap_addr.
(dmap_register, imap_register): Add "regcache" parameter.
(imem_addr): Pass NULL regcache to sim_d10v_translate_imap_addr.
(sim_fetch_register): Pass NULL regcache to imap_register and
dmap_register.
24 years ago
dd69d29260
[igen/ChangeLog]
2003-05-03 Chris Demetriou <cgd@broadcom.com>
* compare_igen_models: Tweak attribution slightly.
[mips/ChangeLog]
2003-05-03 Chris Demetriou <cgd@broadcom.com>
* cp1.c: Tweak attribution slightly.
* cp1.h: Likewise.
* mdmx.c: Likewise.
* mdmx.igen: Likewise.
* mips3d.igen: Likewise.
* sb1.igen: Likewise.
24 years ago
601da3163f
Fix changelog.
24 years ago
bcd0068ecf
2003-04-15 Richard Sandiford <rsandifo@redhat.com>
* vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
unsigned operands.
24 years ago
80d35d9032
2003-04-13 Michael Snyder <msnyder@redhat.com>
* Make-common.in (sim-events.o, sim-config.o): Depend on sim-main.h.
24 years ago
b7f97e9cb4
2003-04-13 Michael Snyder <msnyder@redhat.com>
* compile.c (sim_resume): Implement 'daa' and 'das' instructions.
24 years ago
5fe8b0dfe1
2003-04-13 Michael Snyder <msnyder@redhat.com>
* configure.in: Add testsuite to extra_subdirs.
* configure: Regenerate.
2003-04-13 Michael Snyder <msnyder@redhat.com>
* sim/h8300: New directory. Tests for Hitachi h8/300 family.
24 years ago
c88931b0ed
Only call XScale_check_memacc if in XScale mode.
24 years ago
1eec9e335d
oops - omitted from previous delta
24 years ago
ebc115b7bb
* simops.c (OP_40): Delete. Move code to...
* v850-igen.c (): ...Here. Sign extend the first operand.
* simops.h (OP_40): Remove prototype.
24 years ago
49634642a5
Add tests for ARM simulator.
24 years ago
3a3d6f654d
Remove use of __IWMMXT__.
24 years ago
0f026fd00c
Add iWMMXt support to ARM simulator
24 years ago
dd97b6fd7d
fix date on latest ChangeLog entry.
24 years ago
f603c8fe44
Add Cirrus Maverick support to arm simulator
24 years ago
Michael Snyder
Andrew Cagney
Frank Ch. Eigler
Chris Demetriou
Ian Lance Taylor
Nick Clifton