binutils-gdb

Tree: f757c5cae9

Author	SHA1	Message	Date
Alan Modra	4934fdafea	* ia64-raw.tbl: Replace non-ASCII char. * ia64-waw.tbl: Likewise. * ia64-asmtab.c: Regenerate.	13 years ago
H.J. Lu	b3e14edafc	Add Intel Itanium Series 9500 support bfd/ 2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com> * cpu-ia64-opc.c (ins_cnt6a): New function. (ext_cnt6a): Ditto. (ins_strd5b): Ditto. (ext_strd5b): Ditto. (elf64_ia64_operands): Add new operand types. gas/ 2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com> * config/tc-ia64.c (reg_symbol): Add a new register. (indirect_reg): Ditto. (pseudo_func): Add new symbolic constants. (operand_match): Add new operand types recognition. (operand_insn): Add new register recognition. (md_begin): Add new register definition. (specify_resource): Add new register recognition. gas/testsuite/ 2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com> * gas/testsuite/gas/ia64/psn.d: New file. * gas/testsuite/gas/ia64/psn.s: New file. * gas/testsuite/gas/ia64/ia64.exp: Add new testcase. * gas/testsuite/gas/ia64/opc-i.d: Fixed failing tests. * gas/testsuite/gas/ia64/opc-m.d: Ditto. include/opcode/ 2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com> * ia64.h (ia64_opnd): Add new operand types. opcodes/ 2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com> * ia64-asmtab.h (completer_index): Extend bitfield to full uint. * ia64-gen.c: Promote completer index type to longlong. (irf_operand): Add new register recognition. (in_iclass_mov_x): Add an entry for the new mov_* instruction type. (lookup_specifier): Add new resource recognition. (insert_bit_table_ent): Relax abort condition according to the changed completer index type. (print_dis_table): Fix printf format for completer index. * ia64-ic.tbl: Add a new instruction class. * ia64-opc-i.c (ia64_opcodes_i): Define new I-instructions. * ia64-opc-m.c (ia64_opcodes_m): Define new M-instructions. * ia64-opc.h: Define short names for new operand types. * ia64-raw.tbl: Add new RAW resource for DAHR register. * ia64-waw.tbl: Add new WAW resource for DAHR register. * ia64-asmtab.c: Regenerate.	14 years ago
H.J. Lu	1ca35711f4	gas/ 2008-08-28 H.J. Lu <hongjiu.lu@intel.com> * config/tc-ia64.c (CR_IIB0): New. (CR_IIB1): Likewise. (cr): Add cr.iib0 and cr.iib1. (specify_resource): Handle IA64_RS_CR_IIB and CR_IIB0/CR_IIB1. gas/testsuite/ 2008-08-28 H.J. Lu <hongjiu.lu@intel.com> * gas/ia64/dv-raw-err.s: Add tests for cr.iib0 and cr.iib1. * gas/ia64/dv-waw-err.s: Likewise. * gas/ia64/regs.s: Likewise. * gas/ia64/dv-raw-err.l: Updated. * gas/ia64/dv-waw-err.l: Likewise. * gas/ia64/regs.d: Likewise. include/opcode/ 2008-08-28 H.J. Lu <hongjiu.lu@intel.com> * ia64.h (ia64_resource_specifier): Add IA64_RS_CR_IIB. Update IA64_RS_CR. opcodes/ 2008-08-28 H.J. Lu <hongjiu.lu@intel.com> * ia64-dis.c (print_insn_ia64): Handle cr.iib0 and cr.iib1. * ia64-gen.c (lookup_specifier): Likewise. * ia64-ic.tbl: Add support for cr.iib0 and cr.iib1. * ia64-raw.tbl: Likewise. * ia64-waw.tbl: Likewise. * ia64-asmtab.c: Regenerated.	18 years ago
H.J. Lu	4f8631b1d4	gas/ 2007-11-14 Tristan Gingold <gingold@adacore.com> * config/tc-ia64.c (AR_RUC): Defined. (ar): Add "ar.ruc". (specify_resource): Handle AR_RUC like AR_ITC. gas/testsuite/ 2007-11-14 H.J. Lu <hongjiu.lu@intel.com> * gas/ia64/dv-raw-err.s: Add tests for ar.ruc. * gas/ia64/dv-waw-err.s: Likewise. * gas/ia64/invalid-ar.s: Likewise. * gas/ia64/regs.s: Add tests for ar.ruc and ar44. * gas/ia64/dv-raw-err.l: Updated. * gas/ia64/dv-waw-err.l: Likewise. * gas/ia64/invalid-ar.l: Likewise. * gas/ia64/regs.d: Likewise. opcodes/ 2007-11-14 H.J. Lu <hongjiu.lu@intel.com> * ia64-ic.tbl: Updated for Itanium 9100 series. * ia64-raw.tbl: Likewise. * ia64-waw.tbl: Likewise. * ia64-asmtab.c: Regenerated. 2007-11-14 Tristan Gingold <gingold@adacore.com> * ia64-dis.c (print_insn_ia64): Handle ar.ruc. * ia64-gen.c (lookup_regindex): Likewise.	19 years ago
H.J. Lu	7f3dfb9cf7	gas/ 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * config/tc-ia64.c (specify_resource): Add the rule 17 from SDM 2.2. gas/testsuite/ 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * gas/ia64/dv-raw-err.s: Add check for vmsw.0. * gas/ia64/dv-raw-err.l: Updated. * gas/ia64/opc-b.s: Add vmsw.0 and vmsw.1. * gas/ia64/opc-b.d: Updated. opcodes/ 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * ia64-gen.c (lookup_regindex): Handle ".vm". (print_dependency_table): Handle '\"'. * ia64-ic.tbl: Updated from SDM 2.2. * ia64-raw.tbl: Likewise. * ia64-waw.tbl: Likewise. * ia64-asmtab.c: Regenerated. * ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.	21 years ago
Jim Wilson	c10d9d8fc3	Patch to update IA-64 port to SDM 2.1. bfd/ChangeLog * cpu-ia64-opc.c: Add operand constant "ar.csd". gas/ChangeLog * config/tc-ia64.c (pseudo_func): Add "@pause" constant for "hint" instruction. (emit_one_bundle): Handle "hint" instruction. (operand_match): Match IA64_OPND_AR_CSD. gas/testsuite/ChangeLog * gas/ia64/opc-b.d: Update for instructions added by SDM2.1. * gas/ia64/opc-b.s: Ditto. * gas/ia64/opc-f.d: Ditto. * gas/ia64/opc-f.s: Ditto. * gas/ia64/opc-i.d: Ditto. * gas/ia64/opc-i.s: Ditto. * gas/ia64/opc-m.d: Ditto. * gas/ia64/opc-m.s: Ditto. * gas/ia64/opc-x.d: Ditto. * gas/ia64/opc-x.s: Ditto. include/opcode/ChangeLog * ia64.h: Fix copyright message. (IA64_OPND_AR_CSD): New operand kind. opcodes/ChangeLog * ia64-opc-d.c (ia64_opcodes_d): Add "hint" instruction. * ia64-opc-b.c: Add "hint.b" instruction. * ia64-opc-f.c: Add "hint.f" instruction. * ia64-opc-i.c: Add "hint.i" instruction. * ia64-opc-m.c: Add "hint.m", "fc.i", "ld16", "st16", and "cmp8xchg16" instructions. * ia64-opc-x.c: Add "hint.x" instruction. * ia64-opc.h (AR_CSD): New macro. * ia64-ic.tbl: Update according to SDM2.1. * ia64-raw.tbl: Ditto. * ia64-waw.tbl: Ditto. * ia64-gen.c (in_iclass): Handle "hint" like "nop". (lookup_regindex): Recognize AR[FCR], AR[EFLAG], AR[CSD], AR[SSD], AR[CFLG], AR[FSR], AR[FIR], and AR[FDR]. * ia64-asmtab.c: Regenerate.	24 years ago
Jim Wilson	139368c9f3	Fix ia64 gas testsuite. Update ia64 DV tables. Fix ia64 gas testsuite again. gas/ChangeLog * config/tc-ia64.c (dv_sem): Add "stop". (specify_resource, case IA64_RS_PR): Only handles regs 1 to 15 now. (specify_resource, case IA64_RS_PRr): New for regs 16 to 62. (specify_resource, case IA64_RS_PR63): Reorder (note == 7) test to match above. (mark_resources): Check IA64_RS_PRr. gas/testsuite/ChangeLog * gas/ia64/dv-raw-err.s: Add new testcases for PR%, 16 - 62. * gas/ia64/dv-waw-err.s: Likewise. * gas/ia64/dv-imply.d: Regenerate. * gas/ia64/dv-mutex.d, gas/ia64/dv-raw-err.l, gas/ia64/dv-safe.d, gas/ia64/dv-srlz.d, gas/ia64/dv-war-err.l, gas/ia64/dv-waw-err.l, gas/ia64/opc-f.d, gas/ia64/opc-i.d, gas/ia64/opc-m.d: Likewise. include/opcode/ChangeLog * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP. opcodes/ChangeLog * ia64-dis.c (print_insn_ia64): Revert Aug 7 byte skip count change. * ia64-gen.c (parse_semantics): Handle IA64_DVS_STOP. (lookup_specifier): Handle "PR%, 1 to 15" and "PR%, 16 to 62". * ia64-ic.tbl, ia64-raw.tbl, ia64-war.tbl, ia64-waw.tbl: Update. * ia64-asmtab.c: Regnerate.	26 years ago
Jim Wilson	800eeca487	IA-64 ELF support.	27 years ago

8 Commits (f757c5cae97b1437f4fcf2e25c53376775ea541f)