c8fd013cc2
* z8k-dis.c: Convert to ISO C90.
* z8kgen.c: Convert to ISO C90.
(opt): Move long opcode for "ldb rdb,imm8" after short one, now
the short one is created when assembling.
* z8k-opc.h: Regenerate with new z8kgen.c.
23 years ago
122d081a38
* h8300-dis.c (print_colon_thingie): Remove.
23 years ago
1abe91b1db
* config/tc-mips.c (macro): Handle new macros: "lca" and "dlca"
for loading addresses using CALL relocations.
Don't emit CALL relocations when a base register is used.
* gas/mips/lca-svr4pic.d: New test for the "lca" macro.
* gas/mips/lca-xgot.d: Likewise.
* gas/mips/lca.s: Source for the new tests.
* gas/mips/mips.exp: Run the new tests.
* opcode/mips.h: Define new enum members, M_LCA_AB and M_DLCA_AB.
* mips-opc.c (mips_builtin_opcodes): Handle new macros: "lca" and
"dlca".
23 years ago
22a398e190
Add new field to disassemble_info structure: symbol_is_valid() and use it to
skip displaying arm elf mapping symbols in disassembly output.
23 years ago
f4fa50da5d
2003-11-05 H.J. Lu <hongjiu.lu@intel.com>
* m68k-opc.c (m68k_opcodes): Reorder "fmovel".
23 years ago
8e6446ff53
* arm-dis.c (print_arm_insn): Print "-" after "#".
23 years ago
f46a9fbb7a
Add second argument to rcpp instruction.
23 years ago
fde8b63277
* m68hc11-dis.c: Convert to ISO C90 prototypes.
23 years ago
3e60263266
Add ColfFire v4 support
23 years ago
d43ff6d27f
2003-06-03 Michael Snyder <msnyder@redhat.com>
and Bernd Schmidt <bernds@redhat.com>
and Alexandre Oliva <aoliva@redhat.com>
* disassemble.c (disassembler): Add support for h8300sx.
23 years ago
f7c541f680
2003-10-10 Dave Brolley <brolley@redhat.com>
* frv-asm.c,frv-desc.c,frv-opc.c: Regenerated.
23 years ago
d576f161dd
2003-10-08 Dave Brolley <brolley@redhat.com>
* frv-desc.[ch], frv-opc.[ch]: Regenerated.
23 years ago
118fecd307
* xtensa-dis.c (fetch_data): Remove numBytes parameter.
(print_insn_xtensa): Fix call to fetch_data.
23 years ago
5f74bc130d
[ bfd/ChangeLog ]
2003-09-30 Chris Demetriou <cgd@broadcom.com>
* archures.c (bfd_mach_mipsisa64r2): New define.
* bfd-in2.h: Regenerate.
* aoutx.h (NAME(aout,machine_type)): Handle bfd_mach_mipsisa64r2.
* cpu-mips.c (I_mipsisa64r2): New enum value.
(arch_info_struct): Add entry for I_mipsisa64r2.
* elfxx-mips.c (_bfd_elf_mips_mach)
(_bfd_mips_elf_print_private_bfd_data): Handle E_MIPS_ARCH_64R2.
(mips_set_isa_flags): Add bfd_mach_mipsisa64r2 case.
(mips_mach_extensions): Add entry for bfd_mach_mipsisa64r2.
[ binutils/ChangeLog ]
2003-09-30 Chris Demetriou <cgd@broadcom.com>
* readelf.c (get_machine_flags): Handle E_MIPS_ARCH_64R2.
[ gas/Changelog ]
2003-09-30 Chris Demetriou <cgd@broadcom.com>
* configure.in (mipsisa64r2, mipsisa64r2el, mipsisa64r2*): New CPUs.
* configure: Regenerate.
* config/tc-mips.c (imm2_expr): New variable.
(md_assemble, mips16_ip): Initialize imm2_expr.
(ISA_HAS_64BIT_REGS, ISA_HAS_DROR, ISA_HAS_ROR): Add ISA_MIPS64R2.
(macro_build): Handle +A, +B, +C, +E, +F, +G, and +H format operands.
(macro): Handle M_DEXT and M_DINS.
(validate_mips_insn): Handle +E, +F, +G, +H, and +I format operands.
(mips_ip): Likewise.
(OPTION_MIPS64R2): New define.
(md_longopts): New entry for -mips64r2 (OPTION_MIPS64R2).
OPTION_ASE_BASE): Increase to compensate for OPTION_MIPS64R2.
(md_parse_option): Handle OPTION_MIPS64R2.
(s_mipsset): Handle setting "mips64r2" ISA.
(mips_cpu_info_table): Add mips64r2.
(md_show_usage): Document -mips64r2 option.
* doc/as.texinfo: Docuemnt -mips64r2 option.
* doc/c-mips.texi: Likewise.
[ gas/testsuite/ChangeLog ]
2003-09-30 Chris Demetriou <cgd@broadcom.com>
* gas/mips/cp0-names-mips64r2.d: New file.
* gas/mips/cp0sel-names-mips64r2.d: New file.
* gas/mips/elf_arch_mips64r2.d: New file.
* gas/mips/hwr-names-mips64r2.d: New file.
* gas/mips/mips32r2-ill-fp64.l: New file.
* gas/mips/mips32r2-ill-fp64.s: New file.
* gas/mips/mips64r2-ill.l: New file.
* gas/mips/mips64r2-ill.s: New file.
* gas/mips/mips64r2.d: New file.
* gas/mips/mips64r2.s: New file.
* gas/mips/mips.exp: Define "mips64r2" arch, and run new tests.
[ include/elf/ChangeLog ]
2003-09-30 Chris Demetriou <cgd@broadcom.com>
* mips.h (E_MIPS_ARCH_64R2): New define.
[ include/opcode/ChangeLog ]
2003-09-30 Chris Demetriou <cgd@broadcom.com>
* mips.h: Document +E, +F, +G, +H, and +I operand types.
Update documentation of I, +B and +C operand types.
(INSN_ISA64R2, ISA_MIPS64R2, CPU_MIPS64R2): New defines.
(M_DEXT, M_DINS): New enum values.
[ ld/ChangeLog ]
2003-09-30 Chris Demetriou <cgd@broadcom.com>
* ldmain.c (get_emulation): Ignore "-mips64r2".
[ ld/testsuite/ChangeLog ]
2003-09-30 Chris Demetriou <cgd@broadcom.com>
* ld-mips-elf/mips-elf-flags.exp: Add tests for combinations
with MIPS64r2.
[ opcodes/ChangeLog ]
2003-09-30 Chris Demetriou <cgd@broadcom.com>
* mips-dis.c (mips_arch_choices): Add entry for "mips64r2"
(print_insn_args): Add handing for +E, +F, +G, and +H.
* mips-opc.c (I65): New define for MIPS64r2.
(mips_builtin_opcodes): Add "dext", "dextm", "dextu", "dins",
"dinsm", "dinsu", "drotl", "drotr", "drotr32", "drotrv", "dsbh",
and "dshd" for MIPS64r2. Adjust "dror", "dror32", and "drorv" to
be supported on MIPS64r2.
23 years ago
e74d091b9a
2003-09-24 Dave Brolley <brolley@redhat.com>
* frv-desc.c, frv-opc.c, frv-opc.h: Regenerated.
23 years ago
26ca545091
* i386-dis.c: Convert to ISO C90 prototypes.
23 years ago
f7df6a7927
2003-09-09 Dave Brolley <brolley@redhat.com>
* frv-desc.c: Regenerated.
23 years ago
9c2de72926
2003-09-08 Dave Brolley <brolley@redhat.com>
On behalf of Doug Evans <dje@sebabeach.org>
* Makefile.am (run-cgen): Pass new args archfile and opcfile
to cgen.sh.
(stamp-ip2k,stamp-m32r,stamp-fr30,stamp-frv,stamp-openrisc,
stamp-iq2000,stamp-xstormy16): Pass paths of .cpu and .opc files
to cgen.sh.
(stamp-frv): Delete hardcoded path spec workaround.
* Makefile.in: Regenerate.
* cgen.sh: New args archfile and opcfile. Pass on to cgen.
23 years ago
8ad30312ff
Add binutils support for v850e1 processor
23 years ago
661bd698e4
* ppc-dis.c (struct dis_private): New.
(powerpc_dialect): Make static. Accept -Many in addition to existing
options. Save dialect in dis_private.
(print_insn_big_powerpc): Retrieve dialect from dis_private.
(print_insn_little_powerpc): Likewise.
(print_insn_powerpc): Call powpc_dialect here. Remove unnecessary
efs/altivec check. Try harder to disassemble if given -Many.
* ppc-opc.c (insert_fxm): Expand comment.
(PPC, PPCCOM, PPC32, PPC64, PPCVEC): Remove PPC_OPCODE_ANY.
(POWER, POWER2, PPCPWR2, POWER32, COM, COM32, M601, PWRCOM): Likewise.
(POWER4): Remove PPCCOM.
(PPCONLY): Don't define. Update all occurrences to PPC.
23 years ago
92c2346c02
Index: opcodes/ChangeLog
2003-09-03 Andrew Cagney <cagney@redhat.com>
* dis-init.c (init_disassemble_info): New file and function.
* Makefile.am (CFILES): Add "dis-init.c".
(libopcodes_la_SOURCES): Add "dis-init.c".
(dis-init.lo): Specify dependencies.
* Makefile.in: Regenerate.
Index: include/ChangeLog
2003-08-27 Andrew Cagney <cagney@redhat.com>
* dis-asm.h (init_disassemble_info): Declare.
(INIT_DISASSEMBLE_INFO): Redefine as a call to
init_disassemble_info.
(INIT_DISASSEMBLE_INFO_NO_ARCH): Ditto.
Index: binutils/ChangeLog
2003-09-03 Andrew Cagney <cagney@redhat.com>
* objdump.c: Refer to init_disassemble_info in comments.
(disassemble_data): Replace INIT_DISASSEMBLE_INFO with
init_disassemble_info.
23 years ago
ecd51ad39f
2003-09-03 Dave Brolley <brolley@redhat.com>
* frv-*: Regenerated.
23 years ago
823bbe9d95
* ppc-opc.c (powerpc_opcodes): Combine identical PPC403/BOOKE entries.
Move duplicate mnemonic entries together. Use RS instead of RT on
all mt*.
* ppc-dis.c: Convert to ISO C.
23 years ago
5272d2012d
2003-08-29 Dave Brolley <brolley@redhat.com>
* Makefile.am (stamp-frv): Copy frv.cpu and frv.opc from
$(srcdir)/../cpu temporarily when regenerating source files.
* Makefile.in: Regenerated.
23 years ago
f02232aaa3
Add support for unindexed form of Addressing Mode 5
23 years ago
7d5b217e2c
* ppc-opc.c (PPC440): Define.
(powerpc_opcodes): Allow mac*, mul*, nmac*, dccci, dcread, iccci,
icread instructions when PPC440. Add dlmzb instruction.
23 years ago
f860738999
* dep-in.sed: Remove libintl.h.
* Makefile.am (POTFILES.in): Unset LC_COLLATE.
Run "make dep-am".
* Makefile.in: Regenerate.
23 years ago
90e3a20cfe
fix typo in ChangeLog
23 years ago
ffead7aece
regenerate cgen files after prototype fix
23 years ago
44d221f0b8
Fix typos in last change
23 years ago
209e303302
fix changelog date
23 years ago
10e05405ac
Convert cgen to C-90
23 years ago
9e7d479d74
Updated French translations
23 years ago
3d3d3d639b
Add new Dutch translation.
23 years ago
7f8a68cd19
2003-07-30 Jason Eckhardt <jle@rice.edu>
* i860-dis.c: Convert to ISO C90. Remove superflous prototypes.
23 years ago
52f20b276f
Updated Romanian translation
23 years ago
0deb7ac528
* ppc-opc.c (insert_mbe, extract_mbe): Shift 1L instead of 1 up.
23 years ago
834d807bb8
Updated French translations
23 years ago
31e0f3cd45
* objdump.c (main) :Accept multiple -M switch.
* doc/binutils.texi: Document that multiple -M switches are accepted and that
a single -M switch can contain comma separated options.
* arm-dis.c (parse_arm_disassembler_option): Do not expect option string to be
NUL terminated.
(parse_disassembler_options): Allow options to be space or comma separated.
23 years ago
6c37ac4d15
Update translations
23 years ago
5a7ea74950
include/opcode/
* mips.h (CPU_RM7000): New macro.
(OPCODE_IS_MEMBER): Match CPU_RM7000 against 4650 insns.
bfd/
* archures.c (bfd_mach_mips7000): New.
* bfd-in2.h: Regenerated.
* cpu-mips.c (arch_info_struct): Add an entry for mips:7000.
* elfxx-mips.c (mips_set_isa_flags): Handle bfd_mach_mips7000.
(mips_mach_extensions): Add an entry for it.
opcodes/
* mips-dis.c (mips_arch_choices): Add rm7000 and rm9000 entries.
gas/
* config/tc-mips.c (hilo_interlocks): True for CPU_RM7000.
(mips_cpu_info_table): Add rm7000 and rm9000 entries.
gas/testsuite/
* gas/mips/rm7000.[sd]: New test.
* gas/mips/mips.exp: Run it.
23 years ago
76bff7057c
Update Turkish translation files for bfd, gas and opcodes
23 years ago
fce0080055
Update pot files.
23 years ago
40fa02078b
2000-05-25 Alexandre Oliva <aoliva@cygnus.com>
* m10300-dis.c (disassemble): Negate negative accumulator's shift.
2000-05-24 Alexandre Oliva <aoliva@cygnus.com>
* m10300-dis.c (disassemble, case FSREG, FDREG): Don't assume
32-bit longs when sign-extending operands.
2000-04-20 Alexandre Oliva <aoliva@cygnus.com>
* m10300-opc.c: Remove MN10300_OPERAND_RELAX from all FSREGs.
* m10300-dis.c (HAVE_AM33_2): Define.
(disassemble): Use it.
(HAVE_AM33): Redefine.
(print_insn_mn10300): Fix mask for 5-byte extended insns.
2000-04-01 Alexandre Oliva <aoliva@cygnus.com>
* m10300-opc.c: Renamed AM332 to AM33_2.
2000-03-31 Alexandre Oliva <aoliva@cygnus.com>
* m10300-opc.c: Defined AM33 2.0 register operands. Added support
for AM33 2.0 `imm8,(abs16)' addressing mode for btst, bset and
bclr. Implemented `fbCC', `flCC', `dcpf' and all FP insns.
* m10300-dis.c (print_insn_mn10300): Recognize 5byte extended
insn code of AM33 2.0.
(disassemble): Recognize FMT_D3. Print out FP register names.
23 years ago
fec0654638
2003-07-09 Chris Demetriou <cgd@broadcom.com>
* mips-dis.c (set_default_mips_dis_options): Get BFD from
the disassembler_info's section, rather than from the
disassembler_info's symbols pointer.
23 years ago
8427c42425
* ppc-opc.c: Remove NULL pointer checks. Formatting. Remove
extraneous ATTRIBUTE_UNUSED.
* ppc-dis.c (print_insn_powerpc): Always pass a valid address to
operand->extract.
23 years ago
2fbfdc41e7
* ppc-opc.c: Convert to C90, removing unnecessary prototypes and
casts. Formatting.
23 years ago
c168870a29
* ppc-opc.c: Remove PARAMS from prototypes.
(FXM4): Define.
(insert_fxm): New function, used by both FXM and FXM4.
(extract_fxm): Likewise.
(XFXFXM_MASK): Remove 1 << 20 term.
(powerpc_opcodes): Add Power4 version of "mfcr". Simplify "mtcr" mask.
23 years ago
bac0268913
* s390-dis.c (s390_extract_operand): Add support for long displacements.
* s390-mkopc.c (s390_opcode_cpu_val): Add support for cpu type z990.
* s390-opc.c (D20_20): Add define for 20 bit displacements.
(INSTR_RRF_R0RR, INSTR_RSL_R0RD, INSTR_RSY_RRRD, INSTR_RSY_RURD,
INSTR_RSY_AARD, INSTR_RXY_RRRD, INSTR_RXY_FRRD, INSTR_SIY_URD): Add
new instruction formats.
(MASK_RRF_R0RR, MASK_RSL_R0RD, MASK_RSY_RRRD, MASK_RSY_RURD,
MASK_RSY_AARD, MASK_RXY_RRRD, MASK_RXY_FRRD, MASK_SIY_URD): Likewise.
(s390_opformats): Likewise.
* s390-opc.txt: Add new instructions for cpu type z990. Add missing
hfp instructions. Add missing instructions pgin, pgout and xsch.
23 years ago
ca164297eb
gas/
2003-06-23 H.J. Lu <hongjiu.lu@intel.com>
* gas/config/tc-i386.c (md_assemble): Support Intel Precott New
Instructions.
* gas/config/tc-i386.h (CpuPNI): New.
(CpuUnknownFlags): Add CpuPNI.
gas/testsuite/
2003-06-23 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Add prescott.
* gas/i386/prescott.d: New file.
* gas/i386/prescott.s: Likewise.
include/opcode/
2003-06-23 H.J. Lu <hongjiu.lu@intel.com>
* i386.h (i386_optab): Support Intel Precott New Instructions.
opcodes/
2003-06-23 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (PNI_Fixup): New. Fix up "mwait" and "monitor" in
Intel Precott New Instructions.
(PREGRP27): New. Added for "addsubpd" and "addsubps".
(PREGRP28): New. Added for "haddpd" and "haddps".
(PREGRP29): New. Added for "hsubpd" and "hsubps".
(PREGRP30): New. Added for "movsldup" and "movddup".
(PREGRP31): New. Added for "movshdup" and "movhpd".
(PREGRP32): New. Added for "lddqu".
(dis386_twobyte): Use PREGRP30 to replace the "movlpX" entry.
Use PREGRP31 to replace the "movhpX" entry. Use PREGRP28 for
entry 0x7c. Use PREGRP29 for entry 0x7d. Use PREGRP27 for
entry 0xd0. Use PREGRP32 for entry 0xf0.
(twobyte_has_modrm): Updated.
(twobyte_uses_SSE_prefix): Likewise.
(grps): Use PNI_Fixup in the "sidtQ" entry.
(prefix_user_table): Add PREGRP27, PREGRP28, PREGRP29, PREGRP30,
PREGRP31 and PREGRP32.
(float_mem): Use "fisttp{l||l|}" in entry 1 in opcode 0xdb.
Use "fisttpll" in entry 1 in opcode 0xdd.
Use "fisttp" in entry 1 in opcode 0xdf.
23 years ago
Christian Groessler
Kazu Hirata
Maciej W. Rozycki
Nick Clifton
H.J. Lu
Daniel Jacobowitz
Stephane Carrez
Michael Snyder
Dave Brolley
Bob Wilson
Chris Demetriou
Andreas Jaeger
Alan Modra
Andrew Cagney
Michael Meissner
Jason Eckhardt
Jakub Jelinek
Richard Sandiford
Alexandre Oliva
Martin Schwidefsky