3e89004774
Index: opcodes/ChangeLog
2001-06-13 Geoffrey Keating <geoffk@redhat.com>
* cgen-asm.c (cgen_parse_keyword): When looking for the
boundaries of a keyword, allow any special characters
that are actually in one of the allowed keyword.
* cgen-opc.c (cgen_keyword_add): Add any special characters
to the nonalpha_chars field.
Index: cgen/ChangeLog
2001-06-13 Geoffrey Keating <geoffk@redhat.com>
* desc.scm (<keyword> 'gen-defn): Add extra zero into
CGEN_KEYWORD_ENTRY initializers.
Index: include/opcode/ChangeLog
2001-06-13 Geoffrey Keating <geoffk@redhat.com>
* cgen.h (cgen_keyword): Add nonalpha_chars field.
26 years ago
5a109b6767
Fix some entries.
26 years ago
d1cf510e5e
Add MIPS r12k support
26 years ago
e281c45770
2001-05-23 John Healy <jhealy@redhat.com>
* cgen.h: Increased CGEN_MAX_SYNTAX_ELEMENTS to 48.
26 years ago
aa5f19f2b9
Fix MIPS disassembler so that it produces reassemblable code.
26 years ago
67d6227df7
Correct cvtps2dq, movdq2q, movq2dq, and movq problems.
26 years ago
992aaec9a9
Assorted fixes to pinsrw, pextrw, pmovmskb, movmskp, maskmovq.
26 years ago
4ef7f0bf1c
* cris.h (enum cris_insn_version_usage): Correct comment for
cris_ver_v3p.
26 years ago
0f17484fd3
Small tweaks to sse2 instructions.
26 years ago
7ccb52381a
* cris.h (ADD_PC_INCR_OPCODE): New macro.
26 years ago
361bfa20e5
2001-03-21 Kazu Hirata <kazu@hxi.com>
* h8300.h: Fix formatting.
26 years ago
87890af05c
paddq and psubq support.
26 years ago
2e98d2de04
Fix register name printed in warning message.
26 years ago
4f1d9bd8e2
Fix typos in ChangeLogs; add coff/external.h; fix copyright dates
26 years ago
80a523c2e1
new defines for Coldfire V4.
26 years ago
e135f41bc2
Add PDP-11 support
26 years ago
76f227a511
* i386.h (i386_optab): SSE integer converison instructions have
64bit versions on x86-64.
* i386-dis.c (prefix_user_t): Add 'Y' to SSE ineger converison
instructions.
(putop): Handle 'Y'
26 years ago
8eaec934e2
Remove extraneous whitespace
26 years ago
a85d7ed0f0
Add s390 support
26 years ago
0715dc88cf
Binutils portion of fix for syntax array elements when max
operands is greater than 127.
2001-02-02 Patrick Macdonald <patrickm@redhat.com>
* cgen.h (CGEN_SYNTAX_CHAR_TYPE): Typedef as unsigned short.
(CGEN_MAX_SYNTAX_ELEMENTS): Rename from CGEN_MAX_SYNTAX_BYTES.
(CGEN_SYNTAX): Define using CGEN_MAX_SYNTAX_ELEMENTS.
* fr30-desc.h: Regenerate with CGEN_MAX_SYNTAX_ELEMENTS.
* m32r-desc.h: Regenerate.
26 years ago
296bc5686a
Fix swapgs instruction.
26 years ago
1328dc9844
Adds assembly and dis-assembly support for the HPPA wide
mode, 16 bit forms of ldi, ldo, ldw and stw instructions.
26 years ago
e2914f484e
* i386.c (md_assemble): Check cpu_flags even for nullary instructions.
26 years ago
0d2bcfafbf
Updated ARC assembler from arccores.com
26 years ago
7c2b079e27
* i386.h (pinsrw): Add.
26 years ago
079966a8ad
Fix "movnti"
26 years ago
8c1f9e76d2
2001-01-09 Jeff Johnston <jjohnstn@redhat.com>
26 years ago
7bc70a8e57
* tc-i386.c (md_assemble): Handle third byte of the opcode as prefix.
* i386.h (i386_optab): Make [sml]fence template to use immext field.
26 years ago
6f8c0c4ccc
* tc-i386.h (CpuK6, CpuAthlon, CpuSledgehammer, CpuMMX, Cpu3dnow,
26 years ago
c0d8940f87
* configure.in: Add support for x86_64 and x86_64-*-linux-gnu*
* NEWS: Add x86_64.
* i386.h (i386_optab): Add "rex*" instructions;
add swapgs; disable jmp/call far direct instructions for
64bit mode; add syscall and sysret; disable registers for 0xc6
template. Add 'q' suffixes to extendable instructions, disable
obsoletted instructions, add new sign/zero extension ones.
(i386_regtab): Add extended registers.
(*Suf): Add No_qSuf.
(q_Suf, wlq_Suf, bwlq_Suf): New.
26 years ago
3e73aa7c95
* tc-i386.h (i386_target_format): Define even for ELFs.
26 years ago
bf40d919f9
Fix Formatting.
26 years ago
f16b83dfe5
* tc-i386.c (md_assemble): Refuse 's' and 'l' suffixes in the intel
mode; convert 'd' suffix to 's' or 'l'; remove all DWORD_MNEM_SUFFIX
references.
(intel_e09_1): Convert QWORD to 'l' suffix for FP operations; refuse
otherwise.
* tc-i386.h (DWORD_MNEM_SUFFIX): Kill.
(No_dSuf): Kill.
* i386.h (*_Suf): Remove No_dSuf.
(d_suf, wld_Suf,sld_Suf, sldx_Suf, bwld_Suf, d_FP, sld_FP, sldx_FP)
Remove.
(i386_optab): Remove 'd' in the suffixes.
26 years ago
c6c98b3833
Add MIPS SB1 machine
26 years ago
84ea6cf2c5
Add MIPS V and MIPS 64 machine numbers
26 years ago
e7af610e14
Add MIPS32 as a seperate MIPS architecture
26 years ago
4372b67322
Improve MIPS32 support
26 years ago
19f7b01094
gas/
* config/tc-sparc.c (sparc_ip): Fix a bug which caused v9_arg_p
instructions to loose any special insn->architecture mask.
* config/tc-sparc.c (v9a_asr_table): Add v9b ASRs.
(sparc_md_end, sparc_arch_types, sparc_arch,
sparc_elf_final_processing): Handle v8plusb and v9b architectures.
(sparc_ip): Handle siam mode operands. Support v9b ASRs (and
request v9b architecture if they are used).
bfd/
* elf32-sparc.c (elf32_sparc_merge_private_bfd_data,
elf32_sparc_object_p, elf32_sparc_final_write_processing):
Support v8plusb.
* elf64-sparc.c (sparc64_elf_merge_private_bfd_data,
sparc64_elf_object_p): Support v9b.
* archures.c: Declare v8plusb and v9b machines.
* bfd-in2.h: Ditto.
* cpu-sparc.c: Ditto.
include/opcode/
* sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
Note that '3' is used for siam operand.
opcodes/
* sparc-dis.c (v9a_asr_reg_names): Add v9b ASRs.
(compute_arch_mask): Add v8plusb and v9b machines.
(print_insn_sparc): siam mode decoding, accept ASRs up to 25.
* opcodes/sparc-opc.c: Support for Cheetah instruction set.
(prefetch_table): Add #invalidate.
26 years ago
139368c9f3
Fix ia64 gas testsuite. Update ia64 DV tables. Fix ia64 gas testsuite again.
gas/ChangeLog
* config/tc-ia64.c (dv_sem): Add "stop".
(specify_resource, case IA64_RS_PR): Only handles regs 1 to 15 now.
(specify_resource, case IA64_RS_PRr): New for regs 16 to 62.
(specify_resource, case IA64_RS_PR63): Reorder (note == 7) test to
match above.
(mark_resources): Check IA64_RS_PRr.
gas/testsuite/ChangeLog
* gas/ia64/dv-raw-err.s: Add new testcases for PR%, 16 - 62.
* gas/ia64/dv-waw-err.s: Likewise.
* gas/ia64/dv-imply.d: Regenerate.
* gas/ia64/dv-mutex.d, gas/ia64/dv-raw-err.l, gas/ia64/dv-safe.d,
gas/ia64/dv-srlz.d, gas/ia64/dv-war-err.l, gas/ia64/dv-waw-err.l,
gas/ia64/opc-f.d, gas/ia64/opc-i.d, gas/ia64/opc-m.d: Likewise.
include/opcode/ChangeLog
* ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
opcodes/ChangeLog
* ia64-dis.c (print_insn_ia64): Revert Aug 7 byte skip count change.
* ia64-gen.c (parse_semantics): Handle IA64_DVS_STOP.
(lookup_specifier): Handle "PR%, 1 to 15" and "PR%, 16 to 62".
* ia64-ic.tbl, ia64-raw.tbl, ia64-war.tbl, ia64-waw.tbl: Update.
* ia64-asmtab.c: Regnerate.
26 years ago
156c2f8bf7
Add support for the MIPS32
26 years ago
3c5ce02eb8
doco addition.
26 years ago
50b81f1903
Fix 3 DV bugs, and a few minor cleanups.
gas/
* config/tc-ia64.c (specify_resource, case IA64_RS_GR): Handle
postincrement modified registers. Handle IA64_OPND_R3_2 addl
source registers.
(note_register_values): Handle IA64_OPND_R3_2 operands.
gas/testsuite/
* gas/ia64/dv-raw-err.s: Add new tests for addl and postinc.
* gas/ia64/dv-raw-err.l: Likewise.
* gas/ia64/dv-waw-err.l: Update sed pattern.
* gas/ia64/opc-f.pl: Delete fpsub, and fpadd comment.
* gas/ia64/opc-f.s, gas/ia64/opc-f.d: Regenerate.
include/opcode/
* ia64.h (IA64_OPCODE_POSTINC): New.
opcodes/
* ia64-ic.tbl (pr-readers-nobr-nomovpr): Add addl, adds. Delete
break, mov-immediate, nop.
* ia64-opc-f.c: Delete fpsub instructions.
* ia64-opc-m.c: Add POSTINC to all instructions with postincrement
address operand. Rewrite using macros to avoid long lines.
* ia64-opc.h (POSTINC): Define.
* ia64-asmtab.c: Regenerate.
26 years ago
fc29466dba
2000-08-15 H.J. Lu <hjl@gnu.org>
* i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
IgnoreSize change.
26 years ago
305d537e30
gas:
26 years ago
45ee1401ab
* avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
Move related opcodes closer to each other.
Minor changes in comments, list undefined opcodes.
26 years ago
9d75133528
2000-07-22 Jason Eckhardt <jle@cygnus.com>
26 years ago
9d551405de
2000-07-26 Dave Brolley <brolley@redhat.com>
* cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
26 years ago
c848861769
cris.h: New file.
26 years ago
65aa24b6e8
Applied Marek Michalkiewicz <marekm@linux.org.pl>'s patch to ehance the AVR port.
27 years ago
60bcf0fa8c
Applied Stephane Carrez <Stephane.Carrez@worldnet.fr> patches to add support
for m68hc11 and m68hc12 processors.
27 years ago
Geoffrey Keating
Alan Modra
Nick Clifton
John Healy
Hans-Peter Nilsson
Kazu Hirata
Jan Hubicka
Patrick Macdonald
Jeff Johnston
Jakub Jelinek
Jim Wilson
H.J. Lu
Jason Eckhardt
Denis Chertykov
Dave Brolley