binutils-gdb

Commit Graph

Author	SHA1	Message	Date
Jim Blandy	0a40490e6a	cgen/ChangeLog: 2005-02-07 Jim Blandy <jimb@redhat.com> * cgen-opc.scm: Don't load fixup.scm here. (See corresponding changes in the opcodes directory.) opcodes/ChangeLog: 2005-02-07 Jim Blandy <jimb@redhat.com> * Makefile.am (CGEN): Load guile.scm before calling the main application script. * Makefile.in: Regenerated. * cgen.sh: Be prepared for the 'cgen' argument to contain spaces. Simply pass the cgen-opc.scm path to ${cgen} as its first argument; ${cgen} itself now contains the '-s', or whatever is appropriate for the Scheme being used.	22 years ago
Andrew Cagney	c46f8c5116	2005-01-31 Andrew Cagney <cagney@gnu.org> * gettext.m4: Only set ENABLE_NLS when gettext is present.	22 years ago
Jan Beulich	60b9a61772	gas/ 2005-01-31 Jan Beulich <jbeulich@novell.com> * config/tc-ia64.c (parse_operands): Also handle alloc without first input being ar.pfs. gas/testsuite/ 2005-01-31 Jan Beulich <jbeulich@novell.com> * gas/ia64/pseudo.[ds]: New. * gas/ia64/ia64.exp: Run new test. opcodes/ 2005-01-31 Jan Beulich <jbeulich@novell.com> * ia64-gen.c (NELEMS): Define. (shrink): Generate alias with missing second predicate register when opcode has two outputs and these are both predicates. * ia64-opc-i.c (FULL17): Define. (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17 here to generate output template. (TBITCM, TNATCM): Undefine after use. * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as first input. Add ld16 aliases without ar.csd as second output. Add st16 aliases without ar.csd as second input. Add cmpxchg aliases without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/ ar.ccv as third/fourth inputs. Consolidate through... (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8, CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define. * ia64-asmtab.c: Regenerate.	22 years ago
Andrew Cagney	a53bf50624	2005-01-27 Andrew Cagney <cagney@gnu.org> * gettext.m4: Don't use NONE as a default for CATOBJEXT.	22 years ago
Alexandre Oliva	90219bd0f3	bfd/ChangeLog: 2004-12-10 Alexandre Oliva <aoliva@redhat.com> * elf32-frv.c (elf32_frv_relocate_section): Force local binding for TLSMOFF. * reloc.c: Add R_FRV_TLSMOFF. * elf32-frv.c (elf32_frv_howto_table): Likewise. (frv_reloc_map, frv_reloc_type_lookup): Map it. (elf32_frv_relocate_section): Handle it. (elf32_frv_check_relocs): Likewise. * libbfd.h, bfd-in2.h: Rebuilt. 2004-11-26 Alexandre Oliva <aoliva@redhat.com> * elf32-frv.c (_frvfdpic_emit_got_relocs_plt_entries): Don't crash when given an undefweak TLS symbol. Fix constant TLS PLT entries such that they return the constant in gr9. (_frvfdpic_relax_tls_entries): Don't crash for undefweak TLS symbols. (_frvfdpic_size_got_plt): Set _cooked_size of dynamic sections. too, such that they shrink on relaxation. (elf32_frvfdpic_finish_dynamic_sections): Check __ROFIXUP_END__ as marking the position right past the _GLOBAL_OFFSET_TABLE_ value. (_frvfdpic_assign_plt_entries): Shrink constant TLS PLT entries if we can guarantee the use of 16-bit constants. 2004-11-10 Alexandre Oliva <aoliva@redhat.com> Introduce TLS support for FR-V FDPIC. * reloc.c: Add TLS relocations. * elf32-frv.c (elf32_frv_howto_table): Add TLS relocations. (elf32_frv_rel_tlsdesc_value_howto): New. (elf32_frv_rel_tlsoff_howto): New. (frv_reloc_map): Add new mappings. (struct frvfdpic_elf_link_hash_table): Add pointer to summary reloc information. (frvfdpic_dynamic_got_plt_info): New. (frvfdpic_plt_tls_ret_offset): New. (ELF_DYNAMIC_INTERPRETER, DEFAULT_STACK_SIZE): Move earlier. (struct _frvfdpic_dynamic_got_info): Likewise. Add TLS members. (struct _frvfdpic_dynamic_got_plt_info): Likewise. (FRVFDPIC_SYM_LOCAL): Regard symbols defined in the absolute section as local. (struct frvfdpic_relocs_info): Add TLS fields. (frvfdpic_relocs_info_hash): Warning clean up. (frvfdpic_relocs_info_find): Initialize tlsplt_entry. (frvfdpic_pic_merge_early_relocs_info): Merge TLS fields. (FRVFDPIC_TLS_BIAS): Define. (tls_biased_base): New. (_frvfdpic_emit_got_relocs_plt_entries): Deal with TLS relocations. (frv_reloc_type_lookup): Likewise. (frvfdpic_info_to_howto_rel): Likewise. (elf32_frv_relocate_section): Likewise. (_frv_create_got_section): Create the PLT section here. (elf32_frvfdpic_create_dynamic_sections): Not here. (_frvfdpic_count_nontls_entries): Move out of... (_frvfdpic_count_got_plt_entries): ... here. (_frvfdpic_count_tls_entries): Likewise. Add TLS support. (_frvfdpic_count_relocs_fixups): Likewise. Add relaxation support. (_frvfdpic_relax_tls_entries): New. (_frvfdpic_compute_got_alloc_data): Add TLS support. (_frvfdpic_get_tlsdesc_entry): New. (_frvfdpic_assign_got_entries): Add TLS support. (_frvfdpic_assign_plt_entries): Likewise. (_frvfdpic_reset_got_plt_entries): New. (_frvfdpic_size_got_plt): Move out of... (elf32_frvfdpic_size_dynamic_sections): ... here. (_frvfdpic_relax_got_plt_entries): New. (elf32_frvfdpic_relax_section): New. (elf32_frvfdpic_finish_dynamic_sections): Add TLS sanity check. (elf32_frv_check_relocs): Add TLS support. (bfd_elf32_bfd_relax_section): Define for FDPIC. * libbfd.h, bfd-in2.h: Rebuilt. cpu/ChangeLog: 2004-11-10 Alexandre Oliva <aoliva@redhat.com> * frv.cpu: Add support for TLS annotations in loads and calll. * frv.opc (parse_symbolic_address): New. (parse_ldd_annotation): New. (parse_call_annotation): New. (parse_ld_annotation): New. (parse_ulo16, parse_uslo16): Use parse_symbolic_address. Introduce TLS relocations. (parse_d12, parse_s12, parse_u12): Likewise. (parse_uhi16): Likewise. Fix constant checking on 64-bit host. (parse_call_label, print_at): New. gas/ChangeLog: * config/tc-frv.c (md_apply_fix3): Mark TLS symbols as such. 2004-12-10 Alexandre Oliva <aoliva@redhat.com> * config/tc-frv.c (frv_pic_ptr): Add tlsmoff support. 2004-11-10 Alexandre Oliva <aoliva@redhat.com> * cgen.c (gas_cgen_parse_operand): Handle CGEN_PARSE_OPERAND_SYMBOLIC. * config/tc-frv.c (md_cgen_lookup_reloc): Handle TLS relocations. (frv_force_relocation): Likewise. Fix handling of PIC relocations. (md_apply_fix3): Likewise. include/elf/ChangeLog: 2004-12-10 Alexandre Oliva <aoliva@redhat.com> * frv.h: Add R_FRV_TLSMOFF. 2004-11-10 Alexandre Oliva <aoliva@redhat.com> * frv.h: Add TLS relocations. include/opcode/ChangeLog: 2004-11-10 Alexandre Oliva <aoliva@redhat.com> * cgen.h (enum cgen_parse_operand_type): Add CGEN_PARSE_OPERAND_SYMBOLIC. ld/testsuite/ChangeLog: * ld-frv/fdpic.exp: Add -mfdpic to ASFLAGS. * ld-frv/tls.exp: Likewise. 2004-11-26 Alexandre Oliva <aoliva@redhat.com> * ld-frv/tls-3.s: New. * ld-frv/tls-static-3.d: New. * ld-frv/tls-dynamic-3.d: New. * ld-frv/tls-pie-3.d: New. * ld-frv/tls-shared-3.d: New. * ld-frv/tls-relax-static-3.d: New. * ld-frv/tls-relax-dynamic-3.d: New. * ld-frv/tls-relax-pie-3.d: New. * ld-frv/tls-relax-shared-3.d: New. * ld-frv/tls.exp: Run the new tests. * ld-frv/tls-dynamic-2.d: Adjust for improved relaxation. * ld-frv/tls-relax-dynamic-2.d: Likewise. * ld-frv/tls-relax-initial-shared-2.d: Likewise. 2004-11-10 Alexandre Oliva <aoliva@redhat.com> * ld-frv/tls-1-dep.s: New. * ld-frv/tls-1-shared.lds: New. * ld-frv/tls-1.s: New. * ld-frv/tls-2.s: New. * ld-frv/tls-dynamic-1.d: New. * ld-frv/tls-dynamic-2.d: New. * ld-frv/tls-initial-shared-2.d: New. * ld-frv/tls-pie-1.d: New. * ld-frv/tls-relax-dynamic-1.d: New. * ld-frv/tls-relax-dynamic-2.d: New. * ld-frv/tls-relax-initial-shared-2.d: New. * ld-frv/tls-relax-pie-1.d: New. * ld-frv/tls-relax-shared-1.d: New. * ld-frv/tls-relax-shared-2.d: New. * ld-frv/tls-relax-static-1.d: New. * ld-frv/tls-shared-1-fail.d: New. * ld-frv/tls-shared-1.d: New. * ld-frv/tls-shared-2.d: New. * ld-frv/tls-static-1.d: New. * ld-frv/tls.exp: New. * ld-frv/fdpic-pie-1.d: Adjust for 64-bit host. * ld-frv/fdpic-pie-2.d: Likewise. * ld-frv/fdpic-pie-6.d: Likewise. * ld-frv/fdpic-pie-7.d: Likewise. * ld-frv/fdpic-pie-8.d: Likewise. * ld-frv/fdpic-shared-1.d: Likewise. * ld-frv/fdpic-shared-2.d: Likewise. * ld-frv/fdpic-shared-3.d: Likewise. * ld-frv/fdpic-shared-4.d: Likewise. * ld-frv/fdpic-shared-5.d: Likewise. * ld-frv/fdpic-shared-6.d: Likewise. * ld-frv/fdpic-shared-7.d: Likewise. * ld-frv/fdpic-shared-8.d: Likewise. * ld-frv/fdpic-shared-local-2.d: Likewise. * ld-frv/fdpic-shared-local-8.d: Likewise. * ld-frv/fdpic-static-1.d: Likewise. * ld-frv/fdpic-static-2.d: Likewise. * ld-frv/fdpic-static-6.d: Likewise. * ld-frv/fdpic-static-7.d: Likewise. * ld-frv/fdpic-static-8.d: Likewise. opcodes/ChangeLog: 2004-11-10 Alexandre Oliva <aoliva@redhat.com> * frv-asm.c: Rebuilt. * frv-desc.c: Rebuilt. * frv-desc.h: Rebuilt. * frv-dis.c: Rebuilt. * frv-ibld.c: Rebuilt. * frv-opc.c: Rebuilt. * frv-opc.h: Rebuilt.	22 years ago
Andrew Cagney	45181ed16d	2005-01-24 Andrew Cagney <cagney@gnu.org> * gettext.m4: Only fall back to ../intl/ when it's present.	22 years ago
Fred Fish	9e836e3d9d	2005-01-21 Fred Fish <fnf@specifixinc.com> * mips-opc.c: Change INSN_ALIAS to INSN2_ALIAS. Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC. Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC. * mips-dis.c: Ditto.	22 years ago
Alan Modra	5e8cb02113	* ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.	22 years ago
Fred Fish	986e18a5a9	2005-01-19 Fred Fish <fnf@specifixinc.com> * mips-dis.c (no_aliases): New disassembly option flag. (set_default_mips_dis_options): Init no_aliases to zero. (parse_mips_dis_option): Handle no-aliases option. (print_insn_mips): Ignore table entries that are aliases if no_aliases is set. (print_insn_mips16): Ditto. * mips-opc.c (mips_builtin_opcodes): Add initializer column for new pinfo2 member and add INSN_ALIAS initializers as needed. Also move WR_MACC and RD_MACC initializers from pinfo to pinfo2. * mips16-opc.c (mips16_opcodes): Ditto.	22 years ago
Nick Clifton	e38bc3b524	Fix SH2A machine variants in order to correctly select instruction inheritance	22 years ago
H.J. Lu	9df48ba9fd	2005-01-12 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.	22 years ago
H.J. Lu	2033b4b97d	gas/testsuite/ 2005-01-12 H.J. Lu <hongjiu.lu@intel.com> * i386/i386.exp: Run "sib". * gas/i386/sib.d: New file. * gas/i386/sib.s: Likewise. opcodes/ 2005-01-12 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.	22 years ago
Andreas Schwab	0bcb06d2f2	binutils/: * configure.in: Don't define SKIP_ZEROES. * configure: Regenerate. * objdump.c (disassemble_data): Set skip_zeroes and skip_zeroes_at_end in disasm_info to defaults. (DEFAULT_SKIP_ZEROES): Rename from SKIP_ZEROES and always define. (DEFAULT_SKIP_ZEROES_AT_END): Rename from SKIP_ZEROES_AT_END and always define. (disassemble_bytes): Use skip_zeroes and skip_zeroes_at_end from objdump_disasm_info. include/: * dis-asm.h (struct disassemble_info): Add skip_zeroes and skip_zeroes_at_end. opcodes/: * disassemble.c (disassemble_init_for_target) <case bfd_arch_ia64>: Set skip_zeroes to 16. <case bfd_arch_tic4x>: Set skip_zeroes to 32.	22 years ago
Tomer Levi	47add74de7	2004-12-23 Tomer Levi <Tomer.Levi@nsc.com> * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.	22 years ago
Svein Seldal	246f4c05fd	Added printing of symbols on AVR disasm	22 years ago
Tomer Levi	0e1200e593	2004-12-05 Tomer Levi <Tomer.Levi@nsc.com> * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.	22 years ago
Tomer Levi	89a649f7ae	2004-11-29 Tomer Levi <Tomer.Levi@nsc.com> * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed. (no_op_insn): Initialize array with instructions that have no operands. * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.	22 years ago
Richard Earnshaw	6255809cae	* arm-dis.c: Correct top-level comment.	22 years ago
Richard Earnshaw	6b8725b919	Tweak last entry.	22 years ago
Richard Earnshaw	2fbad81528	* arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the architecuture defining the insn. (arm_opcodes, thumb_opcodes): Delete. Move to ... * arm-dis.c (arm_opcodes, thumb_opcodes): Here. Also include opcode/arm.h. * Makefile.am (arm-dis.lo): Update dependency list. * Makefile.in: Regenerate.	22 years ago
Nick Clifton	d81acc42a2	* opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to reflect the change to the short immediate syntax. * gas/arc/ld.s: Add check of load of a long immediate. * gas/arc/ld.d: Add expected disassembly.	22 years ago
Alan Modra	5da8bf1b0b	* or32-opc.c (debug): Warning fix. * po/POTFILES.in: Regenerate.	22 years ago
Alan Modra	ca4f237785	* maxq-dis.c: Formatting. (print_insn): Warning fix.	22 years ago
Daniel Jacobowitz	b7693d0213	bfd/ * elf32-arm.c (PLT_THUMB_STUB_SIZE): Define. (elf32_arm_plt_thumb_stub): New. (struct elf32_arm_link_hash_entry): Add plt_thumb_refcount and plt_got_offset. (elf32_arm_link_hash_traverse): Fix typo. (elf32_arm_link_hash_table): Add obfd. (elf32_arm_link_hash_newfunc): Initialize new fields. (elf32_arm_copy_indirect_symbol): Copy plt_thumb_refcount. (elf32_arm_link_hash_table_create): Initialize obfd. (record_arm_to_thumb_glue): Mark the glue as a local ARM function. (record_thumb_to_arm_glue): Mark the glue as a local Thumb function. (bfd_elf32_arm_get_bfd_for_interworking): Verify that the interworking BFD is not dynamic. (bfd_elf32_arm_process_before_allocation): Handle R_ARM_PLT32. Do not emit glue for PLT references. (elf32_arm_final_link_relocate): Handle Thumb functions. Do not emit glue for PLT references. Support the Thumb PLT prefix. (elf32_arm_gc_sweep_hook): Handle R_ARM_THM_PC22 and plt_thumb_refcount. (elf32_arm_check_relocs): Likewise. (elf32_arm_adjust_dynamic_symbol): Handle Thumb functions and plt_thumb_refcount. (allocate_dynrelocs): Handle Thumb PLT references. (elf32_arm_finish_dynamic_symbol): Likewise. (elf32_arm_symbol_processing): New function. (elf_backend_symbol_processing): Define. opcodes/ * arm-dis.c (WORD_ADDRESS): Define. (print_insn): Use it. Correct big-endian end-of-section handling. gas/testsuite/ * gas/arm/mapping.d: Expect F markers for Thumb code. * gas/arm/unwind.d: Update big-endian pattern. ld/ * emultempl/armelf.em (arm_elf_set_bfd_for_interworking): Don't use a dynamic object for stubs. ld/testsuite/ * ld-arm/mixed-app.d, ld-arm/mixed-app.r, ld-arm/mixed-app.s, ld-arm/mixed-app.sym, ld-arm/mixed-lib.d, ld-arm/mixed-lib.r, ld-arm/mixed-lib.s, ld-arm/mixed-lib.sym, ld-arm/arm-dyn.ld, ld-arm/arm-lib.ld: New files. * ld-arm/arm-app-abs32.d, ld-arm/arm-app-abs32.r, ld-arm/arm-app.d, ld-arm/arm-app.r, ld-arm/arm-lib-plt32.d, ld-arm/arm-lib-plt32.r, ld-arm/arm-lib.d, ld-arm/arm-lib.r, ld-arm/arm-static-app.d, ld-arm/arm-static-app.r: Update for big-endian. * ld-arm/arm-elf.exp: Run the new tests.	22 years ago
Nick Clifton	300dac7e8c	oops - omitted from previous delta	22 years ago
Tomer Levi	42048ee72f	2004-11-05 Tomer Levi <Tomer.Levi@nsc.com> * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register mode. * crx-dis.c: Likewise.	22 years ago
Hans-Peter Nilsson	bd21e58e63	Generally, handle CRISv32. * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case). (struct cris_disasm_data): New type. (format_reg, format_hex, cris_constraint, print_flags) (get_opcode_entry): Add struct cris_disasm_data * parameter. All callers changed. (format_sup_reg, print_insn_crisv32_with_register_prefix) (print_insn_crisv32_without_register_prefix) (print_insn_crisv10_v32_with_register_prefix) (print_insn_crisv10_v32_without_register_prefix) (cris_parse_disassembler_options): New functions. (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family parameter. All callers changed. (get_opcode_entry): Call malloc, not xmalloc. Return NULL on failure. (cris_constraint) <case 'Y', 'U'>: New cases. (bytes_to_skip): Handle 'Y' and 'N' as 's'. Skip size is 4 bytes for constraint 'n'. (print_with_operands) <case 'Y'>: New case. (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'> <case 'N', 'Y', 'Q'>: New cases. (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32. (print_insn_cris_with_register_prefix) (print_insn_cris_without_register_prefix): Call cris_parse_disassembler_options. * cris-opc.c (cris_spec_regs): Mention that this table isn't used for CRISv32 and the size of immediate operands. New v32-only entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and spc. Add v32-only 4-byte entries for p2, p3, p5 and p6. Change ccr, ibr, irp to be v0..v10. Change bar, dccr to be v8..v10. Change brp to be v3..v10. (cris_support_regs): New vector. (cris_opcodes): Update head comment. New format characters '[', ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'. Add new opcodes for v32 and adjust existing opcodes to accommodate differences to earlier variants. (cris_cond15s): New vector.	22 years ago
Jan Beulich	9306ca4a20	gas/ 2004-11-04 Jan Beulich <jbeulich@novell.com> * config/tc-i386.c (set_intel_syntax): Allow % in symbol names when intel syntax and no register prefix, allow $ in symbol names when intel syntax. (set_16bit_gcc_code_flag): Replace literal 'l' by LONG_MNEM_SUFFIX. (intel_float_operand): Add fourth return value indicating math control operations. Make classification more precise. (md_assemble): Complain if memory operand of mov[sz]x has no size specified. (parse_insn): Translate word operands to floating point instructions operating on integers as well as control instructions to short ones as expected by AT&T syntax. Translate 'd' suffix to short one only for floating point instructions operating on non-integer operands. (match_template): Remove fldcw special case. Adjust q-suffix handling to permit it on fild/fistp/fisttp in AT&T mode. (process_suffix): Don't guess DefaultSize insns' suffix from stackop_size for certain floating point control instructions. Guess suffix for branch and [ls][gi]dt based on flag_code. Split error messages for Intel and AT&T syntax, and make the condition more strict for the former. Adjust suppressing of generation of operand size overrides. (intel parser): Allow the full set of MASM operators. Add FWORD, TBYTE, OWORD, and XMMWORD operand size specifiers (TBYTE replaces XWORD). Add more error checking. * config/tc-i386.h (BYTE_PTR WORD_PTR DWORD_PTR QWORD_PTR XWORD_PTR SHORT OFFSET_FLAT FLAT NONE_FOUND): Remove unused defines. gas/testsuite/ 2004-11-04 Jan Beulich <jbeulich@novell.com> * gas/i386/i386.exp: Execute new tests intelbad and intelok. * gas/i386/intelbad.[sl]: New test to check for various things not permitted in Intel mode. * gas/i386/intel.d, gas/i386/opcode.d, gas/i386/x86-64-opcode.d: Adjust for change to segment register store. * gas/i386/intelok.[sd]: New test to check various Intel mode specific things get handled correctly. * gas/i386/x86_64.[sd]: Remove unsupported constructs referring to 'high' and 'low' parts of an operand, which the parser previously accepted while neither telling that it's not supported nor that it ignored the remainder of the line following these supposed keywords. include/opcode/ 2004-11-04 Jan Beulich <jbeulich@novell.com> * i386.h (sldx_Suf): Remove. (FP, l_FP, sl_FP, x_FP): Don't imply IgnoreSize. (q_FP): Define, implying no REX64. (x_FP, sl_FP): Imply FloatMF. (i386_optab): Split reg and mem forms of moving from segment registers so that the memory forms can ignore the 16-/32-bit operand size distinction. Adjust a few others for Intel mode. Remove FP uses from all non-floating-point instructions. Unite 32- and 64-bit forms of movsx, movzx, and movd. Adjust floating point operations for the above changes to the FP macros. Add DefaultSize to floating point control insns operating on larger memory ranges. Remove left over comments hinting at certain insns being Intel-syntax ones where the ones actually meant are already gone. opcodes/ 2004-11-04 Jan Beulich <jbeulich@novell.com> * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define. (indirEb): Remove. (Mp): Use f_mode rather than none at all. (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode replaces what previously was x_mode; x_mode now means 128-bit SSE operands. (dis386): Make far jumps and calls have an 'l' prefix only in AT&T mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq. pinsrw's second operand is Edqw. (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt, fldenv, frstor, fsave, fstenv all should also have suffixes in Intel mode when an operand size override is present or always suffixing. More instructions will need to be added to this group. (putop): Handle new macro chars 'C' (short/long suffix selector), 'I' (Intel mode override for following macro char), and 'J' (for adding the 'l' prefix to far branches in AT&T mode). When an alternative was specified in the template, honor macro character when specified for Intel mode. (OP_E): Handle new _mode values. Correct pointer specifications for memory operands. Consolidate output of index register. (OP_G): Handle new _mode values. (OP_I): Handle const_1_mode. (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate respective opcode prefix bits have been consumed. (OP_EM, OP_EX): Provide some default handling for generating pointer specifications.	22 years ago
Tomer Levi	f39c96a9c0	2004-10-28 Tomer Levi <Tomer.Levi@nsc.com> * crx-opc.c (REV_COP_INST): New macro, reverse operand order of COP_INST macro.	22 years ago
Tomer Levi	812337be05	2004-10-27 Tomer Levi <Tomer.Levi@nsc.com> * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE. (getregliststring): Support HI/LO and user registers. * crx-opc.c (crx_instruction): Update data structure according to the rearrangement done in CRX opcode header file. (crx_regtab): Likewise. (crx_optab): Likewise. (crx_instruction): Reorder load/stor instructions, remove unsupported formats. support new Co-Processor instruction 'cpi'.	22 years ago
Nick Clifton	4030fa5ade	Add an index operand to some of the iq2000 co-processor instructions	22 years ago
Tomer Levi	fc3d45e89e	2004-10-21 Tomer Levi <Tomer.Levi@nsc.com> * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3, us4, us5 (respectively). Remove unsupported 'popa' instruction. Reverse operands order in store co-processor instructions.	22 years ago
Alan Modra	3c55da702a	* Makefile.am: Run "make dep-am" * Makefile.in: Regenerate.	22 years ago
Bob Wilson	7fa3d080a2	bfd ChangeLog * elf32-xtensa.c: Use ISO C90 formatting. gas ChangeLog * config/tc-xtensa.c: Use ISO C90 formatting. * config/tc-xtensa.h: Likewise. * config/xtensa-istack.h: Likewise. * config/xtensa-relax.c: Likewise. * config/xtensa-relax.h: Likewise. ld ChangeLog * emultempl/xtensaelf.em: Use ISO C90 formatting. opcodes ChangeLog * xtensa-dis.c: Use ISO C90 formatting.	22 years ago
Alan Modra	e612bb4d30	* ppc-opc.c: Revert 2004-09-09 change.	22 years ago
Bob Wilson	43cd72b9aa	bfd ChangeLog * elf32-xtensa.c (elf32xtensa_size_opt): New global variable. (xtensa_default_isa): Global variable moved here from xtensa-isa.c. (elf32xtensa_no_literal_movement): New global variable. (elf_howto_table): Add entries for new relocations. (elf_xtensa_reloc_type_lookup): Handle new relocations. (property_table_compare): When addresses are equal, compare sizes and various property flags. (property_table_matches): New. (xtensa_read_table_entries): Extend to read new property tables. Add output_addr parameter to indicate that output addresses should be used. Use bfd_get_section_limit. (elf_xtensa_find_property_entry): New. (elf_xtensa_in_literal_pool): Use elf_xtensa_find_property_entry. (elf_xtensa_check_relocs): Handle new relocations. (elf_xtensa_do_reloc): Use bfd_get_section_limit. Handle new relocations. Use new xtensa-isa.h functions. (build_encoding_error_message): Remove encode_result parameter. Add new target_address parameter used to detect alignment errors. (elf_xtensa_relocate_section): Use bfd_get_section_limit. Clean up error handling. Use new is_operand_relocation function. (elf_xtensa_combine_prop_entries, elf_xtensa_merge_private_bfd_data): Use underbar macro for error messages. Formatting. (get_const16_opcode): New. (get_l32r_opcode): Add a separate flag for initialization. (get_relocation_opnd): Operand number is no longer explicit in the relocation. Change to decode the opcode and analyze its operands. (get_relocation_slot): New. (get_relocation_opcode): Add bfd parameter. Use bfd_get_section_limit. Use new xtensa-isa.h functions to handle multislot instructions. (is_l32r_relocation): Add bfd parameter. Use is_operand_relocation. (get_asm_simplify_size, is_alt_relocation, is_operand_relocation, insn_decode_len, insn_decode_opcode, check_branch_target_aligned, check_loop_aligned, check_branch_target_aligned_address, narrowable, widenable, narrow_instruction, widen_instruction, op_single_fmt_table, get_single_format, init_op_single_format_table): New. (elf_xtensa_do_asm_simplify): Add error_message parameter and use it instead of calling _bfd_error_handler. Use new xtensa-isa.h functions. (contract_asm_expansion): Add error_message parameter and pass it to elf_xtensa_do_asm_simplify. Replace use of R_XTENSA_OP0 relocation with R_XTENSA_SLOT0_OP. (get_expanded_call_opcode): Extend to handle either L32R or CONST16 instructions. Use new xtensa-isa.h functions. (r_reloc struct): Add new virtual_offset field. (r_reloc_init): Add contents and content_length parameters. Set virtual_offset field to zero. Add contents to target_offset field for partial_inplace relocations. (r_reloc_is_defined): Check for null. (print_r_reloc): New debug function. (source_reloc struct): Replace xtensa_operand field with pair of the opcode and the operand position. Add is_abs_literal field. (init_source_reloc): Specify operand by opcode/position pair. Set is_abs_literal field. (source_reloc_compare): When target_offsets are equal, compare other fields to make sorting predictable. (literal_value struct): Add is_abs_literal field. (value_map_hash_table struct): Add has_last_loc and last_loc fields. (init_literal_value): New. (is_same_value): Replace with ... (literal_value_equal): ... this function. Add comparisons of virtual_offset and is_abs_literal fields. (value_map_hash_table_init): Use bfd_zmalloc. Check for allocation failure. Initialize has_last_loc field. (value_map_hash_table_delete): New. (hash_literal_value): Rename to ... (literal_value_hash): ... this. Include is_abs_literal flag and virtual_offset field in the hash value. (get_cached_value): Rename to ... (value_map_get_cached_value): ... this. Update calls to literal_value_hash and literal_value_equal. (add_value_map): Check for allocation failure. Update calls to value_map_get_cached_value and literal_value_hash. (text_action, text_action_list, text_action_t): New types. (find_fill_action, compute_removed_action_diff, adjust_fill_action, text_action_add, text_action_add_literal, offset_with_removed_text, offset_with_removed_text_before_fill, find_insn_action, print_action_list, print_removed_literals): New. (offset_with_removed_literals): Delete. (xtensa_relax_info struct): Add is_relaxable_asm_section, action_list, fix_array, fix_array_count, allocated_relocs, relocs_count, and allocated_relocs_count fields. (init_xtensa_relax_info): Initialize new fields. (reloc_bfd_fix struct): Add new translated field. (reloc_bfd_fix_init): Add translated parameter and use it to set the translated field. (fix_compare, cache_fix_array): New. (get_bfd_fix): Remove fix_list parameter and get all relax_info for the section via get_xtensa_relax_info. Use cache_fix_array to set up sorted fix_array and use bsearch instead of linear search. (section_cache_t): New struct. (init_section_cache, section_cache_section, clear_section_cache): New. (ebb_t, ebb_target_enum, proposed_action, ebb_constraint): New types. (init_ebb_constraint, free_ebb_constraint, init_ebb, extend_ebb_bounds, extend_ebb_bounds_forward, extend_ebb_bounds_backward, insn_block_decodable_len, ebb_propose_action, ebb_add_proposed_action): New. (retrieve_contents): Use bfd_get_section_limit. (elf_xtensa_relax_section): Add relocations_analyzed flag. Update call to compute_removed_literals. Free value_map_hash_table when no longer needed. (analyze_relocations): Check is_relaxable_asm_section flag. Call compute_text_actions for all sections. (find_relaxable_sections): Mark sections as relaxable if they contain ASM_EXPAND relocations that can be optimized. Adjust r_reloc_init call. Increment relax_info src_count field only for appropriate relocation types. Remove is_literal_section check. (collect_source_relocs): Use bfd_get_section_limit. Adjust calls to r_reloc_init and find_associated_l32r_irel. Check is_relaxable_asm_section flag. Handle L32R instructions with absolute literals. Pass is_abs_literal flag to init_source_reloc. (is_resolvable_asm_expansion): Use bfd_get_section_limit. Check for CONST16 instructions. Adjust calls to r_reloc_init and pcrel_reloc_fits. Handle weak symbols conservatively. (find_associated_l32r_irel): Add bfd parameter and pass it to is_l32r_relocation. (compute_text_actions, compute_ebb_proposed_actions, compute_ebb_actions, check_section_ebb_pcrels_fit, check_section_ebb_reduces, text_action_add_proposed, compute_fill_extra_space): New. (remove_literals): Replace with ... (compute_removed_literals): ... this function. Call init_section_cache. Use bfd_get_section_limit. Sort internal_relocs. Call xtensa_read_table_entries to get the property table. Skip relocations other than R_XTENSA_32 and R_XTENSA_PLT. Use new is_removable_literal, remove_dead_literal, and identify_literal_placement functions. (get_irel_at_offset): Rewrite to use bsearch on sorted relocations instead of linear search. (is_removable_literal, remove_dead_literal, identify_literal_placement): New. (relocations_reach): Update check for literal not referenced by any PC-relative relocations. Adjust call to pcrel_reloc_fits. (coalesce_shared_literal, move_shared_literal): New. (relax_section): Use bfd_get_section_limit. Call translate_section_fixes. Update calls to r_reloc_init and offset_with_removed_text. Check new is_relaxable_asm_section flag. Add call to pin_internal_relocs. Add special handling for R_XTENSA_ASM_SIMPLIFY and R_XTENSA_DIFF* relocs. Use virtual_offset info to calculate new addend_displacement variable. Replace code for deleting literals with more general code to perform the actions determined by the action_list for the section. (translate_section_fixes, translate_reloc_bfd_fix): New. (translate_reloc): Check new is_relaxable_asm_section flag. Call find_removed_literal only if is_operand_relocation. Update call to offset_with_removed_text. Use new target_offset and removed_bytes variables. (move_literal): New. (relax_property_section): Use bfd_get_section_limit. Set new is_full_prop_section flag and handle new property tables. Update calls to r_reloc_init and offset_with_removed_text. Check is_relaxable_asm_section flag. Handle expansion of zero-sized unreachable entries, with use of offset_with_removed_text_before_fill. For relocatable links, combine entries only for literal tables. (relax_section_symbols): Check is_relaxable_asm_section flag. Update calls to offset_with_removed_text. Translate st_size field for function symbols. (do_fix_for_relocatable_link): Change to return bfd_boolean to indicate failure. Add contents parameter. Update call to get_bfd_fix. Update call to r_reloc_init. Call _bfd_error_handler and return FALSE for R_XTENSA_ASM_EXPAND relocs. (do_fix_for_final_link): Add input_bfd and contents parameters. Update call to get_bfd_fix. Include offset from contents for partial_inplace relocations. (is_reloc_sym_weak): New. (pcrel_reloc_fits): Use new xtensa-isa.h functions. (prop_sec_len): New. (xtensa_is_property_section): Handle new property sections. (is_literal_section): Delete. (internal_reloc_compare): When r_offset matches, compare r_info and r_addend to make sorting predictable. (internal_reloc_matches): New. (xtensa_get_property_section_name): Handle new property sections. (xtensa_get_property_predef_flags): New. (xtensa_callback_required_dependence): Use bfd_get_section_limit. Update calls to xtensa_isa_init, is_l32r_relocation, and r_reloc_init. * xtensa-isa.c (xtensa_default_isa): Moved to elf32-xtensa.c. (xtisa_errno, xtisa_error_msg): New variables. (xtensa_isa_errno, xtensa_isa_error_msg): New. (xtensa_insnbuf_alloc): Add error handling. (xtensa_insnbuf_to_chars): Add num_chars parameter. Update to use xtensa_format_decode. Add error handling. (xtensa_insnbuf_from_chars): Add num_chars parameter. Decode the instruction length to find the number of bytes to copy. (xtensa_isa_init): Add error handling. Replace calls to xtensa_load_isa and xtensa_extend_isa with code to initialize lookup tables in the xtensa_modules structure. (xtensa_check_isa_config, xtensa_add_isa, xtensa_load_isa, xtensa_extend_isa): Delete. (xtensa_isa_free): Change to only free lookup tables. (opname_lookup_compare): Replace with ... (xtensa_isa_name_compare): ... this function. Use strcasecmp. (xtensa_insn_maxlength): Rename to ... (xtensa_isa_maxlength): ... this. (xtensa_insn_length): Delete. (xtensa_insn_length_from_first_byte): Replace with ... (xtensa_isa_length_from_chars): ... this function. (xtensa_num_opcodes): Rename to ... (xtensa_isa_num_opcodes): ... this. (xtensa_isa_num_pipe_stages, xtensa_isa_num_formats, xtensa_isa_num_regfiles, xtensa_isa_num_stages, xtensa_isa_num_sysregs, xtensa_isa_num_interfaces, xtensa_isa_num_funcUnits, xtensa_format_name, xtensa_format_lookup, xtensa_format_decode, xtensa_format_encode, xtensa_format_length, xtensa_format_num_slots, xtensa_format_slot_nop_opcode, xtensa_format_get_slot, xtensa_format_set_slot): New functions. (xtensa_opcode_lookup): Add error handling. (xtensa_decode_insn): Replace with ... (xtensa_opcode_decode): ... this function, with new format and slot parameters. Add error handling. (xtensa_encode_insn): Replace with ... (xtensa_opcode_encode): ... this function, which does the encoding via one of the entries in the "encode_fns" array. Add error handling. (xtensa_opcode_name): Add error handling. (xtensa_opcode_is_branch, xtensa_opcode_is_jump, xtensa_opcode_is_loop, xtensa_opcode_is_call): New. (xtensa_num_operands): Replace with ... (xtensa_opcode_num_operands): ... this function. Add error handling. (xtensa_opcode_num_stateOperands, xtensa_opcode_num_interfaceOperands, xtensa_opcode_num_funcUnit_uses, xtensa_opcode_funcUnit_use, xtensa_operand_name, xtensa_operand_is_visible): New. (xtensa_get_operand, xtensa_operand_kind): Delete. (xtensa_operand_inout): Add error handling and special-case for "sout" operands. (xtensa_operand_get_field, xtensa_operand_set_field): Rewritten to operate on one slot of an instruction. Added error handling. (xtensa_operand_encode): Handle default operands with no encoding functions. Check for success by comparing against decoded value. Add error handling. (xtensa_operand_decode): Handle default operands. Return decoded value through argument pointer. Add error handling. (xtensa_operand_is_register, xtensa_operand_regfile, xtensa_operand_num_regs, xtensa_operand_is_known_reg): New. (xtensa_operand_isPCRelative): Rename to ... (xtensa_operand_is_PCrelative): ... this. Add error handling. (xtensa_operand_do_reloc, xtensa_operand_undo_reloc): Return value through argument pointer. Add error handling. (xtensa_stateOperand_state, xtensa_stateOperand_inout, xtensa_interfaceOperand_interface, xtensa_regfile_lookup, xtensa_regfile_lookup_shortname, xtensa_regfile_name, xtensa_regfile_shortname, xtensa_regfile_view_parent, xtensa_regfile_num_bits, xtensa_regfile_num_entries, xtensa_state_lookup, xtensa_state_name, xtensa_state_num_bits, xtensa_state_is_exported, xtensa_sysreg_lookup, xtensa_sysreg_lookup_name, xtensa_sysreg_name, xtensa_sysreg_number, xtensa_sysreg_is_user, xtensa_interface_lookup, xtensa_interface_name, xtensa_interface_num_bits, xtensa_interface_inout, xtensa_interface_has_side_effect, xtensa_funcUnit_lookup, xtensa_funcUnit_name, xtensa_funcUnit_num_copies): New. * xtensa-modules.c: Rewrite to use new data structures. * reloc.c (BFD_RELOC_XTENSA_DIFF8, BFD_RELOC_XTENSA_DIFF16, BFD_RELOC_XTENSA_DIFF32, BFD_RELOC_XTENSA_SLOT0_OP, BFD_RELOC_XTENSA_SLOT1_OP, BFD_RELOC_XTENSA_SLOT2_OP, BFD_RELOC_XTENSA_SLOT3_OP, BFD_RELOC_XTENSA_SLOT4_OP, BFD_RELOC_XTENSA_SLOT5_OP, BFD_RELOC_XTENSA_SLOT6_OP, BFD_RELOC_XTENSA_SLOT7_OP, BFD_RELOC_XTENSA_SLOT8_OP, BFD_RELOC_XTENSA_SLOT9_OP, BFD_RELOC_XTENSA_SLOT10_OP, BFD_RELOC_XTENSA_SLOT11_OP, BFD_RELOC_XTENSA_SLOT12_OP, BFD_RELOC_XTENSA_SLOT13_OP, BFD_RELOC_XTENSA_SLOT14_OP, BFD_RELOC_XTENSA_SLOT0_ALT, BFD_RELOC_XTENSA_SLOT1_ALT, BFD_RELOC_XTENSA_SLOT2_ALT, BFD_RELOC_XTENSA_SLOT3_ALT, BFD_RELOC_XTENSA_SLOT4_ALT, BFD_RELOC_XTENSA_SLOT5_ALT, BFD_RELOC_XTENSA_SLOT6_ALT, BFD_RELOC_XTENSA_SLOT7_ALT, BFD_RELOC_XTENSA_SLOT8_ALT, BFD_RELOC_XTENSA_SLOT9_ALT, BFD_RELOC_XTENSA_SLOT10_ALT, BFD_RELOC_XTENSA_SLOT11_ALT, BFD_RELOC_XTENSA_SLOT12_ALT, BFD_RELOC_XTENSA_SLOT13_ALT, BFD_RELOC_XTENSA_SLOT14_ALT): Add new relocations. * Makefile.am (xtensa-isa.lo, xtensa-modules.lo): Update dependencies. * Makefile.in: Regenerate. * bfd-in2.h: Likewise. * libbfd.h: Likewise. gas ChangeLog * config/tc-xtensa.c (absolute_literals_supported): New global flag. (UNREACHABLE_MAX_WIDTH): Define. (XTENSA_FETCH_WIDTH): Delete. (cur_vinsn, xtensa_fetch_width, xt_saved_debug_type, past_xtensa_end, prefer_const16, prefer_l32r): New global variables. (LIT4_SECTION_NAME): Define. (lit4_state struct): Add lit4_seg_name and lit4_seg fields. (XTENSA_PROP_, GET_XTENSA_PROP_, SET_XTENSA_PROP_): Define. (frag_flags struct): New. (xtensa_block_info struct): Move from tc-xtensa.h. Add flags field. (subseg_map struct): Add cur_total_freq and cur_target_freq fields. (bitfield, bit_is_set, set_bit, clear_bit): Define. (MAX_FORMATS): Define. (op_placement_info struct, op_placement_table): New. (O_pltrel, O_hi16, O_lo16): Define. (directiveE enum): Rename directive_generics to directive_transform. Delete directive_relax. Add directive_schedule, directive_absolute_literals, and directive_last_directive. (directive_info): Rename "generics" to "transform". Delete "relax". Add "schedule" and "absolute-literals". (directive_state): Adjust entries to match changes in directive_info. (xtensa_relax_statesE, RELAX_IMMED_MAXSTEPS): Move to tc-xtensa.h. (xtensa_const16_opcode, xtensa_movi_opcode, xtensa_movi_n_opcode, xtensa_l32r_opcode, xtensa_nop_opcode, xtensa_rsr_lcount_opcode): New. (xtensa_j_opcode, xtensa_rsr_opcode): Delete. (align_only_targets, software_a0_b_retw_interlock, software_avoid_b_j_loop_end, maybe_has_b_j_loop_end, software_avoid_short_loop, software_avoid_close_loop_end, software_avoid_all_short_loops, specific_opcode): Delete. (warn_unaligned_branch_targets): New. (workaround_a0_b_retw, workaround_b_j_loop_end, workaround_short_loop, workaround_close_loop_end, workaround_all_short_loops): Default FALSE. (option_[no_]link_relax, option_[no_]transform, option_[no_]absolute_literals, option_warn_unaligned_targets, option_prefer_l32r, option_prefer_const16, option_target_hardware): New enum values. (option_[no_]align_only_targets, option_literal_section_name, option_text_section_name, option_data_section_name, option_bss_section_name, option_eb, option_el): Delete. (md_longopts): Add entries for: [no-]transform, [no-]absolute-literals, warn-unaligned-targets, prefer-l32r, prefer-const16, [no-]link-relax, and target-hardware. Delete entries for [no-]target-align-only, literal-section-name, text-section-name, data-section-name, and bss-section-name. (md_parse_option): Handle new options and remove old ones. Accept but ignore [no-]density options. Warn for [no-]generics and [no-]relax and treat them as [no-]transform. (md_show_usage): Add new options and remove old ones. (xtensa_setup_hw_workarounds): New. (md_pseudo_table): Change "word" entry to use xtensa_elf_cons. Add "long", "short", "loc" and "frequency" entries. (use_generics): Rename to ... (use_transform): ... this function. Add past_xtensa_end check. (use_longcalls): Add past_xtensa_end check. (code_density_available, can_relax): Delete. (do_align_targets): New. (get_directive): Accept dashes in directive names. Warn about [no-]generics and [no-]relax directives and treat them as [no-]transform. (xtensa_begin_directive): Call md_flush_pending_output only for some directives. Check for directives inside instruction bundles. Warn about deprecated ".begin literal" usage. Warn and ignore [no-]density directives. Handle new directives. Check generating_literals flag for literal_prefix. (xtensa_end_directive): Check for directives inside instruction bundles. Warn and ignore [no-]density directives. Handle new directives. Call xtensa_set_frag_assembly_state. (xtensa_loc_directive_seen, xtensa_dwarf2_directive_loc, xtensa_dwarf2_emit_insn): New. (xtensa_literal_position): Call md_flush_pending_output. Do not check use_literal_section flag. (xtensa_literal_pseudo): Call md_flush_pending_output. Handle absolute literals. Use xtensa_elf_cons to parse the expression. (xtensa_literal_prefix): Do not check use_literal_section. Support ".lit4" sections for absolute literals. Change prefix convention to replace ".text" (or ".t" in a linkonce section). No need to call subseg_set. (xtensa_frequency_pseudo, xtensa_elf_cons, xtensa_elf_suffix): New. (expression_end): Handle closing braces and colons. (PLT_SUFFIX, plt_suffix): Delete. (expression_maybe_register): Use new xtensa-isa.h functions. Use xtensa_elf_suffix instead of checking for plt suffix, and handle O_lo16 and O_hi16 expressions as well. (tokenize_arguments): Handle closing braces and colons. (parse_arguments): Use new xtensa-isa.h functions. Handle "invisible" operands and paired register syntax. (get_invisible_operands): New. (xg_translate_sysreg_op): Handle new Xtensa LX RSR/WSR/XSR syntax. Use new xtensa-isa.h functions. (xtensa_translate_old_userreg_ops, xtensa_translate_zero_immed): New. (xg_translate_idioms): Check if inside bundle. Use use_transform. Handle new Xtensa LX RSR/WSR/XSR syntax. Remove code to widen density instructions. Use xtensa_translate_zero_immed. (operand_is_immed, operand_is_pcrel_label): Delete. (get_relaxable_immed): Use new xtensa-isa.h functions. (get_opcode_from_buf): Add slot parameter. Use new xtensa-isa.h functions. (xtensa_print_insn_table, print_vliw_insn): New. (is_direct_call_opcode): Use new xtensa-isa.h functions. (is_call_opcode, is_loop_opcode, is_conditional_branch_opcode, is_branch_or_jump_opcode): Delete. (is_movi_opcode, decode_reloc, encode_reloc, encode_alt_reloc): New. (opnum_to_reloc, reloc_to_opnum): Delete. (xtensa_insnbuf_set_operand, xtensa_insnbuf_get_operand): Use new xtensa-isa.h functions. Operate on one slot of an instruction. (xtensa_insnbuf_set_immediate_field, is_negatable_branch, xg_get_insn_size): Delete. (xg_get_build_instr_size): Use xg_get_single_size. (xg_is_narrow_insn, xg_is_single_relaxable_insn): Update calls to xg_build_widen_table. Use xg_get_single_size. (xg_get_max_narrow_insn_size): Delete. (xg_get_max_insn_widen_size, xg_get_max_insn_widen_literal_size, xg_is_relaxable_insn): Update calls to xg_build_widen_table. Use xg_get_single_size. (xg_build_to_insn): Record the loc field. Handle OP_OPERAND_HI16U and OP_OPERAND_LOW16U. Check xg_valid_literal_expression. (xg_expand_to_stack, xg_expand_narrow): Update calls to xg_build_widen_table. Use xg_get_single_size. (xg_immeds_fit): Use new xtensa-isa.h functions. Update call to xg_check_operand. (xg_symbolic_immeds_fit): Likewise. Also handle O_lo16 and O_hi16, and treat weak symbols conservatively. (xg_check_operand): Use new xtensa-isa.h functions. (is_dnrange): Delete. (xg_assembly_relax): Inline previous calls to tinsn_copy. (xg_finish_frag): Specify separate relax states for the frag and slot0. (is_branch_jmp_to_next, xg_add_branch_and_loop_targets): Use new xtensa-isa.h functions. (xg_instruction_matches_option_term, xg_instruction_matches_or_options, xg_instruction_matches_options): New. (xg_instruction_matches_rule): Handle O_register expressions. Call xg_instruction_matches_options. (transition_rule_cmp): New. (xg_instruction_match): Update call to xg_build_simplify_table. (xg_build_token_insn): Record loc fields. (xg_simplify_insn): Check is_specific_opcode field and density_supported flag. (xg_expand_assembly_insn): Skip checking code_density_available. Use new xtensa-isa.h functions. Call use_transform instead of can_relax. (xg_assemble_literal): Add error handling for O_big. Call record_alignment. Handle O_pltrel. (xg_valid_literal_expression): New. (xg_assemble_literal_space): Add slot parameter. Remove call to set_expr_symbol_offset. Add call to record_alignment. Update call to xg_finish_frag. (xg_emit_insn): Delete. (xg_emit_insn_to_buf): Add format parameter. Update calls to xg_add_opcode_fix and xtensa_insnbuf_to_chars. (xg_add_opcode_fix): Change opcode parameter to tinsn and add format and slot parameters. Handle new "alternate" relocations for absolute literals and CONST16 instructions. Check for bad uses of O_lo16 and O_hi16. Use new xtensa-isa.h functions. (xg_assemble_tokens): Delete. (is_register_writer): Use new xtensa-isa.h functions. (is_bad_loopend_opcode): Check for xtensa_rsr_lcount_opcode instead of old-style RSR from LCOUNT. (next_frag_opcode): Delete. (next_frag_opcode_is_loop, next_frag_format_size, frag_format_size, update_next_frag_state): New. (update_next_frag_nop_state): Delete. (next_frag_pre_opcode_bytes): Use next_frag_opcode_is_loop. (xtensa_mark_literal_pool_location): Check use_literal_section flag and the state of the absolute-literals directive. Add calls to record_alignment and xtensa_set_frag_assembly_state. Call xtensa_switch_to_non_abs_literal_fragment instead of xtensa_switch_to_literal_fragment. (build_nop): New. (assemble_nop): Use build_nop. Update call to xtensa_insnbuf_to_chars. (get_expanded_loop_offset): Change check for undefined opcode to an assertion. (xtensa_set_frag_assembly_state, relaxable_section, xtensa_find_unmarked_state_frags, xtensa_find_unaligned_branch_targets, xtensa_find_unaligned_loops, xg_apply_tentative_value): New. (md_begin): Update call to xtensa_isa_init. Initialize linkrelax to 1. Set lit4_seg_name. Call xg_init_vinsn. Initialize new global opcodes. Call init_op_placement_info_table and xtensa_set_frag_assembly_state. (xtensa_init_fix_data): New. (xtensa_frob_label): Reset label symbol to the current frag. Check do_align_targets and generating_literals flag. Propagate frequency info to new alignment frag. Call xtensa_set_frag_assembly_state. (xtensa_unrecognized_line): New. (xtensa_flush_pending_output): Check if inside a bundle. Add a call to xtensa_set_frag_assembly_state. (error_reset_cur_vinsn): New. (md_assemble): Remove check for literal frag. Remove call to istack_init. Call use_transform instead of use_generics. Parse explicit instruction format specifiers. Move code for a0_b_retw_interlock workaround to xg_assemble_vliw_tokens. Call error_reset_cur_vinsn on errors. Add call to get_invisible_operands. Add dwarf2_where call. Remote automatic alignment for ENTRY instructions. Move call to xtensa_clear_insn_labels to the end. Rearrange to handle bundles. (xtensa_cons_fix_new): Delete. (xtensa_handle_align): New. (xtensa_frag_init): Call xtensa_set_frag_assembly_state. Remove assignment to is_no_density field. (md_pcrel_from): Use new xtensa-isa.h functions. Use decode_reloc instead of reloc_to_opnum. Handle "alternate" relocations. (xtensa_force_relocation, xtensa_check_inside_bundle, xtensa_elf_section_change_hook): New. (xtensa_symbol_new_hook): Delete. (xtensa_fix_adjustable): Check for difference of symbols with an offset. Check for external and weak symbols. (md_apply_fix3): Remove cases for XTENSA_OP{0,1,2} relocs. (md_estimate_size_before_relax): Return expansion for the first slot. (tc_gen_reloc): Handle difference of symbols by producing XTENSA_DIFF{8,16,32} relocs and by writing the value of the difference into the output. Handle new XTENSA_SLOT_OP relocs by storing the tentative values into the output when linkrelax is set. (XTENSA_PROP_SEC_NAME): Define. (xtensa_post_relax_hook): Call xtensa_find_unmarked_state_frags. Create literal tables only if using literal sections. Create new property tables instead of old instruction tables. Check for unaligned branch targets and loops. (finish_vinsn, find_vinsn_conflicts, check_t1_t2_reads_and_writes, new_resource_table, clear_resource_table, resize_resource_table, resources_available, reserve_resources, release_resources, opcode_funcUnit_use_unit, opcode_funcUnit_use_stage, resources_conflict, xg_find_narrowest_format, relaxation_requirements, bundle_single_op, emit_single_op, xg_assemble_vliw_tokens): New. (xtensa_end): Call xtensa_flush_pending_output. Set past_xtensa_end flag. Update checks for workaround options. Call xtensa_mark_narrow_branches and xtensa_mark_zcl_first_insns. (xtensa_cleanup_align_frags): Add special case for branch targets. Check for and mark unreachable frags. (xtensa_fix_target_frags): Remove use of align_only_targets flag. Use RELAX_LOOP_END_BYTES in special case for negatable branch at the end of a zero-overhead loop body. (frag_can_negate_branch): Handle instructions with multiple slots. Use new xtensa-isa.h functions (xtensa_mark_narrow_branches, is_narrow_branch_guaranteed_in_range, xtensa_mark_zcl_first_insns): New. (xtensa_fix_a0_b_retw_frags, xtensa_fix_b_j_loop_end_frags): Error if transformations are disabled. (next_instrs_are_b_retw): Use new xtensa-isa.h functions. Handle multislot instructions. (xtensa_fix_close_loop_end_frags, xtensa_fix_short_loop_frags): Likewise. Also error if transformations are disabled. (unrelaxed_frag_max_size): New. (unrelaxed_frag_min_insn_count, unrelax_frag_has_b_j): Use new xtensa-isa.h functions. (xtensa_sanity_check, is_empty_loop, is_local_forward_loop): Use xtensa_opcode_is_loop instead of is_loop_opcode. (get_text_align_power): Replace as_fatal with assertion. (get_text_align_fill_size): Iterate instead of using modulus when use_nops is false. (get_noop_aligned_address): Assert that this is for a machine-dependent RELAX_ALIGN_NEXT_OPCODE frag. Use next_frag_opcode_is_loop, xg_get_single_size, and frag_format_size. (get_widen_aligned_address): Rename to ... (get_aligned_diff): ... this function. Add max_diff parameter. Remove handling of rs_align/rs_align_code frags. Use next_frag_format_size, get_text_align_power, get_text_align_fill_size, next_frag_opcode_is_loop, and xg_get_single_size. Compute max_diff and pass it back to caller. (xtensa_relax_frag): Use relax_frag_loop_align. Add code for new RELAX_SLOTS, RELAX_MAYBE_UNREACHABLE, RELAX_MAYBE_DESIRE_ALIGN, RELAX_FILL_NOP, and RELAX_UNREACHABLE frag types. Check relax_seen. (relax_frag_text_align): Rename to ... (relax_frag_loop_align): ... this function. Assume loops can only be in the first slot of an instruction. (relax_frag_add_nop): Use assemble_nop instead of constructing an OR instruction. Remove call to frag_wane. (relax_frag_narrow): Rename to ... (relax_frag_for_align): ... this function. Extend to handle RELAX_FILL_NOP and RELAX_UNREACHABLE, as well as RELAX_SLOTS with RELAX_NARROW for the first slot. (find_address_of_next_align_frag, bytes_to_stretch): New. (future_alignment_required): Use find_address_of_next_align_frag and bytes_to_stretch. Look ahead to subsequent frags to make smarter alignment decisions. (relax_frag_immed): Add format, slot, and estimate_only parameters. Check if transformations are enabled for b_j_loop_end workaround. Use new xtensa-isa.h functions and handle multislot instructions. Update call to xg_assembly_relax. (md_convert_frag): Handle new RELAX_SLOTS, RELAX_UNREACHABLE, RELAX_MAYBE_UNREACHABLE, RELAX_MAYBE_DESIRE_ALIGN, and RELAX_FILL_NOP frag types. (convert_frag_narrow): Add segP, format and slot parameters. Call convert_frag_immed for branch instructions. Adjust calls to tinsn_from_chars, tinsn_immed_from_frag, and xg_emit_insn_to_buf. Use xg_get_single_size and xg_get_single_format. (convert_frag_fill_nop): New. (convert_frag_immed): Add format and slot parameters. Handle multislot instructions and use new xtensa-isa.h functions. Update calls to tinsn_immed_from_frag and xg_assembly_relax. Check if transformations enabled for b_j_loop_end workaround. Use build_nop instead of assemble_nop. Check is_specific_opcode flag. Check for unreachable frags. Use xg_get_single_size. Handle O_pltrel. (fix_new_exp_in_seg): Remove check for old plt flag. (convert_frag_immed_finish_loop): Update calls to tinsn_from_chars and xtensa_insnbuf_to_chars. Call tinsn_immed_from_frag. Change check for loop opcode to an assertion. Mark all frags up to the end of the loop as not transformable. (get_last_insn_flags, set_last_insn_flags): Use get_subseg_info. (get_subseg_info): New. (xtensa_move_literals): Call xtensa_set_frag_assembly_state. Add null check for dest_seg. (xtensa_switch_to_literal_fragment): Rewrite to handle absolute literals and use xtensa_switch_to_non_abs_literal_fragment otherwise. (xtensa_switch_to_non_abs_literal_fragment): New. (cache_literal_section): Add is_code parameter and pass it through to retrieve_literal_seg. (retrieve_literal_seg): Add is_code parameter and use it to set the flags on the literal section. Handle case where head parameter is 0. (get_frag_is_no_transform, set_frag_is_specific_opcode, set_frag_is_no_transform): New. (xtensa_create_property_segments): Add end_property_function parameter and pass it through to add_xt_block_frags. Call bfd_get_section_flags and skip SEC_DEBUGGING and !SEC_ALLOC sections. (xtensa_create_xproperty_segments, section_has_xproperty): New. (add_xt_block_frags): Add end_property_function parameter and call it if it is non-zero. Call xtensa_frag_flags_init. (xtensa_frag_flags_is_empty, xtensa_frag_flags_init, get_frag_property_flags, frag_flags_to_number, xtensa_frag_flags_combinable, xt_block_aligned_size, xtensa_xt_block_combine, add_xt_prop_frags, init_op_placement_info_table, opcode_fits_format_slot, xg_get_single_size, xg_get_single_format): New. (istack_push): Inline call to tinsn_copy. (tinsn_copy): Delete. (tinsn_has_invalid_symbolic_operands): Handle O_hi16 and O_lo16 and CONST16 opcodes. Handle O_big, O_illegal, and O_absent. (tinsn_has_complex_operands): Handle O_hi16 and O_lo16. (tinsn_to_insnbuf): Use xg_get_single_format and new xtensa-isa.h functions. Handle invisible operands. (tinsn_to_slotbuf): New. (tinsn_check_arguments): Use new xtensa-isa.h functions. (tinsn_from_chars): Add slot parameter. Rewrite using xg_init_vinsn, vinsn_from_chars, and xg_free_vinsn. (tinsn_from_insnbuf): New. (tinsn_immed_from_frag): Add slot parameter and handle multislot instructions. Handle symbol differences. (get_num_stack_text_bytes): Use xg_get_single_size. (xg_init_vinsn, xg_clear_vinsn, vinsn_has_specific_opcodes, xg_free_vinsn, vinsn_to_insnbuf, vinsn_from_chars, expr_is_register, get_expr_register, set_expr_symbol_offset_diff): New. * config/tc-xtensa.h (MAX_SLOTS): Define. (xtensa_relax_statesE): Move from tc-xtensa.c. Add RELAX_CHECK_ALIGN_NEXT_OPCODE, RELAX_MAYBE_DESIRE_ALIGN, RELAX_SLOTS, RELAX_FILL_NOP, RELAX_UNREACHABLE, RELAX_MAYBE_UNREACHABLE, and RELAX_NONE types. (RELAX_IMMED_MAXSTEPS): Move from tc-xtensa.c. (xtensa_frag_type struct): Add is_assembly_state_set, use_absolute_literals, relax_seen, is_unreachable, is_specific_opcode, is_align, is_text_align, alignment, and is_first_loop_insn fields. Replace is_generics and is_relax fields by is_no_transform field. Delete is_text and is_longcalls fields. Change text_expansion and literal_expansion to arrays of MAX_SLOTS entries. Add arrays of per-slot information: literal_frags, slot_subtypes, slot_symbols, slot_sub_symbols, and slot_offsets. Add fr_prev field. (xtensa_fix_data struct): New. (xtensa_symfield_type struct): Delete plt field. (xtensa_block_info struct): Move definition to tc-xtensa.h. Add forward declaration here. (xt_section_type enum): Delete xt_insn_sec. Add xt_prop_sec. (XTENSA_SECTION_RENAME): Undefine. (TC_FIX_TYPE, TC_INIT_FIX_DATA, TC_FORCE_RELOCATION, NO_PSEUDO_DOT, tc_unrecognized_line, md_do_align, md_elf_section_change_hook, HANDLE_ALIGN, TC_LINKRELAX_FIXUP, SUB_SEGMENT_ALIGN): Define. (TC_CONS_FIX_NEW, tc_symbol_new_hook): Delete. (unit_num_copies_func, opcode_num_units_func, opcode_funcUnit_use_unit_func, opcode_funcUnit_use_stage_func): New. (resource_table struct): New. * config/xtensa-istack.h (MAX_INSN_ARGS): Increase from 6 to 10. (TInsn struct): Add keep_wide, loc, fixup, record_fix, subtype, literal_space, symbol, sub_symbol, offset, and literal_frag fields. (tinsn_copy): Delete prototype. (vliw_insn struct): New. * config/xtensa-relax.c (insn_pattern_struct): Add options field. (widen_spec_list): Add option conditions for density and boolean instructions. Add expansions using CONST16 and conditions for using CONST16 vs. L32R. Use new Xtensa LX RSR/WSR syntax. Add entries for predicted branches. (simplify_spec_list): Add option conditions for density instructions. Add entry for NOP instruction. (append_transition): Add cmp function pointer parameter and use it to insert the new entry in order. (operand_function_LOW16U, operand_function_HI16U): New. (xg_has_userdef_op_fn, xg_apply_userdef_op_fn): Handle OP_OPERAND_LOW16U and OP_OPERAND_HI16U. (enter_opname, split_string): Use xstrdup instead of strdup. (init_insn_pattern): Initialize new options field. (clear_req_or_option_list, clear_req_option_list, clone_req_or_option_list, clone_req_option_list, parse_option_cond): New. (parse_insn_pattern): Parse option conditions. (transition_applies): New. (build_transition): Use new xtensa-isa.h functions. Fix incorrectly swapped last arguments in calls to append_constant_value_condition. Call clone_req_option_list. Add warning about invalid opcode. Handle LOW16U and HI16U function names. (build_transition_table): Add cmp parameter and use it in calls to append_transition. Use new xtensa-isa.h functions. Check transition_applies before adding entries. (xg_build_widen_table, xg_build_simplify_table): Add cmp parameter and pass it through to build_transition_table. * config/xtensa-relax.h (ReqOrOptionList, ReqOrOption, ReqOptionList, ReqOption, transition_cmp_fn): New types. (OpType enum): Add OP_OPERAND_LOW16U and OP_OPERAND_HI16U. (transition_rule struct): Add options field. * doc/as.texinfo (Overview): Update Xtensa options. * doc/c-xtensa.texi (Xtensa Options): Delete --[no-]density, --[no-]relax, and --[no-]generics options. Update descriptions of --text-section-literals and --[no-]longcalls. Add --[no-]absolute-literals and --[no-]transform. (Xtensa Syntax): Add description of syntax for FLIX instructions. Remove use of "generic" and "specific" terminology for opcodes. (Xtensa Registers): Generalize the syntax description to include user-defined register files. (Xtensa Automatic Alignment): Update. (Xtensa Branch Relaxation): Mention limitation of unconditional jumps. (Xtensa Call Relaxation): Linker can now remove most of the overhead. (Xtensa Directives): Remove confusing rules about precedence. (Density Directive, Relax Directive): Delete. (Schedule Directive): New. (Generics Directive): Rename to ... (Transform Directive): ... this node. (Literal Directive): Update for absolute literals. Missing literal_position directive is now an error. (Literal Position Directive): Update for absolute literals. (Freeregs Directive): Delete. (Absolute Literals Directive): New. (Frame Directive): Minor editing. * Makefile.am (DEPTC_xtensa_elf, DEPOBJ_xtensa_elf, DEP_xtensa_elf): Update dependencies. * Makefile.in: Regenerate. gas/testsuite ChangeLog * gas/xtensa/all.exp: Adjust expected error message for j_too_far. Change entry_align test to expect an error. * gas/xtensa/entry_misalign2.s: Use no-transform instead of no-generics directives. include ChangeLog * xtensa-config.h (XSHAL_USE_ABSOLUTE_LITERALS, XCHAL_HAVE_PREDICTED_BRANCHES, XCHAL_INST_FETCH_WIDTH): New. (XCHAL_EXTRA_SA_SIZE, XCHAL_EXTRA_SA_ALIGN): Delete. * xtensa-isa-internal.h (ISA_INTERFACE_VERSION): Delete. (config_sturct struct): Delete. (XTENSA_OPERAND_IS_REGISTER, XTENSA_OPERAND_IS_PCRELATIVE, XTENSA_OPERAND_IS_INVISIBLE, XTENSA_OPERAND_IS_UNKNOWN, XTENSA_OPCODE_IS_BRANCH, XTENSA_OPCODE_IS_JUMP, XTENSA_OPCODE_IS_LOOP, XTENSA_OPCODE_IS_CALL, XTENSA_STATE_IS_EXPORTED, XTENSA_INTERFACE_HAS_SIDE_EFFECT): Define. (xtensa_format_encode_fn, xtensa_get_slot_fn, xtensa_set_slot_fn): New. (xtensa_insn_decode_fn): Rename to ... (xtensa_opcode_decode_fn): ... this. (xtensa_immed_decode_fn, xtensa_immed_encode_fn, xtensa_do_reloc_fn, xtensa_undo_reloc_fn): Update. (xtensa_encoding_template_fn): Delete. (xtensa_opcode_encode_fn, xtensa_format_decode_fn, xtensa_length_decode_fn): New. (xtensa_format_internal, xtensa_slot_internal): New types. (xtensa_operand_internal): Delete operand_kind, inout, isPCRelative, get_field, and set_field fields. Add name, field_id, regfile, num_regs, and flags fields. (xtensa_arg_internal): New type. (xtensa_iclass_internal): Change operands field to array of xtensa_arg_internal. Add num_stateOperands, stateOperands, num_interfaceOperands, and interfaceOperands fields. (xtensa_opcode_internal): Delete length, template, and iclass fields. Add iclass_id, flags, encode_fns, num_funcUnit_uses, and funcUnit_uses. (opname_lookup_entry): Delete. (xtensa_regfile_internal, xtensa_interface_internal, xtensa_funcUnit_internal, xtensa_state_internal, xtensa_sysreg_internal, xtensa_lookup_entry): New. (xtensa_isa_internal): Replace opcode_table field with opcodes field. Change type of opname_lookup_table. Delete num_modules, module_opcode_base, module_decode_fn, config, and has_density fields. Add num_formats, formats, format_decode_fn, length_decode_fn, num_slots, slots, num_fields, num_operands, operands, num_iclasses, iclasses, num_regfiles, regfiles, num_states, states, state_lookup_table, num_sysregs, sysregs, sysreg_lookup_table, max_sysreg_num, sysreg_table, num_interfaces, interfaces, interface_lookup_table, num_funcUnits, funcUnits and funcUnit_lookup_table fields. (xtensa_isa_module, xtensa_isa_modules): Delete. (xtensa_isa_name_compare): New prototype. (xtisa_errno, xtisa_error_msg): New. * xtensa-isa.h (XTENSA_ISA_VERSION): Define. (xtensa_isa): Change type. (xtensa_operand): Delete. (xtensa_format, xtensa_regfile, xtensa_state, xtensa_sysreg, xtensa_interface, xtensa_funcUnit, xtensa_isa_status, xtensa_funcUnit_use): New types. (libisa_module_specifier): Delete. (xtensa_isa_errno, xtensa_isa_error_msg): New prototypes. (xtensa_insnbuf_free, xtensa_insnbuf_to_chars, xtensa_insnbuf_from_chars): Update prototypes. (xtensa_load_isa, xtensa_extend_isa, xtensa_default_isa, xtensa_insn_maxlength, xtensa_num_opcodes, xtensa_decode_insn, xtensa_encode_insn, xtensa_insn_length, xtensa_insn_length_from_first_byte, xtensa_num_operands, xtensa_operand_kind, xtensa_encode_result, xtensa_operand_isPCRelative): Delete. (xtensa_isa_init, xtensa_operand_inout, xtensa_operand_get_field, xtensa_operand_set_field, xtensa_operand_encode, xtensa_operand_decode, xtensa_operand_do_reloc, xtensa_operand_undo_reloc): Update prototypes. (xtensa_isa_maxlength, xtensa_isa_length_from_chars, xtensa_isa_num_pipe_stages, xtensa_isa_num_formats, xtensa_isa_num_opcodes, xtensa_isa_num_regfiles, xtensa_isa_num_states, xtensa_isa_num_sysregs, xtensa_isa_num_interfaces, xtensa_isa_num_funcUnits, xtensa_format_name, xtensa_format_lookup, xtensa_format_decode, xtensa_format_encode, xtensa_format_length, xtensa_format_num_slots, xtensa_format_slot_nop_opcode, xtensa_format_get_slot, xtensa_format_set_slot, xtensa_opcode_decode, xtensa_opcode_encode, xtensa_opcode_is_branch, xtensa_opcode_is_jump, xtensa_opcode_is_loop, xtensa_opcode_is_call, xtensa_opcode_num_operands, xtensa_opcode_num_stateOperands, xtensa_opcode_num_interfaceOperands, xtensa_opcode_num_funcUnit_uses, xtensa_opcode_funcUnit_use, xtensa_operand_name, xtensa_operand_is_visible, xtensa_operand_is_register, xtensa_operand_regfile, xtensa_operand_num_regs, xtensa_operand_is_known_reg, xtensa_operand_is_PCrelative, xtensa_stateOperand_state, xtensa_stateOperand_inout, xtensa_interfaceOperand_interface, xtensa_regfile_lookup, xtensa_regfile_lookup_shortname, xtensa_regfile_name, xtensa_regfile_shortname, xtensa_regfile_view_parent, xtensa_regfile_num_bits, xtensa_regfile_num_entries, xtensa_state_lookup, xtensa_state_name, xtensa_state_num_bits, xtensa_state_is_exported, xtensa_sysreg_lookup, xtensa_sysreg_lookup_name, xtensa_sysreg_name, xtensa_sysreg_number, xtensa_sysreg_is_user, xtensa_interface_lookup, xtensa_interface_name, xtensa_interface_num_bits, xtensa_interface_inout, xtensa_interface_has_side_effect, xtensa_funcUnit_lookup, xtensa_funcUnit_name, xtensa_funcUnit_num_copies): New prototypes. * elf/xtensa.h (R_XTENSA_DIFF8, R_XTENSA_DIFF16, R_XTENSA_DIFF32, R_XTENSA_SLOT_OP, R_XTENSA_SLOT_ALT): New relocations. (XTENSA_PROP_SEC_NAME): Define. (property_table_entry): Add flags field. (XTENSA_PROP_, GET_XTENSA_PROP_, SET_XTENSA_PROP_): Define. ld ChangeLog ld.texinfo (Xtensa): Describe new linker relaxation to optimize assembler-generated longcall sequences. Describe new --size-opt option. * emulparams/elf32xtensa.sh (OTHER_SECTIONS): Add .xt.prop section. * emultempl/xtensaelf.em (remove_section, replace_insn_sec_with_prop_sec, replace_instruction_table_sections, elf_xtensa_after_open): New. (OPTION_OPT_SIZEOPT, OPTION_LITERAL_MOVEMENT, OPTION_NO_LITERAL_MOVEMENT): Define. (elf32xtensa_size_opt, elf32xtensa_no_literal_movement): New globals. (PARSE_AND_LIST_LONGOPTS): Add size-opt and [no-]literal-movement. (PARSE_AND_LIST_OPTIONS): Add --size-opt. (PARSE_AND_LIST_ARGS_CASES): Handle OPTION_OPT_SIZEOPT, OPTION_LITERAL_MOVEMENT, and OPTION_NO_LITERAL_MOVEMENT. (LDEMUL_AFTER_OPEN): Set to elf_xtensa_after_open. * scripttempl/elfxtensa.sc: Update with changes from elf.sc. * Makefile.am (eelf32xtensa.c): Update dependencies. * Makefile.in: Regenerate. ld/testsuite ChangeLog * ld-xtensa/lcall1.s: Use .literal directive. * ld-xtensa/lcall2.s: Align function entry. * ld-xtensa/coalesce2.s: Likewise. opcodes ChangeLog * xtensa-dis.c (state_names): Delete. (fetch_data): Use xtensa_isa_maxlength. (print_xtensa_operand): Replace operand parameter with opcode/operand pair. Remove print_sr_name parameter. Use new xtensa-isa.h functions. (print_insn_xtensa): Use new xtensa-isa.h functions. Handle multislot instruction bundles. Use xmalloc instead of malloc.	22 years ago
Nick Clifton	bbac1f2ac7	Replace literal "0"s with NULLs in pointer initializers.	22 years ago
Nick Clifton	48c9f030c9	Add support for CRX co-processor opcodes	22 years ago
Aldy Hernandez	12c64a4e4d	* opcodes/ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs, efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt, efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid, efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz, efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.	22 years ago
Nick Clifton	14127cc4f2	Fixes for the encoding and decoding of the PDP11's SOB instruction	22 years ago
Nick Clifton	0dd132b63c	Apply Paul Brook's patch to implement armv6k instructions	22 years ago
H.J. Lu	3f85e52600	bfd/ 2004-09-17 H.J. Lu <hongjiu.lu@intel.com> * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9. (CONFIG_STATUS_DEPENDENCIES): New. (Makefile): Removed. (config.status): Likewise. * Makefile.in: Regenerated. opcodes/ 2004-09-17 H.J. Lu <hongjiu.lu@intel.com> * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9. (CONFIG_STATUS_DEPENDENCIES): New. (Makefile): Removed. (config.status): Likewise. * Makefile.in: Regenerated.	22 years ago
Alan Modra	8ae854217c	* Makefile.am: Run "make dep-am". * Makefile.in: Regenerate. * aclocal.m4: Regenerate. * configure: Regenerate. * po/POTFILES.in: Regenerate. * po/opcodes.pot: Regenerate.	22 years ago
Andreas Schwab	2444313964	bfd/: * acinclude.m4: Fix spelling of ACX_NONCANONICAL_. aclocal.m4: Rebuild. * configure: Rebuild. opcodes/: * configure: Rebuild.	22 years ago
Alan Modra	2a309db040	opcodes/ * ppc-opc.c (L): Make this field not optional. include/opcode/ * ppc.h (PPC_OPERAND_OPTIONAL): Fix comment.	22 years ago
Nick Clifton	42851540ac	Add LD and GAS testsuites for CRX port. Fix several crx bugs.	22 years ago
Nathanael Nerode	979273e36c	2004-08-30 Nathanael Nerode <neroden@gcc.gnu.org> * configure.in: Autoupdate to autoconf 2.59. * aclocal.m4: Rebuild with aclocal 1.4p6. * configure: Rebuild with autoconf 2.59. * Makefile.in: Rebuild with automake 1.4p6 (picking up bfd changes for autoconf 2.59 on the way). * config.in: Rebuild with autoheader 2.59.	22 years ago
Richard Sandiford	ac28a1cbc6	cpu/ * frv.cpu (cfmovs): Change UNIT attribute to FMALL. opcodes/ * frv-desc.[ch], frv-opc.[ch]: Regenerated. gas/testsuite/ * gas/frv/fr550-pack1.[sd]: New test. * gas/frv/allinsn.exp: Run it.	22 years ago
Michal Ludvig	30d1c83669	Added new instructions for next version of VIA PadLock core.	22 years ago
Alexandre Oliva	0b0ac05912	include/elf/ChangeLog: Introduce SH2a support. 2004-02-18 Corinna Vinschen <vinschen@redhat.com> * sh.h (EF_SH2A_NOFPU): New. 2003-12-01 Michael Snyder <msnyder@redhat.com> * sh.h (EF_SH2A): New. bfd/ChangeLog: Introduce SH2a support. 2004-02-18 Corinna Vinschen <vinschen@redhat.com> * archures.c (bfd_mach_sh2a_nofpu): New. * bfd-in2.h: Rebuilt. * cpu-sh.c (SH2A_NOFPU_NEXT): New. (arch_info_struct): Add sh2a_nofpu. * elf32-sh.c (sh_elf_set_mach_from_flags): Handle sh2a_nofpu. 2003-12-29 DJ Delorie <dj@redhat.com> * reloc.c: Add relocs for sh2a. * bfd-in2.h: Regenerate. * libbfd.hh: Regenerate. 2003-12-01 Michael Snyder <msnyder@redhat.com> * archures.c (bfd_mach_sh2a): New. * bfd-in2.h: Rebuilt. * cpu-sh.c (SH_NEXT, SH2_NEXT, etc.): Change defines to enums. (SH2A_NEXT): New. (arch_info_struct): Add sh2a. * elf32-sh.c (sh_elf_set_mach_from_flags): Handle sh2a. binutils/ChangeLog: * readelf.c (get_machine_flags <EM_SH>): Handle EF_SH2A and EF_SH2A_NOFPU. gas/ChangeLog: Introduce SH2a support. 2004-02-24 Corinna Vinschen <vinschen@redhat.com> * config/tc-sh.c (get_specific): Change arch_sh2a_up to arch_sh2a_nofpu_up. 2004-02-24 Corinna Vinschen <vinschen@redhat.com> * config/tc-sh.c (md_parse_option): Add sh2a-nofpu ISA handling. 2004-02-20 Corinna Vinschen <vinschen@redhat.com> * config/tc-sh.c (sh_elf_final_processing): Move sh2a recognition to end of conditional expression. 2004-02-20 Corinna Vinschen <vinschen@redhat.com> * config/tc-sh.c: Add sh2a-nofpu support. 2003-12-29 DJ Delorie <dj@redhat.com> * tc-sh.c: Add sh2a support. (parse_reg): Add tbr. (parse_at): Support @@(disp,tbr). (get_specific): Support sh2a opcodes. (insert4): New, for 4 byte relocs. (build_Mytes): Support sh2a opcodes. (md_apply_fix3_Mytes): Support sh2a opcodes. 2003-12-02 Michael Snyder <msnyder@redhat.com> * config/tc-sh.c (md_parse_option): Handle sh2a. (sh_elf_final_processing): Ditto. gas/testsuite/ChangeLog: 2003-12-30 DJ Delorie <dj@redhat.com> * gas/sh/sh2a.s: New. * gas/sh/sh2a.d: New. * gas/sh/basic.exp: Add it. opcodes/ChangeLog: Introduce SH2a support. * sh-opc.h (arch_sh2a_base): Renumber. (arch_sh2a_nofpu_base): Remove. (arch_sh_base_mask): Adjust. (arch_opann_mask): New. (arch_sh2a, arch_sh2a_nofpu): Adjust. (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise. (sh_table): Adjust whitespace. 2004-02-24 Corinna Vinschen <vinschen@redhat.com> * sh-opc.h (arch_sh2a_nofpu_up): New. Use instead of arch_sh2a_up in instruction list throughout. (arch_sh2a_up): Redefine to include fpu instruction set. Use instead of arch_sh2a in instruction list throughout. (arch_sh2e_up): Accomodate above changes. (arch_sh2_up): Ditto. 2004-02-20 Corinna Vinschen <vinschen@redhat.com> * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up. 2004-02-18 Corinna Vinschen <vinschen@redhat.com> * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling. * sh-opc.h (arch_sh2a_nofpu): New. (arch_sh2a_up): New, defines sh2a and sh2a_nofpu. (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU instruction. 2004-01-20 DJ Delorie <dj@redhat.com> * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs. 2003-12-29 DJ Delorie <dj@redhat.com> * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up, sh_opcode_info, sh_table): Add sh2a support. (arch_op32): New, to tag 32-bit opcodes. * sh-dis.c (print_insn_sh): Support sh2a opcodes. 2003-12-02 Michael Snyder <msnyder@redhat.com> * sh-opc.h (arch_sh2a): Add. * sh-dis.c (arch_sh2a): Handle. * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.	22 years ago

1 2 3 4 5 ...

754 Commits (e292e67d52fdb624fb22b1f5cdae8e6a48cf6f21)