binutils-gdb

Commit Graph

Author	SHA1	Message	Date
Nick Clifton	84701018a5	PR gas/12296 * arm.h (ARM_AEXT_V7_ARM): Add ARM_EXT_OS. * gas/arm/arch7.s: Add SVC insn. * gas/arm/arch7.d: Add disassembly of SVC insn. * gas/arm/attr-march-armv7.d: Add arch profile tag.	15 years ago
Eric B. Weddington	8cc66334fa	/bfd: 2011-03-22 Eric B. Weddington <eric.weddington@atmel.com> * archures.c: Add AVR XMEGA architecture information. * cpu-avr.c (arch_info_struct): Likewise. * elf32-avr.c (bfd_elf_avr_final_write_processing): Likewise. (elf32_avr_object_p): Likewise. /gas: 2011-03-22 Eric B. Weddington <eric.weddington@atmel.com> * config/tc-avr.c (struct avr_opcodes_s): Add opcode field. (AVR_INSN): Change definition to match. (avr_opcodes): Likewise, change to match. (mcu_types): Add XMEGA architecture names and new XMEGA device names. (md_show_usage): Add XMEGA architecture names. (avr_operand): Add 'E' constraint for DES instruction of XMEGA devices. Add support for SPM Z+ instruction. * doc/c-avr.texi: Add documentation for XMEGA architectures and devices. /include/opcode: 2011-03-22 Eric B. Weddington <eric.weddington@atmel.com> * avr.h (AVR_ISA_SPMX,AVR_ISA_DES,AVR_ISA_M256,AVR_ISA_XMEGA): New instruction set flags. (AVR_INSN): Add new instructions for SPM Z+, DES for XMEGA. /ld: 2011-03-22 Eric B. Weddington <eric.weddington@atmel.com> * Makefile.am (ALL_EMULATION_SOURCES): Add AVR XMEGA architectures. (eavrxmega?.c): Likewise. * configure.tgt (targ_extra_emuls): Likewise. * emulparams/avrxmega1.sh: New file. * emulparams/avrxmega2.sh: Likewise. * emulparams/avrxmega3.sh: Likewise. * emulparams/avrxmega4.sh: Likewise. * emulparams/avrxmega5.sh: Likewise. * emulparams/avrxmega6.sh: Likewise. * emulparams/avrxmega7.sh: Likewise. * emultempl/avrelf.em (avr_elf_${EMULATION_NAME}_before_allocation): Add avrxmega6, avrxmega7 to list of architectures for no stubs. /opcodes: 2011-03-22 Eric B. Weddington <eric.weddington@atmel.com> * avr-dis.c (avr_operand): Add opcode_str parameter. Check for post-increment to support LPM Z+ instruction. Add support for 'E' constraint for DES instruction. (print_insn_avr): Adjust calls to avr_operand. Rename variable.	15 years ago
Maciej W. Rozycki	3eebd5eb03	gas/ * config/tc-mips.c (macro): Handle M_PREF_AB. include/opcode/ * mips.h (M_PREF_AB): New enum value. opcodes/ * mips-opc.c (mips_builtin_opcodes): Add "pref" macro.	15 years ago
Maciej W. Rozycki	89c0d58cff	Swap ChangeLog entries.	15 years ago
Mike Frysinger	26bb3ddd50	gas/opcodes: blackfin: move dsp mac func defines to common header The mmod field is decoded in a few places (gas/opcodes/sim), so move it to a common place to avoid duplication. Signed-off-by: Mike Frysinger <vapier@gentoo.org>	15 years ago
Mike Frysinger	dd76fcb82e	opcodes: blackfin: add multiple inclusion protection Prevent build errors if the header happens to be included multiple times. Signed-off-by: Mike Frysinger <vapier@gentoo.org>	15 years ago
Bernd Schmidt	98d23befa7	gas/ * doc/as.texinfo (Target TIC6X options): Don't mention "-matomic". * doc/c-tic6x.texi (TIC6X Directives): Don't mention ".atomic". (TIC6X Options): Don't mention "-matomic". * config/tc-tic6x.c (OPTION_MATOMIC, OPTION_MNO_ATOMIC): Delete. (md_longopts): Remove corresponding entries. (md_parse_option): Don't handle them. (md_show_usage): Don't document them. (tic6x_atomic): Delete variable. (tic6x_update_features): Always copy tic6x_arch_enable to tic6x_features. (tic6x_arch_enable): Remove references to TIC6X_INSN_ATOMIC. (s_tic6x_atomic, s_tic6x_noatomic): Remove functions. (md_pseudo_table): Remove ".atomic" and ".noatomic". gas/testsuite/ * gas/tic6x/dir-junk.l: Remove tests for .atomic and .noatomic. * gas/tic6x/dir-junk.s: Likewise. * gas/tic6x/insns-c674x-bad.d: Remove test. * gas/tic6x/insns-c674x-bad.l: Likewise. * gas/tic6x/insns-atomic.d: Remove "-matomic" switch. include/opcode/ * tic6x-opcode-table.h (cmtl, ll, sl): Available on C64XP. * tic6x.h (TIC6X_INSN_ATOMIC): Remove.	15 years ago
Dave Anglin	3c853d9313	PR gas/11395 * config/tc-hppa.c (pa_ip): Revert last change. Add variable need_cond to determine whether a 64-bit condition is needed for 'A' and 'S' conditions. Default to 32-bit never condition for logical and unit instructions. Add error message for missing branch on bit condition. * hppa.h (pa_opcodes): Revert last change. Exchange 32 and 64-bit "bb" entries. * hppa-dis.c (compare_cond_64_names): Change never condition to ",*". (add_cond_64_names): Likewise. (logical_cond_64_names): Likewise. (unit_cond_64_names): Likewise.	16 years ago
Dave Anglin	79676006fb	Move ChangeLog entry.	16 years ago
Richard Sandiford	1bec78e97d	include/opcode/ * mips.h: Update commentary after last commit.	16 years ago
Richard Sandiford	9867540240	include/opcode/ 2010-12-14 Mingjie Xing <mingjie.xing@gmail.com> * mips.h (OP__OFFSET_A, OP__OFFSET_B, OP__OFFSET_C) (OP__RZ, OP__FZ, INSN2_M_FP_D, INSN2_WRITE_GPR_Z, INSN2_WRITE_FPR_Z) (INSN2_READ_GPR_Z, INSN2_READ_FPR_Z, INSN2_READ_GPR_D): Define. opcodes/ 2010-12-14 Mingjie Xing <mingjie.xing@gmail.com> mips-opc.c (WR_z, WR_Z, RD_z, RD_Z, RD_d): Define. (mips_builtin_opcodes): Add loongson3a specific instructions. * mips-dis.c (print_insn_args): Handle the new arguments +a\|b\|c\|z\|Z. gas/ 2010-12-14 Mingjie Xing <mingjie.xing@gmail.com> * config/tc-mips.c (insn_uses_reg): Handle the new flags INSN2_READ_FPR_Z, INSN2_READ_GPR_D and INSN2_READ_GPR_Z. (append_insn): Handle delay-slot filling for the new flags. (validate_mips_insn): Handle the new arguments +a\|b\|c\|z\|Z. (mips_ip): Handle the new arguments +a\|b\|c\|z\|Z. gas/testsuite/ 2010-12-14 Mingjie Xing <mingjie.xing@gmail.com> * gas/mips/loongson-3a-2.s, gas/mips/loongson-3a-2.d, gas/mips/loongson-3a-3.s, gas/mips/loongson-3a-3.d: New tests. * gas/mips/mips.exp: Run them.	16 years ago
Richard Sandiford	435b94a4ae	include/opcode/ * mips.h: Fix previous commit.	16 years ago
Nick Clifton	d051516a87	* mips.h (INSN_CHIP_MASK): Update according to INSN_LOONGSON_3A. (INSN_LOONGSON_3A): Clear bit 31. * elfxx-mips.c (mips_set_isa_flags): Move bfd_mach_loongson_3a after bfd_mach_mips_sb1. * config/tc-mips.c (mips_cpu_info_table): Move loongson3a after sb1.	16 years ago
Matthew Gretton-Dann	251665fc5f	PR gas/12198 * gas/config/tc-arm.c (arm_arch_v6m_only): New variable. (aeabi_set_public_attributes): Ensure we only set the Operating System Extension when we are on an M-profile core. * gas/testsuite/gas/arm/pr12198-1.d: New test. * gas/testsuite/gas/arm/pr12918-1.s: Likewise. * gas/testsuite/gas/arm/pr12198-2.d: Likewise. * gas/testsuite/gas/arm/pr12918-2.s: Likewise. * include/opcode/arm.h (ARM_AEXT_V6M_ONLY): New define. (ARM_AEXT_V6M): Rewrite in terms of ARM_AEXT_V6M_ONLY. (ARM_ARCH_V6M_ONLY): New define.	16 years ago
Nick Clifton	fd50354116	bfd/ * archures.c (bfd_mach_mips_loongson_3a): Defined. * bfd-in2.h (bfd_mach_mips_loongson_3a): Defined. * cpu-mips.c (I_loongson_3a): New add. (arch_info_struct): Add loongson_3a. * elfxx-mips.c (_bfd_elf_mips_mach): Add loongson_3a. (mips_set_isa_flags): Add loongson_3a. (mips_mach_extensions): Add loongson_3a in MIPS64 extensions. binutils/ * readelf.c (get_machine_flags): Add loongson-3a. gas/ * config/tc-mips.c (mips_cpu_info_table): Add loongson3a in MIPS 64. * doc/c-mips.texi (MIPS cpu): Add loongson3a. include/ * elf/mips.h (E_MIPS_MACH_LS3A): Defined. * opcode/mips.h (INSN_LOONGSON_3A): Defined. (CPU_LOONGSON_3A): Defined. (OPCODE_IS_MEMBER): Add LOONGSON_3A. opcodes/ * mips-dis.c (mips_arch_choices): Add loongson3a. * mips-opc.c (IL3A): Defined as INSN_LOONGSON_3A. (mips_builtin_opcodes): Modify some instructions' membership from IL2F to IL2F\|IL3A, since these instructions are supported by Loongson_3A.	16 years ago
Alan Modra	4469d2be4b	cgen/ * utils-cgen.scm (gen-attr-accessors): Rename bool attribute to bool_. * cpu/mep.opc (mep_cgen_insn_supported): Ditto. include/opcode/ * cgen.h (CGEN_ATTR, CGEN_ATTR_TYPE): Rename bool attribute to bool_. (CGEN_ATTR_BOOLS, CGEN_ATTR_CGEN_INSN_ALIAS_VALUE): Likewise. opcodes/ * fr30-desc.h: Regenerate. * frv-desc.h: Regenerate. * ip2k-desc.h: Regenerate. * iq2000-desc.h: Regenerate. * lm32-desc.h: Regenerate. * m32c-desc.h: Regenerate. * m32r-desc.h: Regenerate. * mep-desc.h: Regenerate. * mep-opc.c: Regenerate. * mt-desc.h: Regenerate. * openrisc-desc.h: Regenerate. * xc16x-desc.h: Regenerate. * xstormy16-desc.h: Regenerate.	16 years ago
Matthew Gretton-Dann	90ec0d684e	* bfd/bfd-in2.h (BFD_RELOC_ARM_HVC): New enum value. * gas/config/tc-arm.c (arm_ext_virt): New variable. (arm_reg_type): Add REG_TYPE_RNB for banked registers. (reg_entry): Allow registers to be larger than a byte. (reg_alias): Fix type warning. (parse_operands): Parse banked registers when appropriate. (do_mrs): Add support for Virtualization Extensions. (do_hvc): New function. (do_t_mrs): Add support for Virtualization Extensions. (do_t_msr): Likewise. (do_t_hvc): New function. (SPLRBANK): New define. (reg_names): Add banked registers. (insns): Add support for Virtualization Extensions. (md_apply_fixup): Likewise. (arm_cpus): -mcpu=cortex-a15 implies the Virtualization Extensions. (arm_extensions): Add 'virt' extension. (aeabi_set_public_attributes): Add support for Virtualization Extensions. * gas/doc/c-arm.texi: Document 'virt' extension. * gas/testsuite/gas/arm/armv7-a+virt.d: New test. * gas/testsuite/gas/arm/armv7-a+virt.s: Likewise. * gas/testsuite/gas/arm/attr-march-all.d: Update for Virtualization Extensions. * gas/testsuite/gas/arm/attr-march-armv7-a+sec+virt.d: New test. * gas/testsuite/gas/arm/attr-march-armv7-a+virt.d: Likewise. * include/opcode/arm.h (ARM_EXT_VIRT): New define. (ARM_ARCH_V7A_IDIV_MP_SEC): Rename... (ARM_ARCH_V7A_IDIV_MP_SEC_VIRT): ...to this and include Virtualization Extensions. * opcodes/arm-dis.c (arm_opcodes): Add Virtualiztion Extensions support. (thumb32_opcodes): Likewise. (banked_regname): New function. (print_insn_arm): Add Virtualization Extensions support. (print_insn_thumb32): Likewise.	16 years ago
Matthew Gretton-Dann	eea54501f7	* gas/config/tc-arm.c (arm_ext_adiv): New variable. (do_div): New function. (insns): Accept UDIV and SDIV in ARM state. (arm_cpus): The cortex-a15 option has all current v7-A extensions. (arm_extensions): Add 'idiv' extension. (aeabi_set_public_attributes): Update Tag_DIV_use values for the Integer Divide extension. * gas/doc/c-arm.texi: Document the idiv extension. * gas/testsuite/gas/arm/armv7-a+idiv.d: New test. * gas/testsuite/gas/arm/armv7-a+idiv.s: Likewise. * gas/testsuite/gas/arm/attr-march-all.d: Update for Integer divide extension. * gas/testsuite/gas/arm/attr-march-armv7-a+idiv.d: New test. * include/opcode/arm.h (ARM_AEXT_ADIV): New define. (ARM_ARCH_V7A_IDIV_MP_SEC): Likewise. * opcodes/arm-dis.c (arm_opcodes): Support disassembly of UDIV and SDIV in ARM state.	16 years ago
Matthew Gretton-Dann	b2a5fbdc94	* config/tc-arm.c (arm_ext_v6m): New variable. (arm_ext_m): Add support for OS extension. (arm_ext_os): New variable. (do_t_swi): In v6-M ensure we have the OS extension. (arm_cpus): The cortex-m1 and cortex-m0 options have the OS extension by default. (arm_archs): Add armv6s-m. (arm_extensions): Add 'os' extension. (cpu_arch_ver): Add support for v6S-M. * gas/doc/c-arm.texi: Document the OS Extension, and v6-m and v6s-m architecture options. * gas/testsuite/gas/arm/archv6s-m-bad.d: New test. * gas/testsuite/gas/arm/archv6s-m-bad.l: Likewise. * gas/testsuite/gas/arm/archv6s-m.d: Likewise. * gas/testsuite/gas/arm/archv6s-m.s: Likewise. * gas/testsuite/gas/arm/attr-march-armv6-m+os.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv6s-m.d: Likewise. * include/opcode/arm.h (ARM_EXT_OS): New define. (ARM_AEXT_V6SM): Likewise. (ARM_ARCH_V6SM): Likewise.	16 years ago
Matthew Gretton-Dann	60e5ef9f19	* gas/config/tc-arm.c (arm_ext_mp): Add. (do_pld): Update comment. (insns): Add support for pldw. (arm_cpus): Update cortex-a5, cortex-a9, and cortex-a15 to support MP extension. (arm_extensions): Add 'mp' extension. (aeabi_set_public_attributes): Emit correct build attribute when MP extension is enabled. * gas/doc/c-arm.texi: Update for MP extensions. * gas/testsuite/gas/arm/arch7a-mp.d: Add. * gas/testsuite/gas/arm/arch7ar-mp.s: Likewise. * gas/testsuite/gas/arm/arch7r-mp.d: Likewise. * gas/testsuite/gas/arm/armv2-mp-bad.d: Likewise. * gas/testsuite/gas/arm/armv2-mp-bad.l: Likewise. * gas/testsuite/gas/arm/attr-march-all.d: Update for MP extension. * gas/testsuite/gas/arm/attr-march-armv7-a+mp.d: Add. * gas/testsuite/gas/arm/attr-march-armv7-r+mp.d: Likewise. * include/opcode/arm.h (ARM_EXT_MP): Add. (ARM_ARCH_V7A_MP): Likewise. * opcodes/arm-dis.c (arm_opcodes): Add support for pldw. (thumb32_opcodes): Likewise.	16 years ago
Mike Frysinger	73a63ccf2f	opcodes/gas: blackfin: support OUTC debug insn The disassembler has partial (but incomplete/broken) support already for the pseudo debug insn OUTC, so let's fix it up and finish it. And now that the disassembler can handle it, make sure our assembler can output it too. Signed-off-by: Mike Frysinger <vapier@gentoo.org>	16 years ago
Mike Frysinger	ee99860ac0	opcodes: blackfin: strip trailing whitespace	16 years ago
DJ Delorie	f9c7014e9c	[include/opcode] * rx.h (RX_Operand_Type): Add TwoReg. (RX_Opcode_ID): Remove ediv and ediv2. [opcodes] * rx-decode.opc (SRR): New. (rx_decode_opcode): Use it for movbi and movbir. Decode NOP2 (mov r0,r0) and NOP3 (max r0,r0) special cases. * rx-decode.c: Regenerate. [sim/rx] * rx.c (decode_cache_base): New. (id_names): Remove ediv and edivu. (optype_names): Add TwoReg. (maybe_get_mem_page): New. (rx_get_byte): Call it. (get_op): Add TwoReg support. (put_op): Likewise. (PD, PS, PS2, GD, GS, GS2, DSZ, SSZ, S2SZ, US1, US2, OM): "opcode" is a pointer now. (DO_RETURN): New. We use longjmp to return an exception result. (decode_opcode): Make opcode a pointer to the decode cache. Save decoded opcode information and re-use. Call DO_RETURN instead of return throughout. Remove ediv and edivu. * mem.c (ptdc): New. Adds decode cache. (rx_mem_ptr): Support it. (rx_mem_decode_cache): New. * mem.h (enum mem_ptr_action): add MPA_DECODE_CACHE. (rx_mem_decode_cache): Declare. * gdb-if.c (sim_resume): Add decode_opcode's setjmp logic here... * main.c (main): ...and here. Use a fast loop if neither trace nor disassemble is given. * cpu.h (RX_MAKE_STEPPED, RX_MAKE_HIT_BREAK, RX_MAKE_EXITED, RX_MAKE_STOPPED, RX_EXITED, RX_STOPPED): Adjust so that 0 is not a valid code for anything.	16 years ago
DJ Delorie	933786524e	[sim/rx] * README.txt: New. * config.h (CYCLE_ACCURATE, CYCLE_STATS): New. * configure.in (--enable-cycle-accurate, --enable-cycle-stats): New. Default to enabled. * configure: Regenerate. * cpu.h (regs_type): Add cycle tracking info. (reset_pipeline_stats): Declare. (halt_pipeline_stats): Declare. (pipeline_stats): Declare. * main.c (done): Call pipeline_stats(). * mem.h (rx_mem_ptr): Moved to here ... * mem.c (mem_ptr): ... from here. Rename throughout. (mem_put_byte): Move LEDs to Port A. Add Port B to control cycle statistics. Move UART to SCI4. (mem_put_hi): Add TPU 1-2. TPU 1 and 2 count CPU cycles. * reg.c (init_regs): Set Rt reg to -1 (no reg). * rx.c: Add cycle counting and statistics throughout. (rx_get_byte): Optimize for speed. (decode_opcode): Likewise. (reset_pipeline_stats): New. (halt_pipeline_stats): New. (pipeline_stats): New. * trace.c (sim_disasm_one): Print cycle count. [include/opcode] * rx.h (RX_Opcode_ID): Add nop2 and nop3 for statistics.	16 years ago
Nick Clifton	1cd986c585	Add support for v850E2 and v850E2V3	16 years ago
Maciej W. Rozycki	9a2c708887	gas/ * config/tc-mips.c (nops_for_insn_or_target): Replace MIPS16_INSN_BRANCH with MIPS16_INSN_UNCOND_BRANCH and MIPS16_INSN_COND_BRANCH. include/opcode/ * mips.h (MIPS16_INSN_UNCOND_BRANCH): New macro. (MIPS16_INSN_BRANCH): Rename to... (MIPS16_INSN_COND_BRANCH): ... this. opcodes/ * mips-dis.c (print_mips16_insn_arg): Remove branch instruction type and delay slot determination. (print_insn_mips16): Extend branch instruction type and delay slot determination to cover all instructions. * mips16-opc.c (BR): Remove macro. (UBR, CBR): New macros. (mips16_opcodes): Update branch annotation for "b", "beqz", "bnez", "bteqz" and "btnez". Add branch annotation for "jalrc" and "jrc".	16 years ago
Alan Modra	bdc70b4a03	include/opcode/ * ppc.h (PPC_OPCODE_32, PPC_OPCODE_BOOKE64, PPC_OPCODE_CLASSIC): Delete. Renumber other PPC_OPCODE defines. gas/ * config/tc-ppc.c (ppc_set_cpu): Remove old opcode flags. (ppc_setup_opcodes): Likewise. Simplify opcode selection. opcodes/ * ppc-dis.c (ppc_opts, powerpc_init_dialect): Remove old opcode flags. * ppc-opc.c (PPC32, POWER32, COM32, CLASSIC): Delete. (PPC64, MFDEC2): Update. (NON32, NO371): Define. (powerpc_opcode): Update to not use old opcode flags, and avoid -m601 duplicates.	16 years ago
Alan Modra	f2bae120dc	* ppc.h (PPC_OPCODE_COMMON): Expand comment.	16 years ago
Alan Modra	360cfc9c8b	remove maxq-coff port	16 years ago
Alan Modra	e01d869a3b	gas/ * config/tc-ppc.c (md_assemble): Emit APUinfo section for PPC_OPCODE_E500. gas/testsuite/ * gas/ppc/e500.s: Add eieio, mbar and lwsync * gas/ppc/e500.d: Likewise. include/opcode/ * ppc.h (PPC_OPCODE_E500): Define. opcodes/ * ppc-dis.c (ppc_opts): Remove PPC_OPCODE_E500MC from e500 and e500x2. Add PPC_OPCODE_E500 to e500 and e500x2 * ppc-opc.c (powerpc_opcodes): Deprecate all opcodes on EFS which touch floating point regs and are enabled by COM, PPC or PPCCOM. Treat sync as msync on e500. Treat eieio as mbar 1 on e500. Treat lwsync as msync on e500.	16 years ago
Catherine Moore	f79e2745b2	gas/ * config/tc-mips.c (is_opcode_valid): Remove expansionp. (macro_build): Change invocation of is_opcode_valid. (mips_ip): Likewise. gas/testsuite/ * gas/mips/mips-no-jalx.l: Delete. * gas/mips/mips-no-jalx.s: Delete. * gas/mips/mips-jalx-2.d: New. * gas/mips/mips-jalx-2.s: New. * gas/mips/mips.exp (mips-jalx-2): Run new test. (mips-no-jalx): Remove deleted test. include/ * opcode/mips.h (INSN_MIPS16): Remove. opcodes/ * mips-dis.c (mips_arch): Remove INSN_MIPS16. * mips-opc.c (I16): Remove. (mips_builtin_op): Reclassify jalx.	16 years ago
Joseph Myers	2462afa169	gas/testsuite: * gas/tic6x/insns-c674x.s, gas/tic6x/insns-c674x.d: Also test "b .S2 b3". include/opcode: * tic6x-insn-formats.h (s_branch): Correct typo in bitmask.	16 years ago
Nick Clifton	e4e42b45d5	Upgrade header files to use GPLv3	16 years ago
Joseph Myers	40b365969f	bfd: * Makefile.am (ALL_MACHINES): Add cpu-tic6x.lo. (ALL_MACHINES_CFILES): Add cpu-tic6x.c. (BFD32_BACKENDS): Add elf32-tic6x.lo. (BFD32_BACKENDS_CFILES): Add elf32-tic6x.c. * Makefile.in: Regenerate. * archures.c (bfd_arch_tic6x, bfd_tic6x_arch): New. (bfd_archures_list): Update. * config.bfd (tic6x--elf): New. configure.in (bfd_elf32_tic6x_be_vec, bfd_elf32_tic6x_le_vec): New. * configure: Regenerate. * cpu-tic6x.c, elf32-tic6x.c: New. * reloc.c (BFD_RELOC_C6000_PCR_S21, BFD_RELOC_C6000_PCR_S12, BFD_RELOC_C6000_PCR_S10, BFD_RELOC_C6000_PCR_S7, BFD_RELOC_C6000_ABS_S16, BFD_RELOC_C6000_ABS_L16, BFD_RELOC_C6000_ABS_H16, BFD_RELOC_C6000_SBR_U15_B, BFD_RELOC_C6000_SBR_U15_H, BFD_RELOC_C6000_SBR_U15_W, BFD_RELOC_C6000_SBR_S16, BFD_RELOC_C6000_SBR_L16_B, BFD_RELOC_C6000_SBR_L16_H, BFD_RELOC_C6000_SBR_L16_W, BFD_RELOC_C6000_SBR_H16_B, BFD_RELOC_C6000_SBR_H16_H, BFD_RELOC_C6000_SBR_H16_W, BFD_RELOC_C6000_SBR_GOT_U15_W, BFD_RELOC_C6000_SBR_GOT_L16_W, BFD_RELOC_C6000_SBR_GOT_H16_W, BFD_RELOC_C6000_DSBT_INDEX, BFD_RELOC_C6000_PREL31, BFD_RELOC_C6000_COPY, BFD_RELOC_C6000_ALIGN, BFD_RELOC_C6000_FPHEAD, BFD_RELOC_C6000_NOCMP): New. * targets.c (bfd_elf32_tic6x_be_vec, bfd_elf32_tic6x_le_vec): New. (_bfd_target_vector): Update. * bfd-in2.h, libbfd.h: Regenerate. binutils: * MAINTAINERS: Add self as TI C6X maintainer. * NEWS: Add news entry for TI C6X support. * readelf.c: Include elf/tic6x.h. (guess_is_rela): Handle EM_TI_C6000. (dump_relocations): Likewise. (get_tic6x_dynamic_type): New. (get_dynamic_type): Call it. (get_machine_flags): Handle EF_C6000_REL. (get_osabi_name): Handle machine-specific values only for relevant machines. Handle C6X values. (get_tic6x_segment_type): New. (get_segment_type): Call it. (get_tic6x_section_type_name): New. (get_section_type_name): Call it. (is_32bit_abs_reloc, is_16bit_abs_reloc, is_none_reloc): Handle EM_TI_C6000. gas: * Makefile.am (TARGET_CPU_CFILES): Add config/tc-tic6x.c. (TARGET_CPU_HFILES): Add config/tc-tic6x.h. * Makefile.in: Regenerate. * NEWS: Add news entry for TI C6X support. * app.c (do_scrub_chars): Handle "\|\|^" for TI C6X. Handle TC_PREDICATE_START_CHAR and TC_PREDICATE_END_CHAR. Keep spaces in operands if TC_KEEP_OPERAND_SPACES. * configure.tgt (tic6x--): New. * config/tc-ia64.h (TC_PREDICATE_START_CHAR, TC_PREDICATE_END_CHAR): Define. * config/tc-tic6x.c, config/tc-tic6x.h: New. * doc/Makefile.am (CPU_DOCS): Add c-tic6x.texi. * doc/Makefile.in: Regenerate. * doc/all.texi (TIC6X): Define. * doc/as.texinfo: Add TI C6X documentation. Include c-tic6x.texi. * doc/c-tic6x.texi: New. gas/testsuite: * gas/tic6x: New directory and testcases. include: * dis-asm.h (print_insn_tic6x): Declare. include/elf: * common.h (ELFOSABI_C6000_ELFABI, ELFOSABI_C6000_LINUX): Define. * tic6x.h: New. include/opcode: * tic6x-control-registers.h, tic6x-insn-formats.h, tic6x-opcode-table.h, tic6x.h: New. ld: * Makefile.am (ALL_EMULATIONS): Add eelf32_tic6x_be.o and eelf32_tic6x_le.o. (eelf32_tic6x_be.c, eelf32_tic6x_le.c): New. * NEWS: Add news entry for TI C6X support. * configure.tgt (tic6x--): New. * emulparams/elf32_tic6x_be.sh, emulparams/elf32_tic6x_le.sh: New. ld/testsuite: * ld-elf/flags1.d, ld-elf/merge.d: XFAIL for tic6x--. * ld-elf/sec-to-seg.exp: Set B_test_same_seg to 0 for tic6x--. * ld-tic6x: New directory and testcases. opcodes: * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c. * Makefile.in: Regenerate. * configure.in (bfd_tic6x_arch): New. * configure: Regenerate. * disassemble.c (ARCH_tic6x): Define if ARCH_all. (disassembler): Handle TI C6X. * tic6x-dis.c: New.	16 years ago
Nick Clifton	c67a084a24	* config/tc-mips.c (mips_fix_loongson2f, mips_fix_loongson2f_nop, mips_fix_loongson2f_jump): New variables. (md_longopts): Add New options -mfix-loongson2f-nop/jump, -mno-fix-loongson2f-nop/jump. (md_parse_option): Initialize variables via above options. (options): New enums for the above options. (md_begin): Initialize nop_insn from LOONGSON2F_NOP_INSN. (fix_loongson2f, fix_loongson2f_nop, fix_loongson2f_jump): New functions. (append_insn): call fix_loongson2f(). (mips_handle_align): Replace the implicit nops. * config/tc-mips.h (MAX_MEM_FOR_RS_ALIGN_CODE): Modified for the new mips_handle_align(). * doc/c-mips.texi: Document the new options. * gas/mips/loongson-2f-2.s: New test of -mfix-loongson2f-nop. * gas/mips/loongson-2f-2.d: Likewise. * gas/mips/loongson-2f-3.s: New test of -mfix-loongson2f-jump. * gas/mips/loongson-2f-3.d: Likewise. * gas/mips/mips.exp: Run the new tests. * opcode/mips.h (LOONGSON2F_NOP_INSN): New macro.	16 years ago
Alan Modra	466ef64fe3	missed from last commit	16 years ago
H.J. Lu	1319d143a7	Remove argument name. 2010-01-14 H.J. Lu <hongjiu.lu@intel.com> * ia64.h (ia64_find_opcode): Remove argument name. (ia64_find_next_opcode): Likewise. (ia64_dis_opcode): Likewise. (ia64_free_opcode): Likewise. (ia64_find_dependency): Likewise.	16 years ago
Doug Evans	1fbb9298a4	* cgen.h: Include bfd_stdint.h. (CGEN_INSN_LGSINT, CGEN_INSN_LGUINT): New types.	17 years ago
Paul Brook	ada65aa377	2009-11-18 Paul Brook <paul@codesourcery.com> gas/ * config/tc-arm.c (arm_fpus): Add fpv4-sp-d16. (aeabi_set_public_attributes): Correctly mark VFPv3xD. include/opcode/ * arm.h (FPU_VFP_V4_SP_D16, FPU_ARCH_VFP_V4_SP_D16): Define.	17 years ago
Paul Brook	9e3c6df664	2009-11-17 Paul Brook <paul@codesourcery.com> Daniel Jacobowitz <dan@codesourcery.com> gas/ * doc/c-arm.texi: Document .arch armv7e-m. * config/tc-arm.c (arm_ext_v6_dsp, arm_ext_v7m): New. (insns): Put Thumb versions of v5TExP instructions into arm_ext_v5exp also. Move some Thumb variants from arm_ext_v6_notm to arm_ext_v6_dsp. (arm_archs): Add armv7e-m architecture. (aeabi_set_public_attributes): Handle -march=armv7e-m. gas/testsuite/ * gas/arm/attr-march-armv7em.d: New test. * gas/arm/arch7em-bad.d: New test. * gas/arm/arch7em-bad.l: New test. * gas/arm/arch7em.d: New test. * gas/arm/arch7em.s: New test. include/elf/ * arm.h (TAG_CPU_ARCH_V7E_M): Define. include/opcode/ * arm.h (ARM_EXT_V6_DSP): Define. (ARM_AEXT_V6T2, ARM_AEXT_NOTM): Include ARM_EXT_V6_DSP. (ARM_AEXT_V7EM, ARM_ARCH_V7EM): Define. binutils/ * readelf.c (arm_attr_tag_CPU_arch): Add v7E-M. bfd/ * elf32-arm.c (using_thumb_only, arch_has_arm_nop, arch_has_thumb2_nop): Handle TAG_CPU_ARCH_V7E_M. (tag_cpu_arch_combine): Ditto. Correct MAX_TAG_CPU_ARCH test.	17 years ago
DJ Delorie	0d734b5d06	[opcodes] * rx-decode.opc (rx_decode_opcode) (mvtipl): Add. (mvtcp, mvfcp, opecp): Remove. * rx-decode.c: Regenerate. * rx-dis.c (cpen): Remove. [gas] * config/rx-parse.y (MVTIPL): Update bit pattern. (cpen): Remove. [include/opcode] * rx.h (rx_decode_opcode) (mvtipl): Add. (mvtcp, mvfcp, opecp): Remove.	17 years ago
Paul Brook	62f3b8c867	2009-11-02 Paul Brook <paul@codesourcery.com> ld/testsuite/ * ld-arm/arm-elf.exp: Add new attr-merge-vfp tests. * ld-arm/attr-merge-vfp-1.d: New test. * ld-arm/attr-merge-vfp-1r.d: New test. * ld-arm/attr-merge-vfp-2.d: New test. * ld-arm/attr-merge-vfp-2r.d: New test. * ld-arm/attr-merge-vfp-3.d: New test. * ld-arm/attr-merge-vfp-3r.d: New test. * ld-arm/attr-merge-vfp-4.d: New test. * ld-arm/attr-merge-vfp-4r.d: New test. * ld-arm/attr-merge-vfp-5.d: New test. * ld-arm/attr-merge-vfp-5r.d: New test. * ld-arm/attr-merge-vfp-2.s: New test. * ld-arm/attr-merge-vfp-3.s: New test. * ld-arm/attr-merge-vfp-3-d16.s: New test. * ld-arm/attr-merge-vfp-4.s: New test. * ld-arm/attr-merge-vfp-4-d16.s: New test. gas/ * doc/c-arm.texi: Document new -mfpu options. * config/tc-arm.c (fpu_vfp_ext_v3xd, fpu_vfp_fp16, fpu_neon_ext_fma, fpu_vfp_ext_fma): New. (NEON_ENC_TAB): Add vfma, vfms, vfnma and vfnms. (do_vfp_nsyn_fma_fms, do_neon_fmac): New functions. (insns): Move double precision load/store. Split out double precision VFPv3 instrucitons. Add VFPv4 instructions. (arm_fpus): Add VFPv3-FP16, VFPv3xD and VFPv4 variants. (aeabi_set_public_attributes): Set VFPv4 variants gas/testsuite/ * gas/arm/attr-mfpu-vfpv4.d: New test. * gas/arm/attr-mfpu-vfpv4-d16.d: New test. * gas/arm/neon-fma-cov.d: New test. * gas/arm/neon-fma-cov.s: New test. * gas/arm/vfp-fma-inc.s: New test. * gas/arm/vfp-fma-arm.d: New test. * gas/arm/vfp-fma-arm.s: New test. * gas/arm/vfp-fma-thumb.d: New test. * gas/arm/vfp-fma-thumb.s: New test. * gas/arm/vfma1.d: New test. * gas/arm/vfma1.s: New test. * gas/arm/vfpv3xd.d: New test. * gas/arm/vfpv3xd.s: New test. include/opcode/ * arm.h (FPU_VFP_EXT_V3xD, FPU_VFP_EXT_FP16, FPU_NEON_EXT_FMA, FPU_VFP_EXT_FMA, FPU_VFP_V3xD, FPU_VFP_V4D16, FPU_VFP_V4): Define. (FPU_ARCH_VFP_V3D16_FP16, FPU_ARCH_VFP_V3_FP16, FPU_ARCH_VFP_V3xD, FPU_ARCH_VFP_V3xD_FP16, FPU_ARCH_VFP_V4, FPU_ARCH_VFP_V4D16, FPU_ARCH_NEON_VFP_V4): Define. binutils/ * readelf.c (arm_attr_tag_VFP_arch): Add VFPv4 and VFPv4-D16. bfd/ * elf32-arm.c (elf32_arm_merge_eabi_attributes): Handle VFPv4 attributes. opcodes/ * arm-dis.c (coprocessor_opcodes): Update to use new feature flags. Add VFPv4 instructions.	17 years ago
Doug Evans	ac1e9eca70	cpu/ * m32c.opc (opc.h): cgen-types.h -> cgen/basic-modes.h. cgen-ops.h -> cgen/basic-ops.h. include/opcode/ * cgen-bitset.h: Delete, moved to ../cgen/bitset.h. * cgen.h: Update. Improve multi-inclusion macro name. include/cgen/ * basic-modes.h: New file. Moved here from opcodes/cgen-types.h. * basic-ops.h: New file. Moved here from opcodes/cgen-ops.h. * bitset.h: New file. Moved here from ../opcode/cgen-bitset.h. Update license to GPL v3. opcodes/ * cgen-ops.h: Delete, moved to ../include/cgen/basic-ops.h. * cgen-types.h: Delete, moved to ../include/cgen/basic-modes.h. * cgen-bitset.c: Update. * fr30-desc.h: Regenerate. * frv-desc.h: Regenerate. * ip2k-desc.h: Regenerate. * iq2000-desc.h: Regenerate. * lm32-desc.h: Regenerate. * m32c-desc.h: Regenerate. * m32c-opc.h: Regenerate. * m32r-desc.h: Regenerate. * mep-desc.h: Regenerate. * mt-desc.h: Regenerate. * openrisc-desc.h: Regenerate. * xc16x-desc.h: Regenerate. * xstormy16-desc.h: Regenerate.	17 years ago
Peter Bergner	9fe54b1ca1	gas/ * config/tc-ppc.c (md_show_usage): Document -m476. * doc/c-ppc.texi (PowerPC-Opts): Document -m476. gas/testsuite/ * gas/ppc/476.s: New test. * gas/ppc/476.d: Likewise. * gas/ppc/ppc.exp: Run the 476 test. include/opcode/ * ppc.h (PPC_OPCODE_476): Define. opcodes/ * ppc-dis.c (ppc_opts): Add "476" entry. * ppc-opc.c (PPC476): Define. (powerpc_opcodes): Update mnemonics where required for 476.	17 years ago
Peter Bergner	634b50f2a6	gas/ * config/tc-ppc.c (md_show_usage): Rename "ppca2" to "a2". * doc/c-ppc.texi (PowerPC-Opts): Likewise. gas/testsuite/ * gas/ppc/a2.d: Rename "ppca2" to "a2". include/opcode/ * ppc.h (PPC_OPCODE_A2): Rename from PPC_OPCODE_PPCA2. opcodes/ * ppc-opc.c (PPCA2): Use renamed mask PPC_OPCODE_A2. * ppc-dis.c (ppc_opts): Likewise. Rename "ppca2" to "a2".	17 years ago
Nick Clifton	c7927a3c0e	bfd * Makefile.am (ALL_MACHINES): Add cpu-rx.lo. (ALL_MACHINES_CFILES): Add cpu-rx.c. (BFD32_BACKENDS): Add elf32-rx.lo. (BFD32_BACKENDS_CFILES): Add elf32-rx.c. * archures.c (bfd_architecture): Add bfd_arch_rx and bfd_mach_rx. Export bfd_rx_arch. (bfd_archures_list): Add bfd_rx_arch. * config.bfd: Add entry for rx--elf. configure.in: Add entries for bfd_elf32_rx_le_vec and bfd_elf32_rx_be_vec. * reloc.c: Add RX relocations. * targets.c: Add RX target vectors. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rx.c: New file. * elf32-rx.c: New file. binutils * readelf.c: Add support for RX target. * MAINTAINERS: Add DJ and NickC as maintainers for RX. gas * Makefile.am: Add RX target. * configure.in: Likewise. * configure.tgt: Likewise. * read.c (do_repeat_with_expander): New function. * read.h: Provide a prototype for do_repeat_with_expander. * doc/Makefile.am: Add RX target documentation. * doc/all.texi: Likewise. * doc/as.texinfo: Likewise. * Makefile.in: Regenerate. * NEWS: Mention support for RX architecture. * configure: Regenerate. * doc/Makefile.in: Regenerate. * config/rx-defs.h: New file. * config/rx-parse.y: New file. * config/tc-rx.h: New file. * config/tc-rx.c: New file. * doc/c-rx.texi: New file. gas/testsuite * gas/rx: New directory. * gas/rx/: New set of test cases. gas/elf/section2.e-rx: New expected output file. * gas/all/gas.exp: Add support for RX target. * gas/elf/elf.exp: Likewise. * gas/lns/lns.exp: Likewise. * gas/macros/macros.exp: Likewise. include * dis-asm.h: Add prototype for print_insn_rx. include/elf * rx.h: New file. include/opcode * rx.h: New file. ld * Makefile.am: Add rules to build RX emulation. * configure.tgt: Likewise. * NEWS: Mention support for RX architecture. * Makefile.in: Regenerate. * emulparams/elf32rx.sh: New file. * emultempl/rxelf.em: New file. opcodes * Makefile.am: Add RX files. * configure.in: Add support for RX target. * disassemble.c: Likewise. * Makefile.in: Regenerate. * configure: Regenerate. * opc2c.c: New file. * rx-decode.c: New file. * rx-decode.opc: New file. * rx-dis.c: New file.	17 years ago
Alan Modra	b961e85b6e	o * ppc.h (ppc_cpu_t): Typedef to uint64_t.	17 years ago
Ben Elliston	e0d602ecff	gas/ * config/tc-ppc.c (md_show_usage): Document -mpcca2. * doc/c-ppc.texi (PowerPC-Opts): Document -mppca2. gas/testsuite/ * gas/ppc/a2.s: New. * gas/ppc/a2.d: Likewise. * gas/ppc/ppc.exp: Run the a2 dump test. include/opcode/ * ppc.h (PPC_OPCODE_PPCA2): New. opcodes/ * ppc-dis.c (ppc_opts): Add "ppca2" entry. * ppc-opc.c (powerpc_opcodes): Add eratilx, eratsx, eratsx., eratre, wchkall, eratwe, ldawx., mdfcrx., mfdcr. mtdcrx., icswx, icswx., mtdcr., dci, wclrone, wclrall, wclr, erativax, tlbsrx., ici mnemonics. (ERAT_T): New operand. (XWC_MASK): New mask. (XOPL2): New macro. (PPCA2): Define.	17 years ago
Nick Clifton	96d56e9f91	* bfd/coff-arm.c (coff_arm_relocate_section) (record_thumb_to_arm_glue, bfd_arm_process_before_allocation): Change member name class to symbol_class. * bfd/coff-i960.c (coff_i960_relocate_section) Rename variable class to class_val. Change member name class to symbol_class. * bfd/coff-rs6000.c (_bfd_xcoff_swap_aux_in) (_bfd_xcoff_swap_aux_out): Rename arguments class to in_class. * bfd/coff-stgo32.c (adjust_aux_in_post) (adjust_aux_out_pre, adjust_aux_out_post): Rename arguments class to in_class. * bfd/coff64-rs6000.c (_bfd_xcoff64_swap_aux_in) (_bfd_xcoff64_swap_aux_out): Rename arguments class to in_class. * bfd/coffcode.h (coff_pointerize_aux_hook): Rename variable class to n_sclass. * bfd/coffgen.c (coff_write_symbol, coff_pointerize_aux): Rename variables named class to n_sclass. (coff_write_symbols): Rename variable class to sym_class. (bfd_coff_set_symbol_class): Rename argument class to symbol_class. * bfd/cofflink.c (_bfd_coff_link_hash_newfunc) (coff_link_add_symbols, _bfd_coff_link_input_bfd) (_bfd_coff_write_global_sym, _bfd_coff_generic_relocate_section): Update code to use renamed members. * bfd/coffswap.h (coff_swap_aux_in, coff_swap_aux_out): Rename argument class to in_class. * bfd/libcoff-in.h (struct coff_link_hash_entry, struct coff_debug_merge_type) Renamed members class to symbol_class and type_class. * bfd/libcoff.h Regenerated. * bfd/peXXigen.c: (_bfd_XXi_swap_aux_in, _bfd_XXi_swap_aux_out): Rename argument class to in_class. * bfd/pef.c (bfd_pef_parse_imported_symbol): Update code to use renamed members. * bfd/pef.h (struct bfd_pef_imported_symbol): Changed name of member class to symbol_class. * binutils/ieee.c (ieee_read_cxx_misc, ieee_read_cxx_class) (ieee_read_reference): Rename variables named class to cxxclass. * gas/config/tc-arc.c (struct syntax_classes): Rename member class to s_class. (arc_extinst): Rename variable class to s_class. Update code to use renamed members. * gas/config/tc-mips.c (insn_uses_reg): Rename argument class to regclass. * gas/config/tc-ppc.c (ppc_csect, ppc_change_csect, ppc_function) (ppc_tc, ppc_is_toc_sym, ppc_symbol_new_hook, ppc_frob_label) (ppc_fix_adjustable, md_apply_fix): Update code to use renamed members. * gas/config/tc-ppc.h (struct ppc_tc_sy): Change name of member from class to symbol_class. (OBJ_COPY_SYMBOL_ATTRIBUTES): Update code to use renamed members. * gas/config/tc-score.c (s3_adjust_paritybit): Rename argument class to i_class. * gas/config/tc-score7.c (s7_adjust_paritybit): Rename argument class to i_class. * gprof/corefile.c (core_create_function_syms): Rename variable class to cxxclass. * include/coff/ti.h (GET_LNSZ_SIZE, PUT_LNSZ_SIZE): Updated name of class variable to in_class to match changes in function that use this macro. * include/opcode/ia64.h (struct ia64_operand): Renamed member class to op_class * ld/emultempl/elf32.em (gld${EMULATION_NAME}_load_symbols) (gld${EMULATION_NAME}_try_needed): Rename variable class to link_class * opcodes/ia64-dis.c (print_insn_ia64): Update code to use renamed member. * opcodes/m88k-dis.c (m88kdis): Rename variable class to in_class. * opcodes/tic80-opc.c (tic80_symbol_to_value) (tic80_value_to_symbol): Rename argument class to symbol_class.	17 years ago
Nick Clifton	d3ce72d070	Updated sources to avoid using the identifier name "new", which is a keyword in c++. * bfd/aoutx.h (NAME (aout, make_empty_symbol)): Rename variable new to new_symbol. * bfd/coffgen.c (coff_make_empty_symbol) (coff_bfd_make_debug_symbol): Rename variable new to new_symbol. * bfd/cpu-ia64-opc.c (ext_reg, ins_imms_scaled): Rename variable new to new_insn. * bfd/doc/chew.c (newentry, add_intrinsic): Rename variable new to new_d. * bfd/ecoff.c (_bfd_ecoff_make_empty_symbol): Rename variable new to new_symbol. * bfd/elf32-m68k.c (elf_m68k_get_got_entry_type): Rename argument new to new_reloc. * bfd/hash.c (bfd_hash_lookup): Rename variable new to new_string. * bfd/ieee.c (ieee_make_empty_symbol): Rename variable new to new_symbol. * bfd/linker.c (bfd_new_link_order): Rename variable new to new_lo. * bfd/mach-o.c (bfd_mach_o_sizeof_headers): Rename variable new to symbol. * bfd/oasys.c (oasys_make_empty_symbol): Rename variable new to new_symbol_type. * bfd/pdp11.c (NAME (aout, make_empty_symbol)): Rename variable new to new_symbol_type. * bfd/plugin.c (bfd_plugin_make_empty_symbol): Rename variable new to new_symbol. * bfd/rs6000-core.c (CoreHdr, VmInfo): Rename union member new to new_dump. (read_hdr, rs6000coff_core_p) (rs6000coff_core_file_matches_executable_p) (rs6000coff_core_file_failing_command) (rs6000coff_core_file_failing_signal): Updated function to use new union member name. * bfd/som.c (som_make_empty_symbol): Rename variable new to new_symbol_type. * bfd/syms.c (_bfd_generic_make_empty_symbol): Rename variable new to new_symbol. * bfd/tekhex.c (first_phase, tekhex_make_empty_symbol): Rename variable new to new_symbol. * binutils/nlmconv.c (main): Rename variable new to new_name. * gas/config/tc-arm.c (insert_reg_alias): Rename variable new to new_reg. * gas/config/tc-dlx.c (parse_operand): Rename variable new to new_pos. * gas/config/tc-ia64.c (ia64_gen_real_reloc_type): Rename variable new to newr. * gas/config/tc-mcore.c (parse_exp, parse_imm): Rename variable new to new_pointer. * gas/config/tc-microblaze.c (parse_exp, parse_imm, check_got): Change name from new to new_pointer. * gas/config/tc-or32.c (parse_operand): Rename variable new to new_pointer. * gas/config/tc-pdp11.c (md_assemble): Rename variable new to new_pointer. * gas/config/tc-pj.c (alias): Change argument new to new_name. * gas/config/tc-score.c (s3_build_score_ops_hsh): Rename variable new to new_opcode. (s3_build_dependency_insn_hsh) Rename variable new to new_i2n. (s3_convert): Rename variables old and new to r_old and r_new. * gas/config/tc-score7.c (s7_build_score_ops_hsh): Rename variable new to new_opcode. (s7_build_dependency_insn_hsh): Rename variable new to new_i2d. (s7_b32_relax_to_b16, s7_convert_frag): Rename variables old and new to r_old and r_new. * gas/config/tc-sh.c (parse_exp): Rename variable new to new_pointer. * gas/config/tc-sh64.c (shmedia_parse_exp): Rename variable new to new_pointer. * gas/config/tc-tic4x.c (tic4x_operand_parse): Rename variable new to new_pointer. * gas/config/tc-z8k.c (parse_exp): Rename variable new to new_pointer. * gas/listing.c (listing_newline): Rename variable new to new_i. * ld/ldexp.c (exp_intop, exp_bigintop, exp_relop, exp_binop) (exp_trinop, exp_unop, exp_nameop, exp_assop): Rename variable new to new_e. * ld/ldfile.c (ldfile_add_library_path): Rename variable new to new_dirs. (ldfile_add_arch): Rename variable new to new_arch. * ld/ldlang.c (new_statement, lang_final, lang_add_wild) (lang_target, lang_add_fill, lang_add_data, lang_add_assignment) (lang_add_insert): Rename variable new to new_stmt. (new_afile): Added missing cast. (lang_memory_region_lookup): Rename variable new to new_region. (init_os): Rename variable new to new_userdata. (lang_add_section): Rename variable new to new_section. (ldlang_add_undef): Rename variable new to new_undef. (realsymbol): Rename variable new to new_name. * opcodes/z8kgen.c (internal, gas): Rename variable new to new_op. Updated sources to avoid using the identifier name "template", which is a keyword in c++. * bfd/elf32-arm.c (struct stub_def): Rename member template to template_sequence. (arm_build_one_stub, find_stub_size_and_template, arm_size_one_stub, arm_map_one_stub): Rename variable template to template_sequence. * bfd/elfxx-ia64.c (elfNN_ia64_relax_br, elfNN_ia64_relax_brl): Rename variable template to template_val. * gas/config/tc-arm.c (struct asm_cond, struct asm_psr, struct asm_barrier_opt): Change member template to template_name. (md_begin): Update code to reflect new member names. * gas/config/tc-i386.c (struct templates, struct _i386_insn) (match_template, cpu_flags_match, match_reg_size, match_mem_size) (operand_size_match, md_begin, i386_print_statistics, pi) (build_vex_prefix, md_assemble, parse_insn, optimize_imm) (optimize_disp): Updated code to use new names. (parse_insn): Added casts. * gas/config/tc-ia64.c (dot_template, emit_one_bundle): Updated code to use new names. * gas/config/tc-score.c (struct s3_asm_opcode): Renamed member template to template_name. (s3_parse_16_32_inst, s3_parse_48_inst, s3_do_macro_ldst_label, s3_build_score_ops_hsh): Update code to use new names. * gas/config/tc-score7.c (struct s7_asm_opcode): Renamed member template to template_name. (s7_parse_16_32_inst, s7_do_macro_ldst_label, s7_build_score_ops_hsh): Update code to use new names. * gas/config/tc-tic30.c (md_begin, struct tic30_insn) (md_assemble): Update code to use new names. * gas/config/tc-tic54x.c (struct _tic54x_insn, md_begin) (optimize_insn, tic54x_parse_insn, next_line_shows_parallel): Update code to use new names. * include/opcode/tic30.h (template): Rename type template to insn_template. Updated code to use new name. * include/opcode/tic54x.h (template): Rename type template to insn_template. * opcodes/cris-dis.c (bytes_to_skip): Update code to use new name. * opcodes/i386-dis.c (putop): Update code to use new name. * opcodes/i386-gen.c (process_i386_opcodes): Update code to use new name. * opcodes/i386-opc.h (struct template): Rename struct template to insn_template. Update code accordingly. * opcodes/i386-tbl.h (i386_optab): Update type to use new name. * opcodes/ia64-dis.c (print_insn_ia64): Rename variable template to template_val. * opcodes/tic30-dis.c (struct instruction, get_tic30_instruction): Update code to use new name. * opcodes/tic54x-dis.c (has_lkaddr, get_insn_size) (print_parallel_instruction, print_insn_tic54x, tic54x_get_insn): Update code to use new name. * opcodes/tic54x-opc.c (tic54x_unknown_opcode, tic54x_optab): Update type to new name.	17 years ago

1 2 3 4 5 ...

436 Commits (e21e5835b606f4ef1eb42e99bf26a3e43cdf034a)