* ppc-opc.c (insert_bdm): Correct description of "at" branch
hints. Test PPC_OPCODE_POWER4 to determine branch hint flavour.
(extract_bdm, insert_bdp, extract_bdp, valid_bo): Likewise.
(BOFM64, BOFP64, BOTM64, BOFP64): Rename to BOFM4, BOFP4 etc.
(BODNZM64, BODNZP64, BODZM64, BODZP64): Likewise.
(PPCCOM32, PPCCOM64): Delete.
(NOPOWER4, POWER4): Define.
(powerpc_opcodes): Replace occurences of PPCCOM32 with NOPOWER4,
and PPCCOM4 with POWER4 so that "at" style branch hint opcodes
are enabled for power4 rather than ppc64.
* gas/ppc/booke.s (rfci, wrtee, wrteei, mfdcrx, mfdcr, mtdcrx,
mtdcr, msync, dcba, mbar): New BookE tests.
* gas/ppc/booke.d: Update for new BookE tests.
[opcodes/ChangeLog]
* ppc-opc.c (MO): New macro for MO field of mbar instruction.
(powerpc_opcodes): Add rfci, wrtee, wrteei, mfdcrx, mfdcr,
mtdcrx, mtdcr, msync, dcba and mbar as BookE instructions.
* config/tc-ppc.c (md_parse_option): New -m7410, -m7450 and -m7455
flags, equivalent to -m7400. New -maltivec to enable AltiVec
instructions. New -mbook64 and -mbooke/-mbooke32 flags to enable
64-bit and 32-bit BookE support, respectively. Change -m403 and
-m405 to set PPC403 option.
(md_show_usage): Adjust for new options.
* doc/all.texi: Set PPC.
* doc/as.texinfo: Add PPC support and pull in c-ppc.texi.
* doc/c-ppc.texi: New file.
* doc/Makefile.am (CPU_DOCS): Add c-ppc.texi.
* doc/Makefile.in: Regenerate.
[gas/testsuite/ChangeLog]
* gas/ppc/booke.s: New test for Motorola BookE.
* gas/ppc/booke.d: New file.
* gas/ppc/ppc.exp: Test booke.s.
[include/opcode/ChangeLog]
* ppc.h (PPC_OPCODE_BOOKE, PPC_OPCODE_403): New opcode flags for
BookE and PowerPC403 instructions.
[opcodes/ChangeLog]
* ppc-opc.c (insert_de, extract_de, insert_des, extract_des): New
instruction field instruction/extraction functions for new BookE
DE form instructions.
(CT): New macro for CT field in an X form instruction.
(DE, DES, DEO, DE_MASK): New macros for DE/DES fields in DE form
instructions.
(PPC64): Don't include PPC_OPCODE_PPC.
(403): New opcode macro for PPC403 processors.
(BOOKE): New opcode macro for BookE processors.
(bce, bcel, bcea, bcela, bclre, bclrel: New BookE instructions.
(bcctre, bcctrel, be, bel, bea, bela, icbt, icbte, lwzxe): Likewise.
(dcbste, lwzuxe, luxe, dcbfe, lbzxe, lwarxe, lbzuxe): Likewise.
(stwcxe, stwxe, stxe, stwuxe, stuxe, stbxe, dcbtste, stbuxe): Likewise.
(mfapidi, dcbte, lhzxe, lhzuxe, lhaxe, lhauxe, subfe64): Likewise.
(subfeo64, adde64, addeo64, sthxe, sthuxe, subfze64): Likewise.
(subfzeo64, addze64, addzeo64, dcbie, subfme64, subfmeo64): Likewise.
(addme64, addmeo64, stdcxe., mcrxr64, lwbrxe, lfsxe, lfsuxe): Likewise.
(lfdxe, lfduxe, stwbrxe, stfsxe, stfsuxe, stfdxe, dcbae): Likewise.
(stfduxe, tlbivax, tlbivaxe, lhbrxe, ldxe, lduxe, tlbsx): Likewise.
(tlbsxe, sthbrxe, stdxe, stduxe, icbie, stfiwxe, dcbze, lbze): Likewise.
(lbzue, ldue, lhze, lhzue, lhae, lhaue, lwze, lwzue): Likewise.
(stbe, stbue, sthe, sthue, stwe, stwue, lfse, lfsue, lfde): Likewise.
(lfdue, stde, stdue, stfse, stfsue, stfde, stfdue): Likewise.
* ppc-dis.c (print_insn_big_powerpc, print_insn_little_powerpc): Look
for a disassembler option of `booke', `booke32' or `booke64' to enable
BookE support in the disassembler.
(LS): Define.
(insert_ds): Complain if not a multiple of 4.
(XSYNC): Define.
(XSYNC_MASK): Define.
(powerpc_opcodes): Add "slbmte", "lwsync", "ptesync", "slbmfev",
"slbmfee". Modify "sync" to use XSYNC_MASK and LS.
2000-08-30 Mark Hatle <mhatle@mvista.com>
* config/tc-ppc.c (md_parse_option): Recognize -m405.
In src/opcodes/ChangeLog:
2000-08-30 Mark Hatle <mhatle@mvista.com>
* ppc-opc.c Add XTLB macro for a few PPC 4xx extended mnemonics.
(powerpc_opcodes): Add table entries for PPC 405 instructions.
Changed rfci, icbt, mfdcr, dccci, mtdcr, iccci from PPC to PPC403
instructions.
Added extended mnemonic mftbl as defined in the 405GP manual
for all PPCs.
<edelsohn@npac.syr.edu>.
(powerpc_operands): Add operands SPRBAT and SPRG. Split TBR out of
SPR.
(FXM_MASK): Define.
(insert_tbr): New static function.
(extract_tbr): New static function.
(XFXFXM_MASK, XFXM): Define.
(XSPRBAT_MASK, XSPRG_MASK): Define.
(powerpc_opcodes): Add instructions to access special registers by
name. Add mtcr and mftbu.
removed, so don't initialize it. Set the PPC_OPERAND_SIGNED flag
instead. Add new operand SISIGNOPT.
(powerpc_opcodes): For lis, liu, addis, and cau use SISIGNOPT.
Based on patch from David Edelsohn (edelsohn@npac.syr.edu).
* ppc-dis.c (print_insn_powerpc): Check PPC_OPERAND_SIGNED rather
than signedp field.
single number giving a bitmask for the MB and ME fields of an M
form instruction. Change NB to accept 32, and turn it into 0;
also turn 0 into 32 when disassembling. Seperated SH from NB.
(insert_mbe, extract_mbe): New functions.
(insert_nb, extract_nb): New functions.
(SC_MASK): Mask out SA and LK bits.
(powerpc_opcodes): Change "cal" to use RT, D, RA rather than RT,
RA, SI. Change "liu" and "cau" to use UI rather than SI. Mark
"bctr" and "bctrl" as accepted by POWER. Change "rlwimi",
"rlimi", "rlwimi.", "rlimi.", "rlwinm", "rlinm", "rlwinm.",
"rlinm.", "rlmi", "rlmi.", "rlwnm", "rlnm", "rlwnm.", "rlnm." to
use MBE rather than MB. Add "mfmq" and "mtmq" POWER instructions.
(powerpc_macros): Define table of macro definitions.
(powerpc_num_macros): Define.
Nick Clifton
Elena Zannoni
Alan Modra
Matthew Green
Tom Rix
J.T. Conklin
Alexandre Oliva
Geoffrey Keating
Ian Lance Taylor
Richard Henderson
Stan Shebs