binutils-gdb

Commit Graph

Author	SHA1	Message	Date
Mike Frysinger	9c082ca86e	sim: rename common/aclocal.m4 to common/acinclude.m4 Automake likes to dump macros automatically used into the aclocal.m4 file, but the common/aclocal.m4 naming prevents that. So rename it to the more normal "acinclude.m4" so the aclocal tool can work. Signed-off-by: Mike Frysinger <vapier@gentoo.org>	15 years ago
Mike Frysinger	6ffe910a7e	sim: move from common.m4 to SIM_AC_COMMON Now that the sourceware tree generally requires autoconf-2.64, update the sim tree to require that too. This allows us to drop the long standing SIM_AC_COMMON/common.m4 workaround as autoconf 2.64+ seems to work for me. Signed-off-by: Mike Frysinger <vapier@gentoo.org>	15 years ago
Joel Brobecker	dc3cf14f35	Update copyright notices to add year 2010.	17 years ago
Joel Brobecker	35ee6e1e05	* configure.ac: Change license of multi-run.c to GPL version 3. * configure: Regenerate.	19 years ago
Richard Sandiford	d5fb0879a5	sim/mips/ * configure.ac, configure: Revert last patch.	19 years ago
Richard Sandiford	2a2ce21ba2	sim/mips/ * configure.ac (sim_mipsisa3264_configs): New variable. (mipsis32--, mipsisa32r2--, mips64--, mips64r2--): Make every configuration support all four targets, using the triplet to determine the default. configure: Regenerate.	19 years ago
Thiemo Seufer	8b082fb134	[ gas/ChangeLog ] * config/tc-mips.c (mips_set_options, mips_opts, file_ase_dspr2, ISA_SUPPORTS_DSPR2_ASE, MIPS_CPU_ASE_DSPR2): Add DSP R2 ASE support. (macro_build): Add case '2'. (macro): Expand M_BALIGN to nop, packrl.ph or balign. (validate_mips_insn): Add support for balign instruction. (mips_ip): Handle DSP R2 instructions. Support balign instruction. (OPTION_DSPR2, OPTION_NO_DSPR2, OPTION_COMPAT_ARCH_BASE, md_parse_option, mips_after_parse_args): Add -mdspr2 and -mno-dspr2 command line options. (s_mipsset): Add support for .set dspr2 and .set nodspr2 directives. (md_show_usage): Add -mdspr2 and -mno-dspr2 help output. * doc/c-mips.texi, doc/as.texinfo: Document -mdspr2, -mno-dspr2, .set dspr2, .set nodspr2. [ gas/testsuite/ChangeLog ] * gas/mips/mips32-dspr2.s, gas/mips/mips32-dspr2.d: New test for DSP R2. * gas/mips/mips.exp: Run new test. [ include/opcode/Changelog ] * mips.h (OP_SH_BP, OP_MASK_BP): Add support for balign instruction. (INSN_DSPR2): Add flag for DSP R2 instructions. (M_BALIGN): New macro. [ opcodes/ChangeLog ] * mips-dis.c (mips_arch_choices): Add DSP R2 support. (print_insn_args): Add support for balign instruction. * mips-opc.c (D33): New shortcut for DSP R2 instructions. (mips_builtin_opcodes): Add DSP R2 instructions. [ sim/mips/ChangeLog ] * Makefile.in (IGEN_INCLUDE): Add dsp2.igen. * configure.ac (mips-sde-elf, mipsisa32r2--, mipsisa64r2--): Add dsp2 to sim_igen_machine. * configure: Regenerate. * dsp.igen (do_ph_op): Add MUL support when op = 2. (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph. (mulq_rs.ph): Use do_ph_mulq. (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen. * mips.igen: Add dsp2 model and include dsp2.igen. (MFHI, MFLO, MTHI, MTLO): Extend these instructions for for mips32r2, mips64r2, dsp. (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions for mips32r2, mips64r2, dsp2. * dsp2.igen: New file for MIPS DSP REV 2 ASE. [ sim/testsuite/sim/mips/ChangeLog ] * basic.exp: Run the dsp2 test. * utils-dsp.inc (dspckacc_astio, dspck_tsimm): New macro. * mips32-dsp2.s: New test.	19 years ago
Thiemo Seufer	4b5d35eef6	* configure.ac (mips-sde-elf): Move in front of generic machine configuration. * configure: Regenerate.	19 years ago
Thiemo Seufer	3669427c8e	2007-02-17 Thiemo Seufer <ths@mips.com> [ sim/mips/ChangeLog ] * configure.ac (mips-sde-elf, mipsisa32r2--, mipsisa64r2--): Add mdmx to sim_igen_machine. (mipsisa64--): Likewise. Remove dsp. (mipsisa32--): Remove dsp. * configure: Regenerate. [ sim/testsuite/sim/mips/ChangeLog ] * basic.exp: Add case for mips-sde-elf. (mdmxmodels): Run mdmx tests only on mdmx capable configurations.	19 years ago
Thiemo Seufer	109ad08573	* configure.ac: Add mips-sde-elf target. * configure: Regenerate.	19 years ago
Thiemo Seufer	2d2733fc96	* configure.ac (mipsisa32r2--, mipsisa32--): Add smartmips to sim_igen_machine. * configure: Regenerate. * mips.igen (model): Add smartmips. (MADDU): Increment ACX if carry. (do_mult): Clear ACX. (ROR,RORV): Add smartmips. (include): Include smartmips.igen. * sim-main.h (ACX): Set to REGISTERS[89]. * smartmips.igen: New file.	20 years ago
Chao-ying Fu	40a5538e94	* Makefile.in (SIM_OBJS): Add dsp.o. (dsp.o): New dependency. (IGEN_INCLUDE): Add dsp.igen. * configure.ac (mipsisa32r2--, mipsisa32--, mipsisa64r2--, mipsisa64--): Add dsp to sim_igen_machine. * configure: Regenerate. * mips.igen: Add dsp model and include dsp.igen. (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2, because these instructions are extended in DSP ASE. * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of adding 6 DSP accumulator registers and 1 DSP control register. (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX, AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT, DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK, DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK, DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK, DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK, DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6, DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK, DSPCR_CCOND_SMASK): New define. (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators. * dsp.c, dsp.igen: New files for MIPS DSP ASE.	21 years ago
David Ung	b16d63dac6	* mips.igen: New mips16e model and include m16e.igen. (check_u64): Add mips16e tag. * m16e.igen: New file for MIPS16e instructions. * configure.ac (mipsisa32--, mipsisa32r2--, mipsisa64--, mipsisa64r2--): Change sim_gen to M16, add mips16 and mips16e models. * configure: Regenerate.	21 years ago
Chris Demetriou	e70cb6cd9a	2005-05-26 David Ung <davidu@mips.com> * mips.igen (mips32r2, mips64r2): New ISA models. Add new model tags to all instructions which are applicable to the new ISAs. (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from vr.igen. * mips3264r2.igen: New file for MIPS 32/64 revision 2 specific instructions. * vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move to mips.igen. * configure.ac (mipsisa32r2--, mipsisa64r2--): Add new targets. * configure: Regenerate.	21 years ago
Andrew Cagney	35695fd6e5	Index: arm/ChangeLog 2005-01-14 Andrew Cagney <cagney@gnu.org> * configure.ac: Sinclude aclocal.m4 before common.m4. Add explicit call to AC_CONFIG_HEADER. * configure: Regenerate. Index: common/ChangeLog 2005-01-14 Andrew Cagney <cagney@gnu.org> * configure.ac: Replace SIM_AC_COMMON with sinclude of common.m4. Add explicit call to AC_CONFIG_HEADER. * common.m4: Delete call to AC_CONFIG_HEADER, update usage. * configure: Re-generate. Index: d10v/ChangeLog 2005-01-14 Andrew Cagney <cagney@gnu.org> * configure.ac: Sinclude aclocal.m4 before common.m4. Add explicit call to AC_CONFIG_HEADER. * configure: Regenerate. Index: erc32/ChangeLog 2005-01-14 Andrew Cagney <cagney@gnu.org> * configure.ac: Sinclude aclocal.m4 before common.m4. Add explicit call to AC_CONFIG_HEADER. * configure: Regenerate. Index: frv/ChangeLog 2005-01-14 Andrew Cagney <cagney@gnu.org> * configure.ac: Sinclude aclocal.m4 before common.m4. Add explicit call to AC_CONFIG_HEADER. * configure: Regenerate. Index: h8300/ChangeLog 2005-01-14 Andrew Cagney <cagney@gnu.org> * configure.ac: Sinclude aclocal.m4 before common.m4. Add explicit call to AC_CONFIG_HEADER. * configure: Regenerate. Index: m32r/ChangeLog 2005-01-14 Andrew Cagney <cagney@gnu.org> * configure.ac: Sinclude aclocal.m4 before common.m4. Add explicit call to AC_CONFIG_HEADER. * configure: Regenerate. Index: m68hc11/ChangeLog 2005-01-14 Andrew Cagney <cagney@gnu.org> * configure.ac: Sinclude aclocal.m4 before common.m4. Add explicit call to AC_CONFIG_HEADER. * configure: Regenerate. Index: mcore/ChangeLog 2005-01-14 Andrew Cagney <cagney@gnu.org> * configure.ac: Sinclude aclocal.m4 before common.m4. Add explicit call to AC_CONFIG_HEADER. * configure: Regenerate. Index: mips/ChangeLog 2005-01-14 Andrew Cagney <cagney@gnu.org> * configure.ac: Sinclude aclocal.m4 before common.m4. Add explicit call to AC_CONFIG_HEADER. * configure: Regenerate. Index: mn10300/ChangeLog 2005-01-14 Andrew Cagney <cagney@gnu.org> * configure.ac: Sinclude aclocal.m4 before common.m4. Add explicit call to AC_CONFIG_HEADER. * configure: Regenerate. Index: sh/ChangeLog 2005-01-14 Andrew Cagney <cagney@gnu.org> * configure.ac: Sinclude aclocal.m4 before common.m4. Add explicit call to AC_CONFIG_HEADER. * configure: Regenerate. Index: v850/ChangeLog 2005-01-14 Andrew Cagney <cagney@gnu.org> * configure.ac: Sinclude aclocal.m4 before common.m4. Add explicit call to AC_CONFIG_HEADER. * configure: Regenerate.	22 years ago
Andrew Cagney	f05692463c	Index: sh/ChangeLog 2005-01-12 Andrew Cagney <cagney@gnu.org> * configure.ac: Update to use ../common/common.m4. * configure: Re-generate. Index: mn10300/ChangeLog 2005-01-12 Andrew Cagney <cagney@gnu.org> * configure.ac: Update to use ../common/common.m4. * configure: Re-generate. Index: d10v/ChangeLog 2005-01-12 Andrew Cagney <cagney@gnu.org> * configure.ac: Update to use ../common/common.m4. * configure: Re-generate. Index: erc32/ChangeLog 2005-01-12 Andrew Cagney <cagney@gnu.org> * configure.ac: Update to use ../common/common.m4. * configure: Re-generate. Index: frv/ChangeLog 2005-01-12 Andrew Cagney <cagney@gnu.org> * configure.ac: Update to use ../common/common.m4. * configure: Re-generate. Index: h8300/ChangeLog 2005-01-12 Andrew Cagney <cagney@gnu.org> * configure.ac: Update to use ../common/common.m4. * configure: Re-generate. Index: m32r/ChangeLog 2005-01-12 Andrew Cagney <cagney@gnu.org> * configure.ac: Update to use ../common/common.m4. * configure: Re-generate. Index: mcore/ChangeLog 2005-01-12 Andrew Cagney <cagney@gnu.org> * configure.ac: Update to use ../common/common.m4. * configure: Re-generate. Index: mips/ChangeLog 2005-01-12 Andrew Cagney <cagney@gnu.org> * configure.ac: Update to use ../common/common.m4. * configure: Re-generate. Index: v850/ChangeLog 2005-01-12 Andrew Cagney <cagney@gnu.org> * configure.ac: Update to use ../common/common.m4. * configure: Re-generate. Index: common/ChangeLog 2005-01-12 Andrew Cagney <cagney@gnu.org> * common.m4: New file, based on of aclocal.m4. Index: arm/ChangeLog 2005-01-12 Andrew Cagney <cagney@gnu.org> * configure.ac: Update to use ../common/common.m4. * configure: Re-generate.	22 years ago
Andrew Cagney	b702665739	Index: arm/ChangeLog 2005-01-07 Andrew Cagney <cagney@gnu.org> * configure.ac: Rename configure.in, require autoconf 2.59. * configure: Re-generate. Index: ChangeLog 2005-01-07 Andrew Cagney <cagney@gnu.org> * configure.ac: Replace configure.in. Requires autoconf 2.59 and correctly calls AC_CONFIG_SUBDIRS. * configure: Re-generate. Index: common/ChangeLog 2005-01-07 Andrew Cagney <cagney@gnu.org> * configure.ac: Rename configure.in, require autoconf 2.59. * aclocal.m4 (SIM_AC_COMMON): Delete call to AC_CONFIG_AUX_DIR. * configure: Re-generate. Index: d10v/ChangeLog 2005-01-07 Andrew Cagney <cagney@gnu.org> * configure.ac: Rename configure.in, require autoconf 2.59. * configure: Re-generate. Index: erc32/ChangeLog 2005-01-07 Andrew Cagney <cagney@gnu.org> * configure.ac: Rename configure.in, require autoconf 2.59. * configure: Re-generate. Index: frv/ChangeLog 2005-01-07 Andrew Cagney <cagney@gnu.org> * configure.ac: Rename configure.in, require autoconf 2.59. * configure: Re-generate. Index: h8300/ChangeLog 2005-01-07 Andrew Cagney <cagney@gnu.org> * configure.ac: Rename configure.in, require autoconf 2.59. * configure: Re-generate. Index: igen/ChangeLog 2005-01-07 Andrew Cagney <cagney@gnu.org> * configure.ac: Rename configure.in, require autoconf 2.59. * configure: Re-generate. Index: m32r/ChangeLog 2005-01-07 Andrew Cagney <cagney@gnu.org> * configure.ac: Rename configure.in, require autoconf 2.59. * configure: Re-generate. Index: m68hc11/ChangeLog 2005-01-07 Andrew Cagney <cagney@gnu.org> * configure.ac: Rename configure.in, require autoconf 2.59. * configure: Re-generate. Index: mcore/ChangeLog 2005-01-07 Andrew Cagney <cagney@gnu.org> * configure.ac: Rename configure.in, require autoconf 2.59. * configure: Re-generate. Index: mips/ChangeLog 2005-01-07 Andrew Cagney <cagney@gnu.org> * configure.ac: Rename configure.in, require autoconf 2.59. * configure: Re-generate. Index: mn10300/ChangeLog 2005-01-07 Andrew Cagney <cagney@gnu.org> * configure.ac: Rename configure.in, require autoconf 2.59. * configure: Re-generate. Index: ppc/ChangeLog 2005-01-07 Andrew Cagney <cagney@gnu.org> * configure.ac: Rename configure.in, require autoconf 2.59. * configure: Re-generate. Index: sh/ChangeLog 2005-01-07 Andrew Cagney <cagney@gnu.org> * configure.ac: Rename configure.in, require autoconf 2.59. * configure: Re-generate. Index: testsuite/d10v-elf/ChangeLog 2005-01-07 Andrew Cagney <cagney@gnu.org> * configure.ac: Rename configure.in, require autoconf 2.59. * configure: Re-generate. Index: testsuite/frv-elf/ChangeLog 2005-01-07 Andrew Cagney <cagney@gnu.org> * configure.ac: Rename configure.in, require autoconf 2.59. * configure: Re-generate. Index: testsuite/m32r-elf/ChangeLog 2005-01-07 Andrew Cagney <cagney@gnu.org> * configure.ac: Rename configure.in, require autoconf 2.59. * configure: Re-generate. Index: testsuite/mips64el-elf/ChangeLog 2005-01-07 Andrew Cagney <cagney@gnu.org> * configure.ac: Rename configure.in, require autoconf 2.59. * configure: Re-generate. Index: testsuite/ChangeLog 2005-01-07 Andrew Cagney <cagney@gnu.org> * configure.ac: Rename configure.in, require autoconf 2.59. * configure: Re-generate. Index: v850/ChangeLog 2005-01-07 Andrew Cagney <cagney@gnu.org> * configure.ac: Rename configure.in, require autoconf 2.59. * configure: Re-generate.	22 years ago
Chris Demetriou	e5da76ecfd	2004-08-18 Chris Demetriou <cgd@broadcom.com> * configure.in (mipsisa64sb1--): Add mips3d to sim_igen_machine. configure: Regenerate.	22 years ago
Chris Demetriou	139181c8d6	2004-06-25 Chris Demetriou <cgd@broadcom.com> * configure.in (sim_m16_machine): Include mipsIII. * configure: Regenerate.	22 years ago
Chris Demetriou	4c54fc26ed	2003-01-04 Richard Sandiford <rsandifo@redhat.com> Andrew Cagney <ac131313@redhat.com> Gavin Romig-Koch <gavin@redhat.com> Graydon Hoare <graydon@redhat.com> Aldy Hernandez <aldyh@redhat.com> Dave Brolley <brolley@redhat.com> Chris Demetriou <cgd@broadcom.com> * configure.in (mips64vr): Define TARGET_ENABLE_FR to 1. (sim_mach_default): New variable. (mips64vr--, mips64vrel--): New configurations. Add a new simulator generator, MULTI. configure: Regenerate. * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables. (multi-run.o): New dependency. (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables. (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules. (tmp-multi): Combine them. (BUILT_SRC_FROM_MULTI): New variable. Depend on tmp-multi. (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI. (distclean-extra): New rule. * sim-main.h: Include bfd.h. (MIPS_MACH): New macro. * mips.igen (vr4120, vr5400, vr5500): New models. (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add vr5500. vr.igen: Replace with new version.	24 years ago
Chris Demetriou	e6c674b896	2003-01-04 Chris Demetriou <cgd@broadcom.com> * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1). * configure: Regenerate.	24 years ago
Chris Demetriou	e7e8118132	2002-06-14 Chris Demetriou <cgd@broadcom.com> Ed Satterthwaite <ehs@broadcom.com> * mips3d.igen: New file which contains MIPS-3D ASE instructions. * Makefile.in (IGEN_INCLUDE): Add mips3d.igen. * mips.igen: Include mips3d.igen. (mips3d): New model name for MIPS-3D ASE instructions. (CVT.W.fmt): Don't use this instruction for word (source) format instructions. * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32) (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32) (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions. (NR_FRAC_GUARD, IMPLICIT_1): New macros. * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2) (RSquareRoot1, RSquareRoot2): New macros. (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1) (fp_rsqrt2): New functions. * configure.in: Add MIPS-3D support to mipsisa64 simulator. * configure: Regenerate.	24 years ago
Chris Demetriou	7cbea0890e	2002-06-03 Chris Demetriou <cgd@broadcom.com> Ed Satterthwaite <ehs@broadcom.com> * configure.in (mipsisa64sb1--): New target for supporting Broadcom SiByte SB-1 processor configurations. configure: Regenerate. * sb1.igen: New file. * mips.igen: Include sb1.igen. (sb1): New model. * Makefile.in (IGEN_INCLUDE): Add sb1.igen. * mdmx.igen: Add "sb1" model to all appropriate functions and instructions. * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions. (ob_func, ob_acc): Reference the above. (qh_acc): Adjust to keep the same size as ob_acc. * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff) (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.	24 years ago
Chris Demetriou	1e799e28c1	2002-03-12 Chris Demetriou <cgd@broadcom.com> * configure.in (mipsisa32--, mipsisa64--): New targets. * mips.igen (mips32, mips64): New models, add to all instructions and functions as appropriate. (loadstore_ea, check_u64): New variant for model mips64. (check_fmt_p): New variant for models mipsV and mips64, remove mipsV model marking fro other variant. (SLL) Rename to... (SLLa) this. (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions for mips32 and mips64. (DCLO, DCLZ): New instructions for mips64.	24 years ago
Stan Shebs	7a292a7adf	import gdb-19990422 snapshot	27 years ago
Stan Shebs	c906108c21	Initial creation of sourceware repository	27 years ago
Stan Shebs	071ea11e85	Initial creation of sourceware repository	27 years ago
Gavin Romig-Koch	d0d495f601	improve sanitation	28 years ago
Stan Shebs	bd164e2835	Tue Dec 29 16:03:53 1998 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE> * configure.in, configure (mips64vr5--*): Added missing ;; in case statement. (actually a sanitize-cygnus mistake, but Rainer doesn't know that)	28 years ago
Frank Ch. Eigler	14bbac6609	* eCos->devo merge; tx3904 sanitize tags removed 1998-12-29 Frank Ch. Eigler <fche@cygnus.com> * interp.c (sim_open): Allocate jm3904 memory in smaller chunks. (load_word): Call SIM_CORE_SIGNAL hook on error. (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before starting. For exception dispatching, pass PC instead of NULL_CIA. (decode_coproc): Use COP0_BADVADDR to store faulting address. * sim-main.h (COP0_BADVADDR): Define. (SIM_CORE_SIGNAL): Define hook to call mips_core_signal. (SIM_CPU_EXCEPTION): Define hooks to call mips_cpu_exception(). (_sim_cpu): Add exc_* fields to store register value snapshots. * mips.igen (): Replace memory-related SignalException calls with references to SIM_CORE_SIGNAL hook. * dv-tx3904irc.c (tx3904irc_port_event): printf format warning fix. * sim-main.c (*): Minor warning cleanups.	28 years ago
Gavin Romig-Koch	f87366ec28	New 'hack' generator	28 years ago
Gavin Romig-Koch	bff2d36890	5xxx and el	28 years ago
Gavin Romig-Koch	f14397f057	for bfd: * archures.c,bfd-in2.h (bfd_mach_mips4121): New. * cpu-mips.c: Added vr4121. * elf32-mips.c (elf_mips_mach): Same. (_bfd_mips_elf_final_write_processing): Same. for gas: * config/tc-mips.c (mips_4121): New. (md_begin,mips_ip,md_longopts,md_parse_option): Add vr4121. for gcc: * config/mips/mips.c (override_options): Add vr4121. * config/mips/t-vr4xxx (MULTILIB_MATCHES): Same. for include/elf: * mips.h (E_MIPS_MACH_4121): New. for include/opcode: * mips.h (INSN_4121): New. for opcodes: * mips-dis.c (set_mips_isa_type): Add bfd_mach_mips4121. (_print_insn_mips): Same. * mips-opc.c: Add vr4121. for sim/mips: * configure.in,mips.igen,vr.igen: Add vr4121. * configure: Rebuilt.	28 years ago
Gavin Romig-Koch	82aeada70c	* configure.in (mips64vr4xxx): Enable TARGET_ENABLE_FR. Set mips_fpu, and mips_fpu_bitsize. Set sim_gen, and sim_igen_machine. * configure: Rebuild. * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts. * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.	28 years ago
Andrew Cagney	baa1a48801	Explicitly tag vr41/mips16 instructions. Update configure.in/configure.	28 years ago
Andrew Cagney	554eb429e4	gencode.c: Kill, Kill, Kill.... Remove last remenats of old gencode simulator.	28 years ago
Andrew Cagney	57791952b6	Configure mips64vr4100-elf nee mips64vr41* as a 64 bit mips16 igen simulator. Fix problems: All vr.igen instructions are 64 bit.	28 years ago
Andrew Cagney	ee562da4c4	Reconize target mips-tx19-elf	28 years ago
Andrew Cagney	a83d7d870f	Switch mips-lsi-elf mips16 simulator to igen (from gencode).	28 years ago
Andrew Cagney	d1cbd70abb	Add configury for mips-lsi-elf target (32 bit MIPS16). Fix numerous problems with PENDING_* code. In old gencode simulator, don't double tick each cycle. Add BREAK instruction to MIPS16 gencode simulator.	28 years ago
Frank Ch. Eigler	fda83b6795	* MONSTER sky -> devo merge * ChangeLog / ChangeLog.sky entries were merged with original time stamps; a few were moved between the files	28 years ago
Frank Ch. Eigler	36e838d13b	* eCos tx3904sio sim - devo part 2/2 Tue Aug 25 12:49:46 1998 Frank Ch. Eigler <fche@cygnus.com> * dv-tx3904sio.c: New file: tx3904 serial I/O module. * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target. Reorganize target-specific sim-hardware checks. * configure: rebuilt. * interp.c (sim_open): For tx39 target boards, set OPERATING_ENVIRONMENT, add tx3904sio devices. * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading ROM executables. Install dv-sockser into sim-modules list. * dv-tx3904irc.c: Compiler warning clean-up. * dv-tx3904tmr.c: Compiler warning clean-up. Remove particularly frequent hw-trace messages.	28 years ago
Ken Raeburn	3d759c53c9	sanitize-vr5400 -> sanitize-cygnus, for 98r2	28 years ago
Jillian Ye	f915cc9125	configure.in: Add -lXext to mips_extra_libs	28 years ago
Gavin Romig-Koch	55ad270f9a	* configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips parts. * configure: Update.	28 years ago
Frank Ch. Eigler	da040f2a6c	* Early check-in of tx3904 timer sim implementation for ECC. It is not yet properly tested. Thu Jun 4 15:37:33 1998 Frank Ch. Eigler <fche@cygnus.com> * dv-tx3904tmr.c: New file - implements tx3904 timer. * dv-tx3904{irc,cpu}.c: Mild reformatting. * configure.in: Include tx3904tmr in hw_device list. * configure: Rebuilt. * interp.c (sim_open): Instantiate three timer instances. Fix address typo of tx3904irc instance.	28 years ago
Andrew Cagney	df26156d68	Match mipstx39 not mipsttx39.	28 years ago
Andrew Cagney	f872d0d643	Only enable H/W on some mips targets. Move common hw-obj to Make-common Pacify GCC	28 years ago
Frank Ch. Eigler	3fa454e95f	* Monster patch - may destablize MIPS sims for a little while. * Followup patch for SCEI PR 15853 * First check-in of TX3904 interrupt controller devices for ECC. [sanitized] * First implementation of MIPS hardware interrupt emulation. Mon May 18 18:22:42 1998 Frank Ch. Eigler <fche@cygnus.com> * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware modules. Recognize TX39 target with "mipstx39" pattern. configure: Rebuilt. * sim-main.h (): Added many macros defining bits in TX39 control registers. (SignalInterrupt): Send actual PC instead of NULL. (SignalNMIReset): New exception type. interp.c (board): New variable for future use to identify a particular board being simulated. (mips_option_handler,mips_options): Added "--board" option. (interrupt_event): Send actual PC. (sim_open): Make memory layout conditional on board setting. (signal_exception): Initial implementation of hardware interrupt handling. Accept another break instruction variant for simulator exit. (decode_coproc): Implement RFE instruction for TX39. (mips.igen): Decode RFE instruction as such. start-sanitize-tx3904 * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904. * interp.c: Define "jmr3904" and "jmr3904debug" board types and bbegin to implement memory map. * dv-tx3904cpu.c: New file. * dv-tx3904irc.c: New file. end-sanitize-tx3904	28 years ago
Andrew Cagney	1a89994e08	* configure.in (SUBTARGET_R3900): Define for mipstx39 target. Document a replacement.	28 years ago

17 Commits (c28a9f495181d46aa6644c6dfd4e48756ca4a437)