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added-to-binutils
arc-20081103-branchpoint
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arc-sim-20090309
binu_ss_19990502
binu_ss_19990602
binu_ss_19990721
binutils-2_10
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binutils-2_10_1
binutils-2_11
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binutils-2_29_1.1
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binutils-2_32
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binutils-2_34
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binutils-2_37
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binutils-csl-renesas-4_1-6
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binutils-csl-renesas-4_1-9
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w32api-2_2
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${ noResults }
89095 Commits (c1fc2d7ee590f3bc87ee79c36e7216b0b6bb054b)
| Author | SHA1 | Message | Date |
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c1fc2d7ee5 |
ld: aarch64: fix TLS relaxation where TCB_SIZE is used
TCB_SIZE is 2*sizeof(void *), which is 0x10 for lp64, and 0x8 for ilp32. During relaxation, ld goes to do a replace: bl __tls_get_addr => add R0, R0, TCB_SIZE But actual implementation is: bfd_putl32 (0x91004000, contents + rel->r_offset + 4); Which is equivalent of add x0, x0, 0x10. This is wrong for ilp32. The possible fix for it is: bfd_putl32 (0x91000000 | (TCB_SIZE<<10), contents + rel->r_offset + 4); But ilp32 also needs w-registers, so it's simpler to put proper instruction in #if/#else condition. There are 2 such relaxations in elfNN_aarch64_tls_relax(), and so 2 new tests added for ilp32 mode to test it. Yury * bfd/elfnn-aarch64.c: fix TLS relaxations for ilp32 where TCB_SIZE is used. * ld/testsuite/ld-aarch64/aarch64-elf.exp: Add tests for the case. * ld/testsuite/ld-aarch64/tls-relax-ld-le-small-ilp32.d: New file. * ld/testsuite/ld-aarch64/tls-relax-ld-le-tiny-ilp32.d: New file. Signed-off-by: Yury Norov <ynorov@caviumnetworks.com> |
10 years ago |
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7acd51d697 |
Revert "bfd: aarch64: fix word and arrdess size declaration in ilp32 mode"
This reverts commit
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10 years ago |
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98fa61facf |
Revert "ld: aarch64: fix TLS relaxation where TCB_SIZE is used"
This reverts commit
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10 years ago |
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a02c351265 |
bfd: aarch64: fix word and arrdess size declaration in ilp32 mode
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10 years ago |
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6650f7bd18 |
ld: aarch64: fix TLS relaxation where TCB_SIZE is used
TCB_SIZE is 2*sizeof(void *), which is 0x10 for lp64, and 0x8 for ilp32. During relaxation, ld goes to do a replace: bl __tls_get_addr => add R0, R0, TCB_SIZE But actual implementation is: bfd_putl32 (0x91004000, contents + rel->r_offset + 4); Which is equivalent of add x0, x0, 0x10. This is wrong for ilp32. The possible fix for it is: bfd_putl32 (0x91000000 | (TCB_SIZE<<10), contents + rel->r_offset + 4); But ilp32 also needs w-registers, so it's simpler to put proper instruction in #if/#else condition. THere are 2 such relaxations in elfNN_aarch64_tls_relax(), and so 2 new tests added for ilp32 mode to test it. Yury |
10 years ago |
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fc8e0108db |
Automatic date update in version.in
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10 years ago |
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591be3e4a8 |
Add --orphan-handling option.
gold/ PR gold/20749 * options.h (--orphan-handling): New option. (General_options::Orphan_handling): New enum. (General_options::orphan_handling_enum): New method. (General_options::set_orphan_handling_enum): New method. (General_options::orphan_handling_enum_): New data member. * options.cc (General_options::General_options): Initialize new member. (General_options::finalize): Convert --orphan-handling argument to enum. * script-sections.cc (Script_sections::output_section_name): Check it. |
10 years ago |
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03fb64f837 |
Do not use linker script to place static relocation sections.
gold/ PR gold/20522 * layout.cc (Layout::choose_output_section): Add is_reloc parameter. Adjust all callers. Do not use linker script for is_reloc sections. (Layout::layout_reloc): Pass is_reloc == true. * layout.h (Layout::choose_output_section): Add is_reloc parameter. |
10 years ago |
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a6a5175474 |
[Binutils][AARCH64]Remove Cn register for coprocessor CRn, CRm field
The internal CN register representation for coprocessor fields used in aarch64 sys, sysl instructions are removed in this patch. After the change, those fields are represented as immediate. Related checks are added as well. opcodes/ * aarch64-opc.c (aarch64_opnd_qualifiers): New CR value range qualifier. (operand_general_constraint_met_p): Remove case for CP_REG. (aarch64_print_operand): Print CRn, CRm operand using imm field. * aarch64-tbl.h (QL_SYS): Use CR qualifier. (QL_SYSL): Likewise. (aarch64_opcode_table): Change CRn, CRm operand class and type. * aarch64-opc-2.c : Regenerate. * aarch64-asm-2.c : Likewise. * aarch64-dis-2.c : Likewise. include/ * opcode/aarch64.h (aarch64_operand_class): Remove AARCH64_OPND_CLASS_CP_REG. (enum aarch64_opnd): Change AARCH64_OPND_Cn to AARCH64_OPND_CRn, AARCH64_OPND_Cm to AARCH64_OPND_CRm. (aarch64_opnd_qualifier): Define AARCH64_OPND_QLF_CR qualifier. gas/ * config/tc-aarch64.c (AARCH64_REG_TYPES): Remove CN register. (get_reg_expected_msg): Remove CN register case. (parse_operands): rewrite parser for CRn, CRm operand. (reg_names): Remove CN register. * testsuite/gas/aarch64/diagnostic.s: Add a new test case. * testsuite/gas/aarch64/diagnostic.l: Adjust error message. |
10 years ago |
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aa785360cf |
PE linker script improvements.
PR ld/19254 * scripttempl/pe.sc (.fini): KEEP this section. (.gcc_except_table): Likewise. (.pdata): Also accept .pdata*. |
10 years ago |
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963201cf5d |
Fix aarch64 sim bug with adds64, and add testcases for last 3 bug fixes.
sim/aarch64 * simulator.c (NEG, POS): Move before set_flags_for_add64. (set_flags_for_add64): Replace with a modified copy of set_flags_for_sub64. sim/testsuite/sim/aarch64 * testutils.inc (pass): Move .Lpass to start. (fail): Move .Lfail to start. Return 1 instead of 0. (start): Moved .Lpass and .Lfail to here. * adds.s: New. * fstur.s: New. * tbnz.s: New. |
10 years ago |
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9282b95ab7 |
[AArch64] Recognize R_AARCH64_P32_ABS32 as 32-bit relocation in readelf
binutils/ * readelf.c (is_32bit_abs_reloc): Recognize R_AARCH64_P32_ABS32. |
10 years ago |
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971f1d27d2 |
[AArch64] Make LD testcases support ILP32 mode
ld/ * testsuite/ld-aarch64/aarch64-elf.exp (aarch64_choose_lp64_emul): New function. (run_dump_test_lp64): New function which pass LP64 mode options to both assembler and linker when building test binary. (aarch64elftests): Remove eh-frame-merge test. (eh-frame-merge-lp64): Restrict eh-frame-merge test to LP64 only. (run_dump_test): Migrate to run_dump_test_lp64 if the test source was written for LP64 only. * testsuite/ld-aarch64/erratum843419.d: Support ILP32 mode. * testsuite/ld-aarch64/farcall-b-defsym.d: Likewise. * testsuite/ld-aarch64/farcall-b-plt.d: Likewise. * testsuite/ld-aarch64/farcall-b.d: Likewise. * testsuite/ld-aarch64/farcall-bl-defsym.d: Likewise. * testsuite/ld-aarch64/farcall-bl-plt.d: Likewise. * testsuite/ld-aarch64/farcall-bl.d: Likewise. * testsuite/ld-aarch64/ifunc-15.d: Likewise. * testsuite/ld-aarch64/ifunc-16.d: Likewise. * testsuite/ld-aarch64/ifunc-5a-local.d: Likewise. * testsuite/ld-aarch64/ifunc-5a.d: Likewise. * testsuite/ld-aarch64/ifunc-5b-local.d: Likewise. * testsuite/ld-aarch64/ifunc-5b.d: Likewise. * testsuite/ld-aarch64/ifunc-5r-local.d: Likewise. * testsuite/ld-aarch64/ifunc-6a.d: Likewise. * testsuite/ld-aarch64/ifunc-6b.d: Likewise. * testsuite/ld-aarch64/ifunc-7a.d: Likewise. * testsuite/ld-aarch64/ifunc-7b.d: Likewise. * testsuite/ld-aarch64/ifunc-8.d: Likewise. * testsuite/ld-aarch64/limit-b.d: Likewise. * testsuite/ld-aarch64/limit-bl.d: Likewise. |
10 years ago |
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1bec0c8632 |
[AArch64] Make GAS testcases support ILP32 mode
gas/ * gas/testsuite/gas/aarch64/addsub.d: Support ILP32 mode. * gas/testsuite/gas/aarch64/advsimd-across.d: Likewise. * gas/testsuite/gas/aarch64/advsimd-armv8_3.d: Likewise. * gas/testsuite/gas/aarch64/advsimd-fp16.d: Likewise. * gas/testsuite/gas/aarch64/advsimd-misc.d: Likewise. * gas/testsuite/gas/aarch64/advsisd-copy.d: Likewise. * gas/testsuite/gas/aarch64/advsisd-misc.d: Likewise. * gas/testsuite/gas/aarch64/alias.d: Likewise. * gas/testsuite/gas/aarch64/armv8-ras-1.d: Likewise. * gas/testsuite/gas/aarch64/b_1.d: Likewise. * gas/testsuite/gas/aarch64/beq_1.d: Likewise. * gas/testsuite/gas/aarch64/bitfield-dump: Likewise. * gas/testsuite/gas/aarch64/bitfield-no-aliases.d: Likewise. * gas/testsuite/gas/aarch64/codealign.d: Likewise. * gas/testsuite/gas/aarch64/codealign_1.d: Likewise. * gas/testsuite/gas/aarch64/crc32-directive.d: Likewise. * gas/testsuite/gas/aarch64/crc32.d: Likewise. * gas/testsuite/gas/aarch64/crypto-directive.d: Likewise. * gas/testsuite/gas/aarch64/crypto.d: Likewise. * gas/testsuite/gas/aarch64/dwarf.d: Likewise. * gas/testsuite/gas/aarch64/float-fp16.d: Likewise. * gas/testsuite/gas/aarch64/floatdp2.d: Likewise. * gas/testsuite/gas/aarch64/fp-armv8_3.d: Likewise. * gas/testsuite/gas/aarch64/fp-const0-parse.d: Likewise. * gas/testsuite/gas/aarch64/fp_cvt_int.d: Likewise. * gas/testsuite/gas/aarch64/fpmov.d: Likewise. * gas/testsuite/gas/aarch64/inst-directive.d: Likewise. * gas/testsuite/gas/aarch64/ldr_1.d: Likewise. * gas/testsuite/gas/aarch64/ldst-exclusive-armv8_3.d: Likewise. * gas/testsuite/gas/aarch64/ldst-exclusive.d: Likewise. * gas/testsuite/gas/aarch64/ldst-reg-imm-post-ind.d: Likewise. * gas/testsuite/gas/aarch64/ldst-reg-imm-pre-ind.d: Likewise. * gas/testsuite/gas/aarch64/ldst-reg-pair.d: Likewise. * gas/testsuite/gas/aarch64/ldst-reg-reg-offset.d: Likewise. * gas/testsuite/gas/aarch64/ldst-reg-uns-imm.d: Likewise. * gas/testsuite/gas/aarch64/ldst-reg-unscaled-imm.d: Likewise. * gas/testsuite/gas/aarch64/lor-directive.d: Likewise. * gas/testsuite/gas/aarch64/lor.d: Likewise. * gas/testsuite/gas/aarch64/lse-atomic.d: Likewise. * gas/testsuite/gas/aarch64/mapmisc.d: Likewise. * gas/testsuite/gas/aarch64/mov-no-aliases.d: Likewise. * gas/testsuite/gas/aarch64/mov.d: Likewise. * gas/testsuite/gas/aarch64/movi.d: Likewise. * gas/testsuite/gas/aarch64/movw_label.d: Likewise. * gas/testsuite/gas/aarch64/msr.d: Likewise. * gas/testsuite/gas/aarch64/neon-fp-cvt-int.d: Likewise. * gas/testsuite/gas/aarch64/neon-frint.d: Likewise. * gas/testsuite/gas/aarch64/neon-ins.d: Likewise. * gas/testsuite/gas/aarch64/neon-not.d: Likewise. * gas/testsuite/gas/aarch64/neon-vfp-reglist-post.d: Likewise. * gas/testsuite/gas/aarch64/neon-vfp-reglist.d: Likewise. * gas/testsuite/gas/aarch64/no-aliases.d: Likewise. * gas/testsuite/gas/aarch64/optional.d: Likewise. * gas/testsuite/gas/aarch64/pac.d: Likewise. * gas/testsuite/gas/aarch64/pan-directive.d: Likewise. * gas/testsuite/gas/aarch64/pan.d: Likewise. * gas/testsuite/gas/aarch64/rdma-directive.d: Likewise. * gas/testsuite/gas/aarch64/rdma.d: Likewise. * gas/testsuite/gas/aarch64/reloc-dtprel_g0.d: Likewise. * gas/testsuite/gas/aarch64/reloc-dtprel_g0_nc.d: Likewise. * gas/testsuite/gas/aarch64/reloc-dtprel_g1.d: Likewise. * gas/testsuite/gas/aarch64/reloc-dtprel_hi12.d: Likewise. * gas/testsuite/gas/aarch64/reloc-dtprel_lo12-1.d: Likewise. * gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc.d: Likewise. * gas/testsuite/gas/aarch64/reloc-tlsldm-1.d: Likewise. * gas/testsuite/gas/aarch64/reloc-tlsldm-page-1.d: Likewise. * gas/testsuite/gas/aarch64/reloc-tlsldm_lo12_nc-1.d: Likewise. * gas/testsuite/gas/aarch64/shifted.d: Likewise. * gas/testsuite/gas/aarch64/sve.d: Likewise. * gas/testsuite/gas/aarch64/symbol.d: Likewise. * gas/testsuite/gas/aarch64/sysreg-1.d: Likewise. * gas/testsuite/gas/aarch64/sysreg-2.d: Likewise. * gas/testsuite/gas/aarch64/sysreg-3.d: Likewise. * gas/testsuite/gas/aarch64/sysreg.d: Likewise. * gas/testsuite/gas/aarch64/system-2.d: Likewise. * gas/testsuite/gas/aarch64/system-3.d: Likewise. * gas/testsuite/gas/aarch64/system.d: Likewise. * gas/testsuite/gas/aarch64/tbz_1.d: Likewise. * gas/testsuite/gas/aarch64/tlbi_op.d: Likewise. * gas/testsuite/gas/aarch64/tls.d: Likewise. * gas/testsuite/gas/aarch64/uao-directive.d: Likewise. * gas/testsuite/gas/aarch64/uao.d: Likewise. * gas/testsuite/gas/aarch64/virthostext-directive.d: Likewise. * gas/testsuite/gas/aarch64/virthostext.d: Likewise. * gas/testsuite/gas/aarch64/adr_1.d: Restrict test under -mabi=lp64. * gas/testsuite/gas/aarch64/int-insns.d: Likewise. * gas/testsuite/gas/aarch64/programmer-friendly.d: Likewise. * gas/testsuite/gas/aarch64/reloc-data.d: Likewise. * gas/testsuite/gas/aarch64/reloc-dtprel_g1_nc.d: Likewise. * gas/testsuite/gas/aarch64/reloc-dtprel_g2.d: Likewise. * gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst16.d: Likewise. * gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst32.d: Likewise. * gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst64.d: Likewise. * gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst8.d: Likewise. * gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst16.d: Likewise. * gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst32.d: Likewise. * gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst64.d: Likewise. * gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst8.d: Likewise. * gas/testsuite/gas/aarch64/reloc-gotoff_g0_nc.d: Likewise. * gas/testsuite/gas/aarch64/reloc-gotoff_g1.d: Likewise. * gas/testsuite/gas/aarch64/reloc-gottprel_g0_nc.d: Likewise. * gas/testsuite/gas/aarch64/reloc-gottprel_g1.d: Likewise. * gas/testsuite/gas/aarch64/reloc-insn.d: Likewise. * gas/testsuite/gas/aarch64/reloc-tlsdesc_off_g0_nc.d: Likewise. * gas/testsuite/gas/aarch64/reloc-tlsdesc_off_g1.d: Likewise. * gas/testsuite/gas/aarch64/reloc-tlsgd_g0_nc.d: Likewise. * gas/testsuite/gas/aarch64/reloc-tlsgd_g1.d: Likewise. * gas/testsuite/gas/aarch64/tail_padding.d: Likewise. * gas/testsuite/gas/aarch64/tls-desc.d: Likewise. |
10 years ago |
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1336427510 |
Add a 'Past Maintainers' section to the MAINTAINERS file. Retire Mark Mitchell's name to this section.
* MAINTAINERS (Past Maintainers): New section. Move Mark Mitchell's name here. |
10 years ago |
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bfbf34de2f |
When using linker scripts, place linker-generated sections by the output section name.
2016-12-12 Igor Kudrin <ikudrin@accesssoftek.com> Cary Coutant <ccoutant@gmail.com> gold/ PR gold/14676 * script-sections.cc (Output_section_definition::output_section_name): For linker-generated sections, compare with output section name. * testsuite/Makefile.am (script_test_13): New test. * testsuite/Makefile.in: Regenerate. * testsuite/script_test_13.c: New source file. * testsuite/script_test_13.sh: New script. * testsuite/script_test_13.t: New linker script. |
10 years ago |
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d81222d386 |
Fix edge cases in orphan section placement.
There were still some cases I found where orphan section placement was screwy -- where the script has no output section description for either .data or .bss, a .bss orphan section ends up getting placed before the .data section. In addition, if there is an output section description for a data section not named .data (e.g., .rela.dyn), the orphan .bss gets placed before it. This patch cleans that up, by tracking the last allocated section even as we're adding orphans. I've also improved segment layout in the absence of a PHDRS clause. A zero-length NOBITS section will no longer force a new segment when followed by a PROGBITS section. 2016-12-12 Cary Coutant <ccoutant@gmail.com> gold/ * script-sections.cc (Orphan_section_placement::update_last_alloc): New method. (Orphan_section_placement::find_place): Place orphan .data section after either RODATA or TEXT. (Script_sections::place_orphan): Call update_last_alloc for allocated sections. (Script_sections::create_segments): Improve handling of BSS. |
10 years ago |
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75c6202b1d |
Automatic date update in version.in
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10 years ago |
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22b05d33b4 |
Don't add PHDR for objcopy/strip or ld script specifying PHDRS
HPPA64 needs to add a DT_PHDR header for shared libs. That's fine when linking but shouldn't happen for strip/objcopy. Also PHDR must come first so there's no need to look at all program headers. bfd/ * elf64-hppa.c (elf64_hppa_modify_segment_map): Don't add PHDR for objcopy/strip or when a ld script specifies PHDRS. ld/ * testsuite/ld-elf/nobits-1.d: Remove xfail for hppa64. * testsuite/ld-elf/note-1.d: Likewise. * testsuite/ld-elf/note-2.d: Likewise. |
10 years ago |
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6392030005 |
Don't fudge p_vaddr when PHDR in segment
RX does horrible fudges to PT_LOAD p_vaddr, that affect the testsuite and mean the target won't support dynamic objects. The latter probably doesn't matter too much since RX is an embedded target, but it's easy to stop some of the fudges in order to reduce special cases for RX in the testsuite. The changes make sense in isolation too. bfd/ * elf32-rx.c (elf32_rx_modify_program_headers): Don't adjust segments that include the ELF file header or program headers. ld/ * testsuite/ld-elf/flags1.d: Run for RX. * testsuite/ld-scripts/phdrs.exp: Likewise. * testsuite/ld-scripts/pr14962.d: Likewise. * testsuite/ld-scripts/pr14962-2.d: Likewise. |
10 years ago |
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ea0ffd5be2 |
[GOLD] Allow for larger alignment in script_test_15
PowerPC64 aligns .got to a 256 byte boundary. This tends to bump the data segment file size. PR gold/16711 * testsuite/script_test_15a.sh: Allows larger p_filesz. * testsuite/script_test_15b.sh: Likewise. * testsuite/script_test_15c.sh: Likewise. |
10 years ago |
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d32a48b9f2 |
[GOLD] Adjust testcase for PowerPC64
Since the linker created .TOC. symbol is placed at roughly .got+32k, .toc input sections must be placed in or after .got if .toc entries are accessed using 16-bit signed offset relocs. crt1.o contains such a relocation. PR gold/20717 * testsuite/pr20717.t: Add .got output section containing .toc. |
10 years ago |
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88acc2e167 |
Port c++/78252 from GCC
PR c++/78252 * cp-demangle.c (struct d_print_info): Add is_lambda_arg field. (d_print_init): Initialize it. (d_print_comp_inner) <DEMANGLE_COMPONENT_TEMPLATE_PARAM>: Check is_lambda_arg for auto. <DEMANGLE_COMPONENT_REFERENCE, DEMANGLE_COMPONENT_RVALUE_REFERENCE>: Skip smashing check when is_lambda_arg. <DEMANGLE_COMPONENT_LAMBDA>: Increment is_lambda_arg around arg printing. * testsuite/demangle-expected: Add lambda auto mangling cases. |
10 years ago |
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d36cab83a9 |
Remove assert on exec_bfd in cris_delayed_get_disassembler
cris_delayed_get_disassembler has an assert that exec_bfd can't be
NULL, but this assert can be triggered like this,
(gdb) set architecture cris
The target architecture is assumed to be cris
(gdb) disassemble 0x0,+4
Dump of assembler code from 0x0 to 0x4:
0x00000000:
../../binutils-gdb/gdb/cris-tdep.c:3798: internal-error: int cris_delayed_get_disassembler(bfd_vma, disassemble_info*): Assertion `exec_bfd != NULL' failed.
A problem internal to GDB has been detected,
further debugging may prove unreliable.
however, cris_get_disassembler does have code to handle the case that
bfd is NULL,
/* If there's no bfd in sight, we return what is valid as input in all
contexts if fed back to the assembler: disassembly *with* register
prefix. Unfortunately this will be totally wrong for v32. */
if (abfd == NULL)
return print_insn_cris_with_register_prefix;
This patch is to remove this assert.
gdb:
2016-12-12 Yao Qi <yao.qi@linaro.org>
PR tdep/20955
* cris-tdep.c (cris_delayed_get_disassembler): Remove the
assert.
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10 years ago |
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029e9d52de |
Handle memory error in print_insn_rx
Nowadays, memory error in rx disassembly is not handled, so if I start a fresh GDB, and disassemble, (gdb) set architecture rx The target architecture is assumed to be rx (gdb) disassemble 0x0,+4 Dump of assembler code from 0x0 to 0x4: 0x00000000: brk 0x00000001: brk 0x00000002: brk 0x00000003: brk the output is wrong. This patch adds code to call dis->memory_error_func on memory error, and longjmp to print_insn_rx. With this patch applied, (gdb) set architecture rx The target architecture is assumed to be rx (gdb) disassemble 0,+4 Dump of assembler code from 0x0 to 0x4: 0x00000000: Cannot access memory at address 0x0 opcodes: 2016-12-12 Yao Qi <yao.qi@linaro.org> * rx-dis.c: Include <setjmp.h> (struct private): New. (rx_get_byte): Check return value of read_memory_func, and call memory_error_func and OPCODES_SIGLONGJMP on error. (print_insn_rx): Call OPCODES_SIGSETJMP. |
10 years ago |
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3a0b8f7ddb |
Handle memory error in print_insn_rl78_common
Nowadays, memory error in rl78 disassembly is not handled, so if I start a fresh GDB, and disassemble, (gdb) set architecture rl78 The target architecture is assumed to be rl78 (gdb) disassemble 0x0,+4 Dump of assembler code from 0x0 to 0x4: 0x00000000: nop 0x00000001: nop 0x00000002: nop 0x00000003: nop the output is wrong. This patch adds code to call dis->memory_error_func on memory error, and longjmp to print_insn_rl78_common. With this patch applied, (gdb) set architecture rl78 The target architecture is assumed to be rl78 (gdb) disassemble 0,+4 Dump of assembler code from 0x0 to 0x4: 0x00000000: Cannot access memory at address 0x0 opcodes: 2016-12-12 Yao Qi <yao.qi@linaro.org> * rl78-dis.c: Include <setjmp.h>. (struct private): New. (rl78_get_byte): Check return value of read_memory_func, and call memory_error_func and OPCODES_SIGLONGJMP on error. (print_insn_rl78_common): Call OPCODES_SIGJMP. |
10 years ago |
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cc90de4973 |
Fix earlier ChangeLog entry to give Igor credit, add testcases.
2016-12-01 Cary Coutant <ccoutant@gmail.com> Igor Kudrin <ikudrin@accesssoftek.com> PR gold/20717 * script-sections.cc (Script_sections): Set *keep to false when no match. 2016-12-11 Igor Kudrin <ikudrin@accesssoftek.com> PR gold/20717 * testsuite/Makefile.am (pr20717): New test. * testsuite/Makefile.in: Regenerate. * testsuite/pr20717.c: New test source file. * testsuite/pr20717.sh: New test script. * testsuite/pr20717.t: New test linker script. |
10 years ago |
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5d9f66cb84 |
Fix problems with bss handling in linker scripts.
PR 16711 noted that gold allocates file space for BSS sections when using a linker script. I've fixed that by rewriting set_section_addresses and set_section_list_addresses to track the file offset separate from the current virtual address, so that BSS sections do not move the file offset. Now, if a series of BSS sections come at the end of a segment, we do not allocate file space; but if a script forces them into the middle of a segment, we will still allocate file space (matching Gnu ld behavior). I've also added a warning when that happens. That exposed another problem where orphan .bss sections were sometimes placed in the middle of a segment. For example, if the script mentions the .got section, but both .data and .bss are orphans, gold would put both .data and .bss in front of .got. I've fixed that by ensuring that orphan BSS sections are always placed after all other allocated sections. It also exposed a problem where the SUBALIGN property is not handled properly. The ld manual clearly states that it should override input section alignment, whether greater or less than the given alignment, but gold would only increase an input section's alignment. Gold would also place the output section based on its original alignment before the SUBALIGN property took effect, leading to a misaligned output section (where the input section was properly aligned in memory, but was not aligned relative to the start of the section), in violation of the ELF/gABI spec. I've fixed that by making sure that the SUBALIGN property overrides the internal alignment of the input sections as well as the external alignment of the output section. This affected the behavior of script_test_2, which was written to expect a misaligned section. The net effect is, I think, improved compatibility with the BFD linker. There are still cases where orphan placement differs, but the differences should be rarer and less important. ALIGN and SUBALIGN behavior is closer, but still not an exact match -- I still found cases where ld would create a misaligned output section, and where gold will properly align it. gold/ PR gold/16711 * output.cc (Output_section::set_final_data_size): Calculate data size based on relative offset rather than file offset. (Output_segment::set_section_addresses): Track file offset separately from address offset. (Output_segment::set_section_list_addresses): Add pfoff parameter. Track file offset separately. Don't move file offset for BSS sections. * output.h (Output_segment::set_section_list_addresses): Add pfoff parameter. * script-sections.cc (Orphan_section_placement): Add PLACE_LAST_ALLOC. (Orphan_section_placement::Orphan_section_placement): Initialize it. (Orphan_section_placement::output_section_init): Track last allocated section. (Orphan_section_placement::find_place): Place BSS after last allocated section. (Output_section_element_input::set_section_addresses): Always override input section alignment when SUBALIGN is specified. (Output_section_definition::set_section_addresses): Override alignment of output section when SUBALIGN is specified. * testsuite/Makefile.am (script_test_15a, script_test_15b) (script_test_15c): New test cases. * testsuite/Makefile.in: Regenerate. * testsuite/script_test_2.cc: Adjust expected layout. * testsuite/script_test_15.c: New source file. * testsuite/script_test_15a.sh: New shell script. * testsuite/script_test_15a.t: New linker script. * testsuite/script_test_15b.sh: New shell script. * testsuite/script_test_15b.t: New linker script. * testsuite/script_test_15c.sh: New shell script. * testsuite/script_test_15c.t: New linker script. |
10 years ago |
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e83563a9ed |
Regenerate Makefile.in to get rid of annoying diffs caused by non-deterministic automake.
* Makefile.in: Regenerate. |
10 years ago |
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98fdf25a43 |
Automatic date update in version.in
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10 years ago |
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ec6f610ffc |
Automatic date update in version.in
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10 years ago |
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4783ebbcfa |
Automatic date update in version.in
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10 years ago |
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64c1118340 |
MIPS16: Remove unused `>' operand code
This code has never been used throughout the repository history, and likely not before either, as due to the assymetry of MIPS16 instruction set encoding there are no 32-bit shift operations having their immediate shift count placed in the position of the usual `rx' instruction field. gas/ * config/tc-mips.c (mips16_macro_build) <'>'>: Remove case. include/ * opcode/mips.h: Remove references to `>' operand code. opcodes/ * mips16-opc.c (decode_mips16_operand) <'>'>: Remove cases. |
10 years ago |
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f17ecb4bac |
MIPS16/opcodes: Use hexadecimal interpretation for the `e' operand code
Make the `e' operand code used with raw EXTEND instructions use the hexadecimal rather than decimal format, for consistency with what is actually produced by code in `print_insn_mips16' dedicated to EXTEND disassembly. Due to that special handling the operand code is only interpreted for assembly however, which accepts either format either way, so there is no functional change here. opcodes/ * mips16-opc.c (decode_mips16_operand) <'e'>: Use HINT rather than UINT. gas/ * testsuite/gas/mips/mips16-extend.d: New test. * testsuite/gas/mips/mips16-extend.s: New test source. * testsuite/gas/mips/mips.exp: Run the new test. |
10 years ago |
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55af478400 |
MIPS16/opcodes: Reformat raw EXTEND and undecoded output
Use a tab rather than a space to separate `extend' and its uninterpreted argument output, like with regular instructions. Separate hexadecimal halves of undecoded extended instructions output with a space instead of presenting them concatenated. opcodes/ * mips-dis.c (print_insn_mips16): Use a tab rather than a space to separate `extend' and its uninterpreted argument output. Separate hexadecimal halves of undecoded extended instructions output. binutils/ * testsuite/binutils-all/mips/mips16-extend-noinsn.d: New test. * testsuite/binutils-all/mips/mips16-extend-noinsn.s: New test source. * testsuite/binutils-all/mips/mips.exp: Run the new test. |
10 years ago |
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1736a7bd96 |
gdb: Remove support for obsolete OSABIs and a.out
gdb/ChangeLog: 2016-12-09 Pedro Alves <palves@redhat.com> * Makefile.in (ALL_TARGET_OBS): Remove vax-obsd-tdep.o. * alpha-fbsd-tdep.c (_initialize_alphafbsd_tdep): Adjust. * alpha-nbsd-tdep.c: Move comment to _initialize_alphanbsd_tdep. (alphanbsd_core_osabi_sniffer): Delete. (_initialize_alphanbsd_tdep): No longer handle a.out. * alpha-obsd-tdep.c (_initialize_alphaobsd_tdep): Adjust. * amd64-fbsd-tdep.c (_initialize_amd64fbsd_tdep): Adjust. * amd64-nbsd-tdep.c (_initialize_amd64nbsd_tdep): Adjust. * amd64-obsd-tdep.c (amd64obsd_supply_regset) (amd64obsd_combined_regset) (amd64obsd_iterate_over_regset_sections, amd64obsd_core_init_abi): Delete. (_initialize_amd64obsd_tdep): Don't handle a.out. * arm-nbsd-nat.c (struct md_core, fetch_core_registers) (arm_netbsd_core_fns): Delete. (_initialize_arm_netbsd_nat): Don't register arm_netbsd_core_fns. * arm-nbsd-tdep.c (arm_netbsd_aout_init_abi) (arm_netbsd_aout_osabi_sniffer): Delete. (_initialize_arm_netbsd_tdep): Don't handle a.out. * arm-obsd-tdep.c (armobsd_core_osabi_sniffer): Delete. (_initialize_armobsd_tdep): Don't handle a.out. * arm-tdep.c (arm_gdbarch_init): Remove bfd_target_aout_flavour case. * breakpoint.c (disable_breakpoints_in_unloaded_shlib): Remove SunOS a.out handling. * configure.tgt (vax-*-netbsd* | vax-*-knetbsd*-gnu): Remove vax-obsd-tdep.o from gdb_target_objs. (vax-*-openbsd*): Likewise. (*-*-freebsd*): Adjust default gdb_osabi. (*-*-openbsd*): Likewise. * dbxread.c (block_address_function_relative): Delete. (dbx_symfile_read): Remove reference to block_address_function_relative. (dbx_symfile_read): Don't call read_dbx_dynamic_symtab. (read_dbx_dynamic_symtab): Delete. (process_one_symbol): Remove references to block_address_function_relative. * defs.h (GDB_OSABI_FREEBSD_AOUT, GDB_OSABI_NETBSD_AOUT): Remove. (GDB_OSABI_FREEBSD_ELF): Rename to ... (GDB_OSABI_FREEBSD): ... this. (GDB_OSABI_NETBSD_ELF): Rename to ... (GDB_OSABI_NETBSD): ... this. (GDB_OSABI_OPENBSD_ELF): Rename to ... (GDB_OSABI_OPENBSD): ... this. (GDB_OSABI_HPUX_ELF, GDB_OSABI_HPUX_SOM): Remove. * fbsd-tdep.c: Adjust comment. * hppa-nbsd-tdep.c (_initialize_hppanbsd_tdep): Adjust. * hppa-obsd-tdep.c (GDB_OSABI_NETBSD_CORE): Delete. (hppaobsd_core_osabi_sniffer): Delete. (_initialize_hppabsd_tdep): Don't handle a.out. * hppa-tdep.c (hppa_stub_frame_unwind_cache): Don't handle GDB_OSABI_HPUX_SOM. (hppa_gdbarch_init): Likewise. * i386-bsd-tdep.c (i386bsd_aout_osabi_sniffer) (i386bsd_core_osabi_sniffer, _initialize_i386bsd_tdep): Delete. * i386-fbsd-tdep.c (i386fbsdaout_init_abi): Delete. Merge bits with ... (i386fbsd_init_abi): ... this. (_initialize_i386fbsd_tdep): Don't handle a.out. * i386-nbsd-tdep.c (_initialize_i386nbsd_tdep): Adjust. * i386-obsd-tdep.c (i386obsd_aout_supply_regset) (i386obsd_aout_gregset) (i386obsd_aout_iterate_over_regset_sections): Delete. (i386obsd_init_abi): Merge with i386obsd_elf_init_abi. (i386obsd_aout_init_abi): Delete. (_initialize_i386obsd_tdep): Don't handle a.out. * m68k-bsd-tdep.c (m68kobsd_sigtramp_cache_init) (m68kobsd_sigtramp): Delete. (m68kbsd_init_abi): Merge with ... (m68kbsd_elf_init_abi): ... this, and delete it. (m68kbsd_aout_init_abi): Delete. (m68kbsd_aout_osabi_sniffer, m68kbsd_core_osabi_sniffer): Delete. (_initialize_m68kbsd_tdep): Don't handle a.out. * mips-nbsd-tdep.c (_initialize_mipsnbsd_tdep): Adjust. * mips64-obsd-tdep.c (_initialize_mips64obsd_tdep): Adjust. * osabi.c (gdb_osabi_names): Remove "a.out" entries. Drop "ELF" suffixes. Remove "HP-UX" entries. (generic_elf_osabi_sniff_abi_tag_sections): Adjust. (generic_elf_osabi_sniffer): No longer handle GDB_OSABI_HPUX_ELF. Adjust. (_initialize_ppcfbsd_tdep): Adjust. * ppc-nbsd-tdep.c (_initialize_ppcnbsd_tdep): Adjust. * ppc-obsd-tdep.c (GDB_OSABI_NETBSD_CORE) (ppcobsd_core_osabi_sniffer): Delete. (_initialize_ppcobsd_tdep): Don't handle a.out. * rs6000-tdep.c (rs6000_gdbarch_init): Adjust. * sh-nbsd-tdep.c (GDB_OSABI_NETBSD_CORE) (shnbsd_core_osabi_sniffer): Delete. (_initialize_shnbsd_tdep): Don't handle a.out. * solib.c (clear_solib): Don't handle SunOS/a.out. * sparc-nbsd-tdep.c (sparc32nbsd_init_abi): Make extern. (sparc32nbsd_aout_init_abi): Delete. (sparc32nbsd_elf_init_abi): Merged into sparc32nbsd_init_abi. (sparcnbsd_aout_osabi_sniffer): Delete. (GDB_OSABI_NETBSD_CORE, sparcnbsd_core_osabi_sniffer): Delete. (_initialize_sparcnbsd_tdep): No longer handle a.out. * sparc-obsd-tdep.c (sparc32obsd_init_abi) (_initialize_sparc32obsd_tdep): Adjust. * sparc-tdep.h (sparc32nbsd_elf_init_abi): Rename to ... (sparc32nbsd_init_abi): ... this. * sparc64-fbsd-tdep.c (_initialize_sparc64fbsd_tdep): Adjust. * sparc64-nbsd-tdep.c (_initialize_sparc64nbsd_tdep): Adjust. * sparc64-obsd-tdep.c (_initialize_sparc64obsd_tdep): Adjust. * stabsread.c: Update comment. * symmisc.c (print_objfile_statistics): Don't mention "a.out" in output. * vax-nbsd-tdep.c (_initialize_vaxnbsd_tdep): Adjust. * vax-obsd-tdep.c: Delete file. |
10 years ago |
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f94f411b83 |
Add ChangeLog entries
ChangeLog entries are missed in my two previous commits. |
10 years ago |
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a28aa6edd4 |
Create tdep->rx_psw_type and tdep->rx_fpsw_type lazily
I build GDB with all targets enabled, and "set architecture rx", GDB crashes, (gdb) set architecture rx Program received signal SIGSEGV, Segmentation fault. append_flags_type_flag (type=0x20cc360, bitpos=bitpos@entry=0, name=name@entry=0xd27529 "C") at ../../binutils-gdb/gdb/gdbtypes.c:4926 4926 name); (gdb) bt 10 #0 append_flags_type_flag (type=0x20cc360, bitpos=bitpos@entry=0, name=name@entry=0xd27529 "C") at ../../binutils-gdb/gdb/gdbtypes.c:4926 #1 0x00000000004ce725 in rx_gdbarch_init (info=..., arches=<optimized out>) at ../../binutils-gdb/gdb/rx-tdep.c:1051 #2 0x00000000006b05a4 in gdbarch_find_by_info (info=...) at ../../binutils-gdb/gdb/gdbarch.c:5269 #3 0x000000000060eee4 in gdbarch_update_p (info=...) at ../../binutils-gdb/gdb/arch-utils.c:557 #4 0x000000000060f8a8 in set_architecture (ignore_args=<optimized out>, from_tty=1, c=<optimized out>) at ../../binutils-gdb/gdb/arch-utils.c:531 #5 0x0000000000593d0b in do_set_command (arg=<optimized out>, arg@entry=0x20bee81 "rx ", from_tty=from_tty@entry=1, c=c@entry=0x20b1540) at ../../binutils-gdb/gdb/cli/cli-setshow.c:455 #6 0x00000000007665c3 in execute_command (p=<optimized out>, p@entry=0x20bee70 "set architecture rx ", from_tty=1) at ../../binutils-gdb/gdb/top.c:666 #7 0x00000000006935f4 in command_handler (command=0x20bee70 "set architecture rx ") at ../../binutils-gdb/gdb/event-top.c:577 #8 0x00000000006938d8 in command_line_handler (rl=<optimized out>) at ../../binutils-gdb/gdb/event-top.c:767 #9 0x0000000000692c2c in gdb_rl_callback_handler (rl=0x20be7f0 "") at ../../binutils-gdb/gdb/event-top.c:200 The cause is that we want to access some builtin types in gdbarch init, but it is not initialized yet. I fix it by creating the type when it is to be used. We've already done this in sparc, sparc64 and m68k. gdb: 2016-12-09 Yao Qi <yao.qi@linaro.org> PR tdep/20954 * rx-tdep.c (rx_psw_type): New function. (rx_fpsw_type): New function. (rx_register_type): Call rx_psw_type and rx_fpsw_type. (rx_gdbarch_init): Move code to rx_psw_type and rx_fpsw_type. gdb/testsuite: 2016-12-09 Yao Qi <yao.qi@linaro.org> * gdb.base/all-architectures.exp.in: Remove kfail for "rx". |
10 years ago |
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1a31b34a18 |
Create tdep->rl78_psw_type lazily
I build GDB for all targets enabled. When I "set architecture rl78", GDB crashes, (gdb) set architecture rl78 Program received signal SIGSEGV, Segmentation fault. append_flags_type_flag (type=0x20cc0e0, bitpos=bitpos@entry=0, name=name@entry=0x11dba3f "CY") at ../../binutils-gdb/gdb/gdbtypes.c:4926 4926 name); (gdb) bt 10 #0 append_flags_type_flag (type=0x20cc0e0, bitpos=bitpos@entry=0, name=name@entry=0x11dba3f "CY") at ../../binutils-gdb/gdb/gdbtypes.c:4926 #1 0x00000000004aaca8 in rl78_gdbarch_init (info=..., arches=<optimized out>) at ../../binutils-gdb/gdb/rl78-tdep.c:1410 #2 0x00000000006b05a4 in gdbarch_find_by_info (info=...) at ../../binutils-gdb/gdb/gdbarch.c:5269 #3 0x000000000060eee4 in gdbarch_update_p (info=...) at ../../binutils-gdb/gdb/arch-utils.c:557 #4 0x000000000060f8a8 in set_architecture (ignore_args=<optimized out>, from_tty=1, c=<optimized out>) at ../../binutils-gdb/gdb/arch-utils.c:531 #5 0x0000000000593d0b in do_set_command (arg=<optimized out>, arg@entry=0x20be851 "rl78", from_tty=from_tty@entry=1, c=c@entry=0x20b1540) at ../../binutils-gdb/gdb/cli/cli-setshow.c:455 #6 0x00000000007665c3 in execute_command (p=<optimized out>, p@entry=0x20be840 "set architecture rl78", from_tty=1) at ../../binutils-gdb/gdb/top.c:666 #7 0x00000000006935f4 in command_handler (command=0x20be840 "set architecture rl78") at ../../binutils-gdb/gdb/event-top.c:577 #8 0x00000000006938d8 in command_line_handler (rl=<optimized out>) at ../../binutils-gdb/gdb/event-top.c:767 #9 0x0000000000692c2c in gdb_rl_callback_handler (rl=0x20be890 "") at ../../binutils-gdb/gdb/event-top.c:200 The cause is that we want to access some builtin types in gdbarch init, but it is not initialized yet. I fix it by creating the type when it is to be used. We've already done this in sparc, sparc64 and m68k. gdb: 2016-12-09 Yao Qi <yao.qi@linaro.org> PR tdep/20953 * rl78-tdep.c (rl78_psw_type): New function. (rl78_register_type): Call rl78_psw_type. (rl78_gdbarch_init): Move code to rl78_psw_type. gdb/testsuite: 2016-12-09 Yao Qi <yao.qi@linaro.org> * gdb.base/all-architectures.exp.in: Remove kfail for rl78. |
10 years ago |
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f1b5deee16 |
Add test that exercises all bfd architecture, osabi, endian, etc. combinations
This adds a test that exposes several problems fixed by earlier patches: #1 - Buffer overrun when host/target formats match, but sizes don't. https://sourceware.org/ml/gdb-patches/2016-03/msg00125.html #2 - Missing handling for FR-V FR300. https://sourceware.org/ml/gdb-patches/2016-03/msg00117.html #3 - BFD architectures with spaces in their names (v850). https://sourceware.org/ml/binutils/2016-03/msg00108.html #4 - The OS ABI names with spaces issue. https://sourceware.org/ml/gdb-patches/2016-03/msg00116.html #5 - Bogus HP/PA long double format. https://sourceware.org/ml/gdb-patches/2016-03/msg00122.html #6 - Cris big endian internal error. https://sourceware.org/ml/gdb-patches/2016-03/msg00126.html #7 - Several PowerPC bfd archs/machines not handled by gdb. https://sourceware.org/bugzilla/show_bug.cgi?id=19797 And hopefully helps catch others in the future. This started out as a test that simply did, gdb -ex "print 1.0L" to exercise #1 above. Then to cover both 32-bit target / 64-bit host and the converse, I thought of having the testcase print the floats twice, once with the architecture set to "i386" and then to "i386:x86-64". This way it wouldn't matter whether gdb was built as 32-bit or a 64-bit program. Then I thought that other archs might have similar host/target floatformat conversion issues as well. Instead of hardcoding some architectures in the test file, I thought we could just iterate over all bfd architectures and OS ABIs supported by the gdb build being tested. This is what then exposed all the other problems listed above... With an --enable-targets=all, this exercises over 14 thousand combinations. If left in a single test file, it all consistenly runs in under a minute on my machine (An Intel i7-4810MQ @ 2.8 MHZ running Fedora 23). Split in 8 chunks, as in this commit, it runs in around 25 seconds, with make -j8. To avoid flooding the gdb.sum file, it avoids calling "pass" on each tested combination/iteration. I'm explicitly not implementing that by passing an empty message to gdb_test / gdb_test_multiple, because I still want a FAIL to be logged in gdb.sum. So instead this puts the internal passes in the gdb.log file, only, prefixed "IPASS:", for internal pass. TBC, if some iteration fails, it'll still show up as FAIL in gdb.sum. If this is an approach that takes on, I can see us extending the common bits to support it for all testcases. gdb/testsuite/ChangeLog: 2016-12-09 Pedro Alves <palves@redhat.com> * gdb.base/all-architectures-0.exp: New file. * gdb.base/all-architectures-1.exp: New file. * gdb.base/all-architectures-2.exp: New file. * gdb.base/all-architectures-3.exp: New file. * gdb.base/all-architectures-4.exp: New file. * gdb.base/all-architectures-5.exp: New file. * gdb.base/all-architectures-6.exp: New file. * gdb.base/all-architectures-7.exp: New file. * gdb.base/all-architectures.exp.in: New file. |
10 years ago |
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fc2f703edb |
Use code cache in aarch64 prologue analyzer
This patch change aarch prologue analyzer using code cache, in order to improve the performance of remote debugging. gdb.perf/skip-prologue.exp (measured by wall-time) is improved when the program is compiled without debug information. Original Patched Original Patched without dbg without dbg with dbg with dbg / 11.1635239124 9.99472999573 9.65339517593 9.66648793221 -fstack-protector-all 11.2560930252 9.338118 9.63896489143 9.59474396706 gdb: 2016-12-9 Yao Qi <yao.qi@linaro.org> * aarch64-tdep.c (instruction_reader::read): Call read_code_unsigned_integer instead of read_memory_unsigned_integer. |
10 years ago |
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198cd59d28 |
Use code cache in arm prologue analyzer
This patch change arm prologue analyzer using code cache, in order to improve the performance of remote debugging. gdb.perf/skip-prologue.exp (measured by wall-time) is improved a lot, Original Patched Original Patched without dbg without dbg with dbg with dbg -marm 14.166741848 9.32852292061 11.4908499718 9.16302204132 -marm 14.6705040932 9.34849786758 18.2788009644 9.14823913574 \-fstack-protector-all -mthumb 34.4391930103 10.6062178612 13.7886838913 10.3094120026 -mthumb \-fstack-protector-all 34.9310460091 10.6413481236 25.3875930309 10.6294929981 gdb: 2016-12-09 Yao Qi <yao.qi@linaro.org> * arm-tdep.c (skip_prologue_function): Call read_code_unsigned_integer instead of read_memory_unsigned_integer. (thumb_analyze_prologue): Likewise. (arm_analyze_load_stack_chk_guard): Likewise. (arm_skip_stack_protector): Likewise. (arm_analyze_prologue):Likewise. (extend_buffer_earlier): Call target_read_code instead of target_read_memory. (arm_adjust_breakpoint_address): Likewise. |
10 years ago |
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364ca42e71 |
Compile gdb.perf/skip-prologue.c with and without debug info
gdb.perf/skip-prologue.exp is intended to measure the performance of skipping prologue with prologue analysis by setting breakpoints. However, if program is compiled with debug info, GDB is smart to skip prologue by line table from debug info, so prologue analysis is not exercised at all. This patch adds a parameter COMPILE to specify compiling with debug information, otherwise, it is compiled without debug information. gdb/testsuite: 2016-12-09 Yao Qi <yao.qi@linaro.org> * gdb.perf/skip-prologue.exp: Add parameter COMPILE. |
10 years ago |
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c752a4cccb |
Hurd: Adjust to changes to "push pruning old threads down to the target"
For "info threads", we currently run into:
$ gdb/gdb -q -nw -nx --batch -ex start -ex info\ threads bfd/doc/chew
Temporary breakpoint 1 at 0x80486e0: file ../../../W._C._Handy/bfd/doc/chew.c, line 1535.
[New Thread 10656.5]
Thread 4 hit Temporary breakpoint 1, main (ac=1, av=0x102cd84) at ../../../W._C._Handy/bfd/doc/chew.c:1535
1535 {
Id Target Id Frame
1 bogus thread id 1 Can't fetch registers from thread bogus thread id 1: No such thread
Before commit
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10 years ago |
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53488a6e19 |
Avoid PATH_MAX usage
On GNU/Hurd, there is no "#define PATH_MAX", so this failed to build. gdb/ * inferior.c (print_selected_inferior): Avoid PATH_MAX usage. |
10 years ago |
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cfccf141f0 |
Automatic date update in version.in
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10 years ago |
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39f66f3ae2 |
MIPS16/opcodes: Fix off-by-one indentation in `print_mips16_insn_arg'
opcodes/ * mips-dis.c (print_mips16_insn_arg): Remove extraneous indentation space across. |
10 years ago |
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860b03a8f3 |
MIPS16/opcodes: Fix PC-relative operation delay-slot adjustment
Complement commit
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10 years ago |
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731f7c4ea3 |
ARC/GAS: Correct a `spaces' global shadowing error
Fix a commit |
10 years ago |
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bf355b690f |
ARM/GAS: Correct an `index' global shadowing error
Fix a commit |
10 years ago |