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add-fakeroots-dir
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added-to-binutils
arc-20081103-branchpoint
arc-insight_6_8-branchpoint
arc-sim-20090309
binu_ss_19990502
binu_ss_19990602
binu_ss_19990721
binutils-2_10
binutils-2_10-branchpoint
binutils-2_10_1
binutils-2_11
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binutils-2_12
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binutils-2_13
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binutils-2_14
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binutils-2_15
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binutils-2_29_1.1
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binutils-2_31_1
binutils-2_32
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binutils-2_34
binutils-2_35
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binutils-2_35_2
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binutils-2_36_1
binutils-2_37
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binutils-2_41-release
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binutils-csl-renesas-4_1-6
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binutils-csl-renesas-4_1-9
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${ noResults }
2732 Commits (aec6b87e0b66d707ead62ca40d220ee78b4cf5a5)
| Author | SHA1 | Message | Date |
|---|---|---|---|
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|
a9fb83bead |
Add a missing break to readelf.c
PR binutils/19647 * readelf.c (get_section_type_name): Add a missing break. |
10 years ago |
|
|
726c18e1c8 |
[ARC] Enable .cfi_* pseudo-ops.
gas/ 2016-02-16 Claudiu Zissulescu <claziss@synopsys.com> * config/tc-arc.c (tc_arc_frame_initial_instructions): New function. (tc_arc_regname_to_dw2regnum): Likewise. * config/tc-arc.h (TARGET_USE_CFIPOP): Define (tc_cfi_frame_initial_instructions): Likewise. (tc_regname_to_dw2regnum): Likewise. gas/testsuite 2016-02-16 Claudiu Zissulescu <claziss@synopsys.com> * gas/cfi/cfi-arc-1.d: New file. * gas/cfi/cfi-arc-1.s: Likewise. * gas/cfi/cfi.exp: Allow running tests for arc. binutils/ 2016-02-16 Claudiu Zissulescu <claziss@synopsys.com> * readelf.c (is_32bit_pcrel_reloc): Add R_ARC_32_PCREL. |
10 years ago |
|
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9fb71ee49f |
Enhance GAS's .section directive so that it can take numeric values for the flags and type fields. (ELF only)
gas * doc/as.texinfo (.section): Document that numeric values can now be used for the flags and type fields of the ELF target's .section directive. Add notes about the restrictions on setting flags and types. * config/obj-elf.c (obj_elf_change_section): Allow known sections to be given processor specific section types. Allow processor and application specific flags of a section to be set after definition. (obj_elf_parse_section_letters): Handle parsing numeric values. (obj_elf_section_type): Handle parsing numeric values. (obj_elf_section): Allow numeric type values. * config/obj-elf.h (obj_elf_change_section): Update prototype. * testsuite/gas/elf/section10.d: New test. * testsuite/gas/elf/section10.s: Source file for new test. * testsuite/gas/elf/elf.exp: Run the new test. * testsuite/gas/i386/ilp32/x86-64-unwind.d: Remove dependency upon the description of the flags produced by readelf. * testsuite/gas/tic6x/scomm-directive-4.d: Likewise. * NEWS: Mention the new feature. bfd * elf-bfd.h (struct bfd_elf_special_section): Use unsigned values for length and type fields. Use a signed value for the suffix_length field. binutils* readelf.c (get_section_type_name): Add hex prefix to offsets printed for LOPROC and LOOS values. Ensure that a result is always returned for the V850 target, even when an unrecognised processor specific value is encountered. (process_section_headers): Display key values in the order in which they appear to the user. Add the "C (compressed)" value to the list. ld * testsuite/ld-i386/pr12718.d: Remove dependency upon the description of the flags produced by readelf. * testsuite/ld-i386/pr12921.d: Likewise. * testsuite/ld-i386/tlsbin-nacl.rd: Likewise. * testsuite/ld-i386/tlsbin.rd: Likewise. * testsuite/ld-i386/tlsbindesc-nacl.rd: Likewise. * testsuite/ld-i386/tlsbindesc.rd: Likewise. * testsuite/ld-i386/tlsdesc-nacl.rd: Likewise. * testsuite/ld-i386/tlsdesc.rd: Likewise. * testsuite/ld-i386/tlsgdesc-nacl.rd: Likewise. * testsuite/ld-i386/tlsgdesc.rd: Likewise. * testsuite/ld-i386/tlsnopic-nacl.rd: Likewise. * testsuite/ld-i386/tlsnopic.rd: Likewise. * testsuite/ld-i386/tlspic-nacl.rd: Likewise. * testsuite/ld-i386/tlspic.rd: Likewise. * testsuite/ld-s390/tlsbin.rd: Likewise. * testsuite/ld-s390/tlsbin_64.rd: Likewise. * testsuite/ld-s390/tlspic.rd: Likewise. * testsuite/ld-s390/tlspic_64.rd: Likewise. * testsuite/ld-sh/tlsbin-2.d: Likewise. * testsuite/ld-sh/tlspic-2.d: Likewise. * testsuite/ld-tic6x/common.d: Likewise. * testsuite/ld-tic6x/shlib-1.rd: Likewise. * testsuite/ld-tic6x/shlib-1b.rd: Likewise. * testsuite/ld-tic6x/shlib-1r.rd: Likewise. * testsuite/ld-tic6x/shlib-1rb.rd: Likewise. * testsuite/ld-tic6x/shlib-app-1.rd: Likewise. * testsuite/ld-tic6x/shlib-app-1b.rd: Likewise. * testsuite/ld-tic6x/shlib-app-1r.rd: Likewise. * testsuite/ld-tic6x/shlib-app-1rb.rd: Likewise. * testsuite/ld-tic6x/shlib-noindex.rd: Likewise. * testsuite/ld-tic6x/static-app-1.rd: Likewise. * testsuite/ld-tic6x/static-app-1b.rd: Likewise. * testsuite/ld-tic6x/static-app-1r.rd: Likewise. * testsuite/ld-tic6x/static-app-1rb.rd: Likewise. * testsuite/ld-x86-64/ilp32-4-nacl.d: Likewise. * testsuite/ld-x86-64/ilp32-4.d: Likewise. * testsuite/ld-x86-64/pr12718.d: Likewise. * testsuite/ld-x86-64/pr12921.d: Likewise. * testsuite/ld-x86-64/split-by-file-nacl.rd: Likewise. * testsuite/ld-x86-64/split-by-file.rd: Likewise. * testsuite/ld-x86-64/tlsbin-nacl.rd: Likewise. * testsuite/ld-x86-64/tlsbin.rd: Likewise. * testsuite/ld-x86-64/tlsbindesc-nacl.rd: Likewise. * testsuite/ld-x86-64/tlsbindesc.rd: Likewise. * testsuite/ld-x86-64/tlsdesc-nacl.rd: Likewise. * testsuite/ld-x86-64/tlsdesc.rd: Likewise. * testsuite/ld-x86-64/tlsgdesc-nacl.rd: Likewise. * testsuite/ld-x86-64/tlsgdesc.rd: Likewise. * testsuite/ld-x86-64/tlspic-nacl.rd: Likewise. * testsuite/ld-x86-64/tlspic.rd: Likewise. * testsuite/ld-xtensa/tlsbin.rd: Likewise. * testsuite/ld-xtensa/tlspic.rd: Likewise. |
10 years ago |
|
|
96d491cf8d |
Fix a typo in objcopy manual
For objcopy, --compress-debug-sections=none is the same as --decompress-debug-sections, not --nocompress-debug-sections. * doc/binutils.texi: Fix a typo. |
10 years ago |
|
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bdbca4e6f8 |
Change the default architecture value for ARC bfds so that they have the lowest possible value, and hence can be merged with other ARC binaries wihtout changing their architecture value.
bfd * cpu-arc.c: Change default archure from bfd_mach_arc_arcv2 to bfd_mach_arc_arc600. binutils * testsuite/binutils-all/objdump.exp: Update expected default architecture value for ARC binaries. |
10 years ago |
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14f2c699dd |
Clear HAS_RELOC if there are no relocations
The HAS_RELOC bit should be cleared when relocations are removed from relocatable files. bfd/ PR binutils/19547 * elf.c (assign_section_numbers): Clear HAS_RELOC if there are no relocations in relocatable files. binutils/ PR binutils/19547 * testsuite/binutils-all/objcopy.exp (objcopy_test_without_global_symbol): New proc. Run objcopy_test_without_global_symbol. * testsuite/binutils-all/pr19547.c: New file. |
10 years ago |
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bf150a0bad |
Set BFD_DECOMPRESS to decompress debug sections
We should set BFD_DECOMPRESS to decompress debug sections when reading in DWARF debug sections. bfd/ PR binutils/19523 * dwarf2.c (_bfd_dwarf2_slurp_debug_info): Set BFD_DECOMPRESS to decompress debug sections. binutils/ PR binutils/19523 * Makefile.am (check-DEJAGNU): Pass CC and CC_FOR_BUILD to runtest. * Makefile.in: Regenerated. * testsuite/binutils-all/compress.exp (test_gnu_debuglink): New proc. Run test_gnu_debuglink for native ELF build. |
10 years ago |
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0398b8d6c8 |
Fix dlltool tests for ARM targets, which do not support the --leading-underscore option.
PR 19495 * testsuite/binutils-all/dlltool.exp: Fix tests for targets which do not support inserting leading underscores. |
10 years ago |
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91f68a68f9 |
Add support for an ARM specific 'y' section attribute flag to mark the section as NOREAD.
bfd/ChangeLog:
* elf32-arm.c ((elf32_arm_special_sections): Remove catch of noread
section using '.text.noread' pattern.
gas/ChangeLog:
* config/obj-elf.c (obj_elf_change_section) : Allow arm section with
SHF_ARM_NOREAD section flag.
* config/tc-arm.h (md_elf_section_letter) : Implement this hook to
handle letter 'y'.
(arm_elf_section_letter) : Declare it.
* config/tc-arm.c (arm_elf_section_letter): Handle letter 'y' to set
SHF_ARM_NOREAD section flag.
* doc/c-arm.texi (ARM section attribute 'y'): Document it.
gas/testsuite/ChangeLog:
* gas/arm/section-execute-only.s: New test case.
* gas/arm/section-execute-only.d: Expected output.
ld/testsuite/ChangeLog:
* ld-arm/thumb1-noread-not-present-mixing-two-section.s: Add 'y'
attribute usage.
* ld-arm/thumb1-noread-present-one-section.s: Likewise.
* ld-arm/thumb1-noread-present-two-section.s: Likewise.
* ld-arm/thumb1-input-section-flag-match.s: Likewise.
binutils/ChangeLog:
* readelf.c (get_elf_section_flags): Display y letter for section
with SHF_ARM_NOREAD section flag in readelf section output.
(process_section_headers): Add y letter in readelf section output
key mapping for ARM architecture.
|
10 years ago |
|
|
40068dccc4 |
Remove an unused variable.
binutils/ChangeLog: * readelf.c (get_freebsd_elfcore_note_type): Remove unused variable. |
10 years ago |
|
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f4ddf30f11 |
Add support to readelf for reading FreeBSD ELF core notes.
binutils/ChangeLog: * readelf.c (get_freebsd_elfcore_note_type): New (process_note): Add support for FreeBSD core notes. include/ChangeLog: * elf/common.h (NT_FREEBSD_THRMISC): Define. (NT_FREEBSD_PROCSTAT_PROC): Define. (NT_FREEBSD_PROCSTAT_FILES): Define. (NT_FREEBSD_PROCSTAT_VMMAP): Define. (NT_FREEBSD_PROCSTAT_GROUPS): Define. (NT_FREEBSD_PROCSTAT_UMASK): Define. (NT_FREEBSD_PROCSTAT_RLIMIT): Define. (NT_FREEBSD_PROCSTAT_OSREL): Define. (NT_FREEBSD_PROCSTAT_PSSTRINGS): Define. (NT_FREEBSD_PROCSTAT_AUXV): Define. |
10 years ago |
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34e967a5f3 |
Add PIC and TLS support to the ARC target.
bfd/ChangeLog: * arc-plt.def: New file. * arc-plt.h: Likewise. * elf32-arc.c (elf_arc_abs_plt0_entry, elf_arc_abs_pltn_entry, elf_arcV2_abs_plt0_entry, elf_arcV2_abs_pltn_entry, elf_arc_pic_plt0_entry, elf_arc_pic_pltn_entry, elf_arcV2_pic_plt0_entry, elf_arcV2_pic_pltn_entry): Remove. (name_for_global_symbol): Added. (ADD_RELA): Helper to create dynamic relocs. (new_got_entry_to_list): Create a new got entry in linked list. (symbol_has_entry_of_type): Search for specific type of entry in list. (is_reloc_for_GOT): return FALSE for any TLS related relocs. (is_reloc_for_TLS, arc_elf_set_private_flags) (arc_elf_print_private_bfd_data, arc_elf_copy_private_bfd_data) (arc_elf_merge_private_bfd_data): New functions. (debug_arc_reloc): Cleaned debug info printing. (PDATA reloc): Changed not to perform address alignment. (reverse_me): Added. Fix for ARC_32 relocs. (arc_do_relocation): Return bfd_reloc_of when no relocation should occur. (arc_get_local_got_ents): Renamed from arc_get_local_got_offsets. Changed function to access an array of list of GOT entries instead of just an array of offsets. (elf_arc_relocate_section): Added support for PIC and TLS related relocations. (elf_arc_check_relocs): Likewise. (elf_arc_adjust_dynamic_symbol, elf_arc_finish_dynamic_symbol, (elf_arc_finish_dynamic_sections): Likewise (arc_create_dynamic_sections): Modified conditions to create dynamic sections. (ADD_SYMBOL_REF_SEC_AND_RELOC): New macro. (plt_do_relocs_for_symbol, relocate_plt_for_symbol) (relocate_plt_for_entry): Changed to support new way to define PLT related code. (add_symbol_to_plt): Likewise. (arc_elf_link_hash_table_create): New function. include/ChangeLog: * elf/arc-reloc.def (ARC_32, ARC_GOTPC, ARC_TLS_GD_GOT) (ARC_TLS_IE_GOT, ARC_TLS_DTPOFF, ARC_TLS_DTPOFF_S9, ARC_TLS_LE_S9) (ARC_TLS_LE_32): Fixed formula. (ARC_TLS_GD_LD): Use new special function. * opcode/arc-func.h: Changed all the replacement functions to clear the patching bits before doing an or it with the value argument. |
10 years ago |
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3d961d0d3a |
Provide AC_PROG_LEX that copes with LEX=missing from top-level
config/ PR binutils/19481 * override.m4 (AC_PROG_LEX): Define. binutils/ * configure: Regenerate. gas/ * configure: Regenerate. ld/ * configure: Regenerate. |
10 years ago |
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5c14705fb3 |
Regen configure
Picks up 2016-01-12 libtool.m4 change. bfd/ * configure: Regenerate. binutils/ * configure: Regenerate. gas/ * configure: Regenerate. gprof/ * configure: Regenerate. ld/ * configure: Regenerate. opcodes/ * configure: Regenerate. |
10 years ago |
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b3066ae825 |
m68hc11/12 and xgate config.sub weirdness
Oddly, config.sub converts a duple ending in -elf for these target to -unknown-none, which means they aren't seen as elf targets by binutils. So, counter that. This exposes a number of testsuite issues (ones you would have seen if configuring with a full triple, say m68hc11-unknown-elf). binutils/ * testsuite/lib/binutils-common.exp (is_elf_format): Return true for m68hc11/12 and xgate triples. gas/ * testsuite/gas/cfi/cfi.exp: Exclude m68hc11/12 from m68k test. ld/ * testsuite/lib/ld-lib.exp (check_shared_lib_support): Exclude xgate. * testsuite/ld-elf/endsym.d: xfail m68hc11/12 and xgate. * testsuite/ld-elf/pr14156a.d: Likewise. * testsuite/ld-elf/pr14926.d: Don't run for m68hc11/12 and xgate. * testsuite/ld-elf/sec64k.exp: Likewise. |
10 years ago |
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adec12c116 |
m68hc11/12 readelf support
Supports relocation of debug sections. * readelf.c (is_32bit_abs_reloc): Add R_M68HC11_32. |
10 years ago |
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6f2750feaf |
Copyright update for binutils
|
10 years ago |
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3499769a6a |
New 2016 binutils ChangeLog files
Note that this does not create bfd/doc/ChangeLog, */testsuite/ChangeLog and include/*/ChangeLog files. |
10 years ago |
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4120fa118f |
binutils ChangeLog rotation
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10 years ago |
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331e61312e |
Fix assorted ChangeLog errors
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10 years ago |
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ff8646eef8 |
Add assembler support for ARMv8-M Baseline
2015-12-24 Thomas Preud'homme <thomas.preudhomme@arm.com>
bfd/
(tag_cpu_arch_combine): Adjust comment in v4t_plus_v6_m with regards
to merging with ARMv8-M Baseline.
binutils/
* readelf.c (arm_attr_tag_CPU_arch): Add ARMv8-M Baseline Tag_CPU_arch
value.
gas/
* config/tc-arm.c (arm_ext_v6t2_v8m): New feature for instructions
shared between ARMv6T2 and ARMv8-M.
(move_or_literal_pool): Check mov.w/mvn and movw availability against
arm_ext_v6t2 and arm_ext_v6t2_v8m respectively instead of checking
arm_arch_t2.
(do_t_branch): Error out for wide conditional branch instructions if
targetting ARMv8-M Baseline.
(non_v6t2_wide_only_insn): Add the logic for new wide-only instructions
in ARMv8-M Baseline.
(wide_insn_ok): New function.
(md_assemble): Use wide_insn_ok instead of non_v6t2_wide_only_insn and
adapt error message for unsupported wide instruction to ARMv8-M
Baseline.
(insns): Reorganize instructions shared by ARMv8-M Baseline and
ARMv6t2 architecture.
(arm_cpus): Set feature bit ARM_EXT2_V6T2_V8M for marvell-pj4 and
marvell-whitney cores.
(arm_archs): Define armv8-m.base architecture.
(cpu_arch_ver): Define ARM_ARCH_V8M_BASE architecture version.
(aeabi_set_public_attributes): Add logic to set Tag_CPU_arch to 17 for
ARMv8-M Mainline. Set Tag_DIV_use for ARMv8-M Baseline as well.
gas/testsuite/
* gas/arm/archv8m-base.d: New file.
* gas/arm/attr-march-armv8m.base.d: Likewise.
* gas/arm/armv8m.base-idiv.d: Likewise.
* gas/arm/any-armv8m.d: Adapt to deal with ARMv8-M Baseline.
include/elf/
* arm.h (TAG_CPU_ARCH_V8M_BASE): Declare.
include/opcode/
* arm.h (ARM_EXT2_V6T2_V8M): New extension bit.
(ARM_AEXT2_V8A): New architecture extension bitfield.
(ARM_AEXT2_V8_1A): Use ARM_AEXT2_V8A instead of ARM_EXT2_ATOMICS.
(ARM_AEXT_V8M_BASE): New architecture extension bitfield.
(ARM_AEXT2_V8M): Add extension bit ARM_EXT2_V6T2_V8M.
(ARM_ARCH_V6T2): Use ARM_EXT2_V6T2_V8M for the second extension
bitfield.
(ARM_ARCH_V6KT2): Likewise.
(ARM_ARCH_V6ZT2): Likewise.
(ARM_ARCH_V6KZT2): Likewise.
(ARM_ARCH_V7): Likewise.
(ARM_ARCH_V7A): Likewise.
(ARM_ARCH_V7VE): Likewise.
(ARM_ARCH_V7R): Likewise.
(ARM_ARCH_V7M): Likewise.
(ARM_ARCH_V7EM): Likewise.
(ARM_ARCH_V8A): Likewise.
(ARM_ARCH_V8M_BASE): New architecture bitfield.
(ARM_ARCH_THUMB2): Include instructions shared by ARMv6t2 and ARMv8-M.
(ARM_ARCH_V7A_SEC): Use ARM_EXT2_V6T2_V8M for the second extension
bitfield and reindent.
(ARM_ARCH_V7A_MP_SEC): Likewise.
(ARM_ARCH_V7R_IDIV): Likewise.
(ARM_ARCH_V8A_FP): Use ARM_AEXT2_V8A instead of ARM_EXT2_ATOMICS.
(ARM_ARCH_V8A_SIMD): Likewise.
(ARM_ARCH_V8A_CRYPTOV1): Likewise.
opcodes/
* arm-dis.c (arm_opcodes): Guard movw, movt cbz, cbnz, clrex, ldrex,
ldrexb, ldrexh, strex, strexb, strexh shared by ARMv6T2 and ARMv8-M by
ARM_EXT2_V6T2_V8M instead of ARM_EXT_V6T2.
|
10 years ago |
|
|
4ed7ed8db2 |
Add assembler support for ARMv8-M Mainline
2015-12-24 Thomas Preud'homme <thomas.preudhomme@arm.com>
bfd/
(tag_cpu_arch_combine): Adjust v4t_plus_v6_m and comb array to account
for new TAG_CPU_ARCH_V4T_PLUS_V6_M value. Deal with NULL values in
comb array.
binutils/
* readelf.c (arm_attr_tag_CPU_arch): Add ARMv8-M Mainline Tag_CPU_arch
value.
(arm_attr_tag_THUMB_ISA_use): Add ARMv8-M Mainline Tag_THUMB_ISA_use
value.
gas/
* config/tc-arm.c (arm_ext_m): Include ARMv8-M.
(arm_ext_v8m): New feature for ARMv8-M.
(arm_ext_atomics): New feature for ARMv8 atomics.
(do_tt): New encoding function for TT* instructions.
(insns): Add new entries for ARMv8-M specific instructions and
reorganize the ones shared by ARMv8-M Mainline and ARMv8-A.
(arm_archs): Define armv8-m.main architecture.
(cpu_arch_ver): Define ARM_ARCH_V8M_MAIN architecture version and
clarify the ordering rule.
(aeabi_set_public_attributes): Use TAG_CPU_ARCH_* macro to refer to
Tag_CPU_arch values for ARMv7e-M detection. Add logic to keep setting
Tag_CPU_arch to ARMv8-A for -march=all. Also set Tag_CPU_arch_profile
to 'A' if extension bit for atomic instructions is set, unless it is
ARMv8-M. Set Tag_THUMB_ISA_use to 3 for ARMv8-M. Set Tag_DIV_use to 0
for ARMv8-M Mainline.
gas/testsuite/
* gas/arm/archv8m.s: New file.
* gas/arm/archv8m-main.d: Likewise.
* gas/arm/attr-march-armv8m.main.d: Likewise.
* gas/arm/any-armv8m.s: Likewise.
* gas/arm/any-armv8m.d: Likewise.
include/elf/
* arm.h (TAG_CPU_ARCH_V8M_MAIN): Declare.
(MAX_TAG_CPU_ARCH): Define to TAG_CPU_ARCH_V8M_MAIN.
(TAG_CPU_ARCH_V4T_PLUS_V6_M): Define to unused value 15.
include/opcode/
* arm.h (ARM_EXT2_ATOMICS): New extension bit.
(ARM_EXT2_V8M): Likewise.
(ARM_EXT_V8): Adjust comment with regards to atomics and remove
mention of legacy use for that bit.
(ARM_AEXT2_V8_1A): New architecture extension bitfield.
(ARM_AEXT2_V8_2A): Likewise.
(ARM_AEXT_V8M_MAIN): Likewise.
(ARM_AEXT2_V8M): Likewise.
(ARM_ARCH_V8A): Use ARM_EXT2_ATOMICS for features in second bitfield.
(ARM_ARCH_V8_1A): Likewise with ARM_AEXT2_V8_1A.
(ARM_ARCH_V8_2A): Likewise with ARM_AEXT2_V8_2A.
(ARM_ARCH_V8M_MAIN): New architecture feature bitfield.
(ARM_ARCH_V8A_FP): Use ARM_EXT2_ATOMICS for features in second bitfield
and reindent.
(ARM_ARCH_V8A_SIMD): Likewise.
(ARM_ARCH_V8A_CRYPTOV1): Likewise.
(ARM_ARCH_V8_1A_FP): Use ARM_AEXT2_V8_1A to set second bitfield of
feature bits.
(ARM_ARCH_V8_1A_SIMD): Likewise.
(ARM_ARCH_V8_1A_CRYPTOV1): Likewise.
opcodes/
* arm-dis.c (arm_opcodes): Guard lda, ldab, ldaex, ldaexb, ldaexh, stl,
stlb, stlh, stlex, stlexb and stlexh by ARM_EXT2_ATOMICS instead of
ARM_EXT_V8.
(thumb32_opcodes): Add entries for wide ARMv8-M instructions.
|
10 years ago |
|
|
ac4c9b0459 |
Add support for ARM's NOREAD section flag.
include/elf
* arm.h: Add arm SHF_ARM_NOREAD section flag.
bfd * bfd-in2.h: Regenerate.
* section.c: Add SEC_ELF_NOREAD.
* elf32-arm.c (elf32_arm_post_process_headers): Only set
PF_X attribute if a segment only contains section with
SHF_ARM_NOREAD flag.
(elf32_arm_fake_sections): Add SEC_ELF_NOREAD conversion.
(elf32_arm_section_flags): New function to convert SHF_ARM_NOREAD
to bfd flag.
(elf32_arm_lookup_section_flags): New function to allow
INPUT_SECTION_FLAGS directive with SHF_ARM_NOREAD flag.
(elf32_arm_special_sections): Add special sections array
to catch section prefix by '.text.noread' pattern.
ld/testsuite
* ld-arm/arm-elf.exp: New tests.
* ld-arm/thumb1-input-section-flag-match.d: New
* ld-arm/thumb1-input-section-flag-match.s: New
* ld-arm/thumb1-noread-not-present-mixing-two-section.d: New
* ld-arm/thumb1-noread-not-present-mixing-two-section.s: New
* ld-arm/thumb1-noread-present-one-section.d: New
* ld-arm/thumb1-noread-present-one-section.s: New
* ld-arm/thumb1-noread-present-two-section.d: New
* ld-arm/thumb1-noread-present-two-section.s: New
binutils
* readelf.c (get_elf_section_flags): Add support for ARM specific
section flags.
|
10 years ago |
|
|
16e1d72743 |
MAINTAINERS: Add myself as MIPS maintainer
binutils/ * MAINTAINERS: Add myself as MIPS maintainer. |
10 years ago |
|
|
a117b0a51c |
Add support for RX V2 Instruction Set
binutils * readelf.c(get_machine_flags): Add v2 flag. gas * config/rx-defs.h(rx_cpu_type): Add RXV2 type. * config/tc-rx.c(cpu_type_list): New type lookup table. (md_parse_option): Use lookup table for choose cpu. (md_show_usage): Add rxv2 for mcpu option. * doc/c-rx.texi: Likewise. * config/rx-parse.y: Add v2 instructions and ACC register. (rx_check_v2): check v2 type. include/elf * rx.h(E_FLAG_RX_V2): New RXv2 type. include/opcode * rx.h: Add new instructions. opcoes * rx-deocde.opc(rx_decode_opcode): Add new instructions pattern. * rx-dis.c(register_name): Add new register. gas/testsuite * gas/rx/emaca.d: New. * gas/rx/emaca.sm: New. * gas/rx/emsba.d: New. * gas/rx/emsba.sm: New. * gas/rx/emula.d: New. * gas/rx/emula.sm: New. * gas/rx/fadd.d: Add new pattern. * gas/rx/fadd.sm: Add new pattern. * gas/rx/fmul.d: Add new pattern. * gas/rx/fmul.sm: Add new pattern. * gas/rx/fsqrt.d: New. * gas/rx/fsqrt.sm: New. * gas/rx/fsub.d: Add new pattern. * gas/rx/fsub.sm: Add new pattern. * gas/rx/ftou.d: New. * gas/rx/ftou.sm: New. * gas/rx/maclh.d: New. * gas/rx/maclh.sm: New. * gas/rx/maclo.d: Add new pattern. * gas/rx/maclo.sm: Add new pattern. * gas/rx/macros.inc: Add new register. * gas/rx/movco.d: New. * gas/rx/movco.sm: New. * gas/rx/movli.d: New. * gas/rx/movli.sm: New. * gas/rx/msbhi.d: New. * gas/rx/msbhi.sm: New. * gas/rx/msblh.d: New. * gas/rx/msblh.sm: New. * gas/rx/msblo.d: New. * gas/rx/msblo.sm: New. * gas/rx/mullh.d: New. * gas/rx/mullh.sm: New. * gas/rx/mvfacgu.d: New. * gas/rx/mvfacgu.sm: New. * gas/rx/mvfachi.d: Add new pattern. * gas/rx/mvfachi.sm: Add new pattern. * gas/rx/mvfaclo.d: Add new pattern. * gas/rx/mvfaclo.sm: Add new pattern. * gas/rx/mvfacmi.d: Add new pattern. * gas/rx/mvfacmi.sm: Add new pattern. * gas/rx/mvfc.d: Add new pattern. * gas/rx/mvtacgu.d: New. * gas/rx/mvtacgu.sm: New. * gas/rx/mvtc.d: Add new pattern. * gas/rx/popc.d: Add new pattern. * gas/rx/pushc.d: Add new pattern. * gas/rx/racl.d: New. * gas/rx/racl.sm: New. * gas/rx/racw.d: Add new pattern. * gas/rx/racw.sm: Add new pattern. * gas/rx/rdacl.d: New. * gas/rx/rdacl.sm: New. * gas/rx/rdacw.d: New. * gas/rx/rdacw.sm: New. * gas/rx/rx.exp: Add option. * gas/rx/stnz.d: Add new pattern. * gas/rx/stnz.sm: Add new pattern. * gas/rx/stz.d: Add new pattern. * gas/rx/stz.sm: Add new pattern. * gas/rx/utof.d: New. * gas/rx/utof.sm: New. |
10 years ago |
|
|
552e55ed06 |
nm: basic COFF symbol type support for SysV-style symbol table dumping
|
10 years ago |
|
|
7460c0abe8 |
Fix static analysis warning about undefined bheaviour.
PR binutils/19310 * dwarf.c (display_debug_frames): Recode range test to avoid undefined behaviour. |
10 years ago |
|
|
b4687fcc2b |
Darwin: add new mach-o header flags.
binutils/ * od-macho.c (bfd_mach_o_header_flags_name): Add name for flags until BFD_MACH_O_MH_APP_EXTENSION_SAFE. include/mach-o/ * loader.h (bfd_mach_o_header_flags): Add BFD_MACH_O_MH_APP_EXTENSION_SAFE. |
10 years ago |
|
|
23d61901b0 |
binutils/configure update
Missed from
|
11 years ago |
|
|
42bcef4ad6 |
objdump: Handle 32-bit base address in debug_ranges / debug_loc.
When the DWARF address size is 32-bit, but the host machine is 64-bit,
objdump fails to spot base addresses specified in the .debug_ranges and
.debug_loc lists.
As an example, here is the output when dumping an example .debug_ranges
section with the pre-patched objdump:
Contents of the .debug_ranges section:
Offset Begin End
00000000 ffffffff 00000004 (start > end)
00000000 00000000 00000004
00000000 ffffffff 00000008 (start > end)
00000000 00000000 00000004
00000000 <End of list>
And this is what the same section looks like when dumped with the
patched version of objdump:
Contents of the .debug_ranges section:
Offset Begin End
00000000 ffffffff 00000004 (base address)
00000000 00000004 00000008
00000000 ffffffff 00000008 (base address)
00000000 00000008 0000000c
00000000 <End of list>
binutils/ChangeLog:
* dwarf.c (is_max_address): New function.
(display_loc_list): Remove out of date comment, use
is_max_address.
(display_debug_ranges): Likewise.
binutils/testsuite/ChangeLog:
* binutils-all/objdump.exp: Add test for .debug_ranges decode.
* binutils-all/dw2-ranges.S: New file.
* binutils-all/dw2-ranges.W: New file.
|
11 years ago |
|
|
08e4f6088d |
Update my email address in MAINTAINERS.
binutils/ * MAINTAINERS: Update my email address. |
11 years ago |
|
|
a4f8732b2a |
Fix building objcopy under mingw64 by replacing uses of strndup with xstrndup.
* objcopy.c (parse_symflags): Use xstrndup in place of strndup. (copy_main): Likewise. |
11 years ago |
|
|
f8c2a96547 |
Update translations.
binutils * po/ca.po: New Catalan translation. * configure.ac (ALL_LINGUAS): Add ca. * configure: Regenerate. gas * po/fr.po: Updated French translation. * po/uk.po: Updated Ukraninan translation. * po/zh_CN.po: New simplified Chinese translation. * configure.ac (ALL_LINGUAS): Add zh_CN. * configure: Regenerate. opcodes * po/zh_CN.po: Updated simplified Chinese translation. |
11 years ago |
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|
b53e4c0e7c |
mach-o: decode and display arm64 compact unwind entries.
|
11 years ago |
|
|
d8bd95efd8 |
Bump version to 2.26.51
bfd/ 2015-11-13 Tristan Gingold <gingold@adacore.com> * version.m4: Bump version to 2.26.51 * configure: Regenerate. binutils/ 2015-11-13 Tristan Gingold <gingold@adacore.com> * configure: Regenerate. gas/ 2015-11-13 Tristan Gingold <gingold@adacore.com> * configure: Regenerate. gprof/ 2015-11-13 Tristan Gingold <gingold@adacore.com> * configure: Regenerate. ld/ 2015-11-13 Tristan Gingold <gingold@adacore.com> * configure: Regenerate. opcodes/ 2015-11-13 Tristan Gingold <gingold@adacore.com> * configure: Regenerate. |
11 years ago |
|
|
7feec526b7 |
Add markers for release 2.26
binutils/ 2015-11-13 Tristan Gingold <gingold@adacore.com> * NEWS: Add marker for 2.26. gas/ 2015-11-13 Tristan Gingold <gingold@adacore.com> * NEWS: Add marker for 2.26. ld/ 2015-11-13 Tristan Gingold <gingold@adacore.com> * NEWS: Add marker for 2.26. |
11 years ago |
|
|
c4e0beacd7 |
binutils: Fix left shift of negative value.
This patch fixes all occurences of left-shifting negative constants in C code
which is undefined by the C standard.
binutils/ChangeLog:
* dwarf.c (read_leb128): Fix left shift of negative value.
|
11 years ago |
|
|
ab27339636 |
readelf verdef and verneed
readelf ought to notify when a symbol wrongly has both a version definition and a needed version. This patch does that, and removes the heuristic that only defined symbols in SHT_NOBITS sections have verneed entries. * readelf (process_version_sections): Check DT_VERNEED and DT_VERDEF for all symbols. Report "*both*" should a symbol have both a verneed and verdef. (get_symbol_version_string): Reduce indentation by early exits. Don't use SHT_NOBITS heuristic to detect case where a defined symbol has a verneed entry. |
11 years ago |
|
|
26f187cd16 |
Updated (simplified) Chinese translations for ld, bfd, binutils and gold.
* po/zh_CN.po: Updated (simplified) Chinese translation. |
11 years ago |
|
|
c6056a744a |
Add support to readelf for reading NetBSD ELF core notes.
binutils * binutils.c (process_netbsd_elf_note): New function. (process_note): Call the new function for NetBSD core notes. include * common.h (NT_NETBSD_MARCH): Define. |
11 years ago |
|
|
64e59d8e11 |
binutils/objcopy.c (setup_section): missing extract_symbol part
* objcopy.c (setup_section): Don't omit bfd_copy_private_bfd_data call when extract_symbol. |
11 years ago |
|
|
8b89121d44 |
Run add-symbol test on mips
* binutils-all/add-symbol.d: Run test on mips. Support either order of NEW and NEWDATA symbols. |
11 years ago |
|
|
397dd9a522 |
Fix typo in spelling of author's name.
|
11 years ago |
|
|
2b35fb28f3 |
Add ability for objcopy to insert new symbols into a binary.
PR binutils/19104 binutils * objcopy.c (command_line_switch): Add OPTION_ADD_SYMBOL. (copy_options): Add add-symbol. (copy_usage): Likewise. (parse_symflags): New function. (need_sym_before): New function. (create_new_symbol): New function. (filter_symbols): Add code to insert new symbols. (copy_main): Process OPTION_ADD_SYMBOL. * doc/binutils.texi: Document new feature. * NEWS: Add note about the new feature. tests * binutils-all/add-symbol.d: New test. * binutils-all/objcopy.exp: Run the new test. |
11 years ago |
|
|
595712bb07 |
Fix PR binutils/19147 -- off by one when printing NT_FILE note.
|
11 years ago |
|
|
21c40443ce |
binutils objcopy test tidy
The main aim of this patch is to perform more objcopy tests when we can build executables but not run them. ie. non-native with cross compiler available. * binutils-all/objcopy.exp: Delete trailing whitespace. Use "string equal" rather than "string match" when making simple string comparisons. Revert 2008-07-08 host_triplet checks. Perform non-run tests when we can build executable. (strip_executable, strip_executable_with_saving_a_symbol): Move run test later. Take extra param on whether to perform run test. Update callers. (keep_debug_symbols_and_test_copy): Delete unused vars. |
11 years ago |
|
|
e43fb83166 |
objcopy --extract-symbol
Calling bfd_copy_private_bfd_data is necessary to copy ELF file header info. binutils/ * objcopy.c (copy_object): Don't omit bfd_copy_private_bfd_data call when extract_symbol. bfd/ * elf32-v850.c (v850_elf_copy_private_bfd_data): Remove assertion that input and output .note.renesas sections are same size. Instead, only copy input to output if they are. |
11 years ago |
|
|
431ff0756a |
avr: Fix bugs in org/align tracking.
This commit fixes a few issues in the mechanism for passing information about ".org" and ".align" directives from the assembler to the linker, used by the avr target. In the original commit |
11 years ago |
|
|
886a250647 |
New ARC implementation.
bfd * archures.c: Remove support for older ARC. Added support for new
ARC cpus (ARC600, ARC601, ARC700, ARCV2).
* bfd-in2.h: Likewise.
* config.bfd: Likewise.
* cpu-arc.c: Likewise.
* elf32-arc.c: Totally changed file with a refactored
inplementation of the ARC port.
* libbfd.h: Added ARC specific relocation types.
* reloc.c: Likewise.
gas * config/tc-arc.c: Revamped file for ARC support.
* config/tc-arc.h: Likewise.
* doc/as.texinfo: Add new ARC options.
* doc/c-arc.texi: Likewise.
ld * configure.tgt: Added target arc-*-elf* and arc*-*-linux-uclibc*.
* emulparams/arcebelf_prof.sh: New file
* emulparams/arcebelf.sh: Likewise.
* emulparams/arceblinux_prof.sh: Likewise.
* emulparams/arceblinux.sh: Likewise.
* emulparams/arcelf_prof.sh: Likewise.
* emulparams/arcelf.sh: Likewise.
* emulparams/arclinux_prof.sh: Likewise.
* emulparams/arclinux.sh: Likewise.
* emulparams/arcv2elfx.sh: Likewise.
* emulparams/arcv2elf.sh: Likewise.
* emultempl/arclinux.em: Likewise.
* scripttempl/arclinux.sc: Likewise.
* scripttempl/elfarc.sc: Likewise.
* scripttempl/elfarcv2.sc: Likewise
* Makefile.am: Add new ARC emulations.
* Makefile.in: Regenerate.
* NEWS: Mention the new feature.
opcodes * arc-dis.c: Revamped file for ARC support
* arc-dis.h: Likewise.
* arc-ext.c: Likewise.
* arc-ext.h: Likewise.
* arc-opc.c: Likewise.
* arc-fxi.h: New file.
* arc-regs.h: Likewise.
* arc-tbl.h: Likewise.
binutils * readelf.c (get_machine_name): Remove A5 reference. Add ARCompact
and ARCv2.
(get_machine_flags): Handle EM_ARCV2 and EM_ARCOMPACT.
(guess_is_rela): Likewise.
(dump_relocations): Likewise.
(is_32bit_abs_reloc): Likewise.
(is_16bit_abs_reloc): Likewise.
(is_none_reloc): Likewise.
* NEWS: Mention the new feature.
include * dis-asm.h (arc_get_disassembler): Correct declaration.
* arc-reloc.def: Macro file with definition of all relocation
types.
* arc.h: Changed macros for the newly supported ARC cpus. Altered
enum defining the supported relocations.
* common.h: Changed EM_ARC_A5 definition to EM_ARC_COMPACT. Added
macro for EM_ARC_COMPACT2.
* arc-func.h: New file.
* arc.h: Likewise.
|
11 years ago |
|
|
4ee959fb24 |
Handle symbolic link when copying source file
* lib/utils-lib.exp (run_dump_test): Handle symbolic link when copying source file. |
11 years ago |