binutils-gdb

Commit Graph

Author	SHA1	Message	Date
Nick Clifton	0949843db2	Add (linker) support for CR16C processor	23 years ago
Joern Rennecke	ae51a426eb	2003-03-03 Andrew Stubbs <andrew.stubbs@superh.com> opcodes: * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in nofpu mode. Add BFD type bfd_mach_sh4_nommu_nofpu. * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions accordingly. bfd: * archures.c: Add bfd_mach_sh4_nommu_nofpu. * cpu-sh.c: Ditto. * elf32-sh.c: Ditto. * bfd-in2.h: Regenerate. include/elf: * sh.h: Add EF_SH4_NOMMU_NOFPU. gas: * config/tc-sh.c (md_parse_option): Add -isa=sh4-nofpu and -isa=sh4-nommu-nofpu options. Adjust help messages accordingly. (sh_elf_final_processing): Output BFD type sh4_nofpu if that is the most general type or the user specifically requested it. (md_assemble): Add a new error message for when an instruction is understood, but is not allowed due to an -isa option.	23 years ago
Richard Sandiford	676a64f422	Add fr450 support.	23 years ago
Nick Clifton	8884595866	Add support for the M32R2 processor.	23 years ago
Kazu Hirata	5c4491d385	* aix5ppc-core.c: Fix comment typos. * aout-arm.c: Likewise. * aout-ns32k.c: Likewise. * aoutx.h: Likewise. * archures.c: Likewise. * bfd-in.h: Likewise. * bfd.c: Likewise. * bfdio.c: Likewise. * coff-arm.c: Likewise. * coff-h8300.c: Likewise. * coff-i860.c: Likewise. * coff-m88k.c: Likewise. * coff-mcore.c: Likewise. * coff-ppc.c: Likewise. * coff-rs6000.c: Likewise. * coff-z8k.c: Likewise. * coff64-rs6000.c: Likewise. * coffcode.h: Likewise. * cofflink.c: Likewise. * cpu-alpha.c: Likewise. * cpu-arm.c: Likewise. * cpu-ns32k.c: Likewise. * dwarf2.c: Likewise. * bfd-in2.h: Regenerate.	23 years ago
Corinna Vinschen	af9ba62190	* archures.c (bfd_mach_sh4a, bfd_mach_sh4al_dsp, bfd_mach_sh4_nofpu, bfd_mach_sh4a_nofpu): New machine types. * bfd-in2.h: Rebuilt. * cpu-sh.c (compatible): Remove unused function. (SH4A_NEXT, SH4AL_DSP_NEXT, SH4_NOFPU_NEXT, SH4A_NOFPU_NEXT): New. (arch_info_struct): Add sh4a, sh4al_dsp, sh4-nofpu and sh4a-nofpu. * elf32-sh.c (sh_elf_set_mach_from_flags): Handle them.	23 years ago
Nick Clifton	3e60263266	Add ColfFire v4 support	23 years ago
Dave Brolley	9c8ee6396f	2003-10-08 Dave Brolley <brolley@redhat.com> On behalf of Michael Snyder <msnyder@redhat.com> * archures.c: Add FRV fr550 machine. * cpu-frv.c: Ditto. * elf32-frv.c: Ditto. * bfd-in2.h: Regenerate.	23 years ago
Chris Demetriou	5f74bc130d	[ bfd/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * archures.c (bfd_mach_mipsisa64r2): New define. * bfd-in2.h: Regenerate. * aoutx.h (NAME(aout,machine_type)): Handle bfd_mach_mipsisa64r2. * cpu-mips.c (I_mipsisa64r2): New enum value. (arch_info_struct): Add entry for I_mipsisa64r2. * elfxx-mips.c (_bfd_elf_mips_mach) (_bfd_mips_elf_print_private_bfd_data): Handle E_MIPS_ARCH_64R2. (mips_set_isa_flags): Add bfd_mach_mipsisa64r2 case. (mips_mach_extensions): Add entry for bfd_mach_mipsisa64r2. [ binutils/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * readelf.c (get_machine_flags): Handle E_MIPS_ARCH_64R2. [ gas/Changelog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * configure.in (mipsisa64r2, mipsisa64r2el, mipsisa64r2): New CPUs. configure: Regenerate. * config/tc-mips.c (imm2_expr): New variable. (md_assemble, mips16_ip): Initialize imm2_expr. (ISA_HAS_64BIT_REGS, ISA_HAS_DROR, ISA_HAS_ROR): Add ISA_MIPS64R2. (macro_build): Handle +A, +B, +C, +E, +F, +G, and +H format operands. (macro): Handle M_DEXT and M_DINS. (validate_mips_insn): Handle +E, +F, +G, +H, and +I format operands. (mips_ip): Likewise. (OPTION_MIPS64R2): New define. (md_longopts): New entry for -mips64r2 (OPTION_MIPS64R2). OPTION_ASE_BASE): Increase to compensate for OPTION_MIPS64R2. (md_parse_option): Handle OPTION_MIPS64R2. (s_mipsset): Handle setting "mips64r2" ISA. (mips_cpu_info_table): Add mips64r2. (md_show_usage): Document -mips64r2 option. * doc/as.texinfo: Docuemnt -mips64r2 option. * doc/c-mips.texi: Likewise. [ gas/testsuite/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * gas/mips/cp0-names-mips64r2.d: New file. * gas/mips/cp0sel-names-mips64r2.d: New file. * gas/mips/elf_arch_mips64r2.d: New file. * gas/mips/hwr-names-mips64r2.d: New file. * gas/mips/mips32r2-ill-fp64.l: New file. * gas/mips/mips32r2-ill-fp64.s: New file. * gas/mips/mips64r2-ill.l: New file. * gas/mips/mips64r2-ill.s: New file. * gas/mips/mips64r2.d: New file. * gas/mips/mips64r2.s: New file. * gas/mips/mips.exp: Define "mips64r2" arch, and run new tests. [ include/elf/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * mips.h (E_MIPS_ARCH_64R2): New define. [ include/opcode/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * mips.h: Document +E, +F, +G, +H, and +I operand types. Update documentation of I, +B and +C operand types. (INSN_ISA64R2, ISA_MIPS64R2, CPU_MIPS64R2): New defines. (M_DEXT, M_DINS): New enum values. [ ld/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * ldmain.c (get_emulation): Ignore "-mips64r2". [ ld/testsuite/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * ld-mips-elf/mips-elf-flags.exp: Add tests for combinations with MIPS64r2. [ opcodes/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * mips-dis.c (mips_arch_choices): Add entry for "mips64r2" (print_insn_args): Add handing for +E, +F, +G, and +H. * mips-opc.c (I65): New define for MIPS64r2. (mips_builtin_opcodes): Add "dext", "dextm", "dextu", "dins", "dinsm", "dinsu", "drotl", "drotr", "drotr32", "drotrv", "dsbh", and "dshd" for MIPS64r2. Adjust "dror", "dror32", and "drorv" to be supported on MIPS64r2.	23 years ago
Joel Brobecker	42acdc7c30	* archures.c: Add new machine names for hppa. * bfd-in2.h: Regenerate. * cpu-hppa.c: Use the new machine names.	23 years ago
Nick Clifton	8ad30312ff	Add binutils support for v850e1 processor	23 years ago
Nick Clifton	3b260895e3	Add MSP430 variants	23 years ago
Richard Sandiford	5a7ea74950	include/opcode/ * mips.h (CPU_RM7000): New macro. (OPCODE_IS_MEMBER): Match CPU_RM7000 against 4650 insns. bfd/ * archures.c (bfd_mach_mips7000): New. * bfd-in2.h: Regenerated. * cpu-mips.c (arch_info_struct): Add an entry for mips:7000. * elfxx-mips.c (mips_set_isa_flags): Handle bfd_mach_mips7000. (mips_mach_extensions): Add an entry for it. opcodes/ * mips-dis.c (mips_arch_choices): Add rm7000 and rm9000 entries. gas/ * config/tc-mips.c (hilo_interlocks): True for CPU_RM7000. (mips_cpu_info_table): Add rm7000 and rm9000 entries. gas/testsuite/ * gas/mips/rm7000.[sd]: New test. * gas/mips/mips.exp: Run it.	23 years ago
Alexandre Oliva	b08fa4d3bf	2001-05-06 Alexandre Oliva <aoliva@redhat.com> * elf-m10300.c (compute_function_info): Account for AM33 registers in `movm' when computing stack space for `call' when linking for AM33/2.0 link. 2000-04-01 Alexandre Oliva <aoliva@cygnus.com> * archures.c (bfd_mach_am33_2): Renamed from bfd_mach_am332. * bfd-in2.h: Rebuilt. * cpu-m10300.c (bfd_am33_2_arch): Renamed from bfd_am332_arch. * elf-m10300.c: Updated. 2000-03-31 Alexandre Oliva <aoliva@cygnus.com> * archures.c (bfd_mach_am332): Defined. * bfd-in2.h: Rebuilt. * cpu-m10300.c (bfd_am332_arch): Defined. (bfd_am33_arch): Chained with am33-2. * elf-m10300.c (elf_mn10300_mach): Handle am332. (_bfd_mn10300_elf_final_write_processing): Likewise.	23 years ago
Alan Modra	c58b95236c	Convert to C90 and a few tweaks.	23 years ago
Richard Sandiford	f4984206d8	include/elf/ * h8.h (E_H8_MACH_H8300SXN): New flag. bfd/ * archures.c (bfd_mach_h8300sxn): New architecture. * bfd-in2.h: Regenerate. * cpu-h8300.c (h8300_scan): Check for 'sxn'. (h8300sxn_info_struct): New. (h8300sx_info_struct): Link to it. * elf32-h8300.c (elf32_h8_mach): Add h8300sxn case. (elf32_h8_final_write_processing): Likewise. gas/ * config/tc-h8300.c (h8300sxnmode): New. (md_pseudo_table): Add .h8300sxn entry. Sync others with FSF version. ld/ * configure.tgt (h8300): Add h8300sxn emulations. Makefile.am (ALL_EMULATIONS): Add eh8300sxn.o and eh8300sxnelf.o. (eh8300sxn.c, eh8300sxnelf.c): New rules. * Makefile.in: Regenerate. * emulparams/h8300sxnelf.sh, emulparams/h8300sxn.sh: New files.	24 years ago
Michael Snyder	5d1db417ca	2003-05-16 Michael Snyder <msnyder@redhat.com> From Bernd Schmidt <bernds@redhat.com> * archures.c (bfd_mach_h8300sx): New. * bfd-in2.h: Regenerate. * cpu-h8300.c (h8300_scan)): Add support for h8300sx. (h8300sx_info_struct): New. (h8300s_info_struct): Link to it. * elf32-h8300.c (elf32_h8_mach): Add support for h8300sx. (elf32_h8_final_write_processing): Likewise. (elf32_h8_relax_section): Likewise.	24 years ago
Nick Clifton	8d9cd6b19b	Add support for h8300hn and h8300sn	24 years ago
Joern Rennecke	ef23021837	bfd: * archures.c (enum bfd_architecture): Amend comment to refer to SuperH. * cpu-sh.c: Likewise. * elf32-sh.c: Likewise. * reloc.c (bfd_reloc_code_real): Likewise. * elf32-sh64-com.c: Change comment to refer to SuperH. * elf32-sh64.c: Likewise. * elf64-sh64.c: Likewise. * bfd-in2.h (enum bfd_architecture): Regenerate. binutils: * readelf.c (get_machine_name) <EM_SH>: Amend return value to refer to SuperH. gas: * config/tc-sh.c: Amend comment to refer to SuperH. * config/tc-sh.h: Likewise. (LISTING_HEADER): Amend to refer to SuperH. * config/tc-sh64.c: Change comment to refer to SuperH. * config/tc-sh64.h (LISTING_HEADER): Change to refer to SuperH. * doc/as.texinfo [SH, GENERIC]: Amend / Change to refer to SuperH. * doc/c-sh.texi: Amend to refer to SuperH. Add SuperH architecture documentation references. * doc/c-sh64.texi: Change to refer to SuperH. include/elf: * common.h (EM_SH): Amend comment to refer to SuperH. ld/testsuite: * ld-sh/sh64/crange3-cmpct.rd (Machine): Change to refer to SuperH. * ld-sh/sh64/crange3-media.rd (Machine): Likewise.	24 years ago
Nick Clifton	26597c8633	Replace references to Mitsubishi M32R with references to Renesas M32R.	24 years ago
Nick Clifton	c2dcd04ec8	Replace occurrances of 'Hitachi' with 'Renesas'.	24 years ago
Svein Seldal	be33c5dd4d	Namespace cleanup for the tic4x target. Replace s/c4x/tic4x/ and s/c3x/tic3x/. 2003 copyright update	24 years ago
Nick Clifton	e0001a05d2	Add Xtensa port	24 years ago
Nick Clifton	5a6c681789	Fixes for iWMMXt contribution.	24 years ago
Nick Clifton	e16bb312f5	Add iWMMXt support	24 years ago
Nick Clifton	fde78edd7a	Add support for marking ARM ELF binaries as support the Cirrus EP9312 Maverick floating point co-processor.	24 years ago
Nick Clifton	5177500f26	Add SH2E support	24 years ago
Stan Cox	a75473eb66	* Makefile.am (ALL_MACHINES): Add cpu-iq2000.lo. (ALL_MACHINES_CFILES): Add cpu-iq2000.c. (BFD32_BACKENDS): Add elf32-iq2000.lo. (BFD32_BACKENDS_CFILES): Add elf32-iq2000.c. (cpu-iq2000.lo): New target. * Makefile.in: Regenerate. * config.bfd: Handle iq2000--elf. archures.c (bfd_architecture): Add bfd_{arch,mach}_iq2000. (bfd_archures_list): Add bfd_iq2000_arch. * configure.in: Handle bfd_elf32_iq2000_vec. * configure: Regenerate. * reloc.c: Add BFD_RELOC_IQ2000_OFFSET_16, BFD_RELOC_IQ2000_OFFSET_21, and BFD_RELOC_IQ2000_UHI16. * targets.c (bfd_elf32_iq2000_vec): Declare. (bfd_target_vector): Add bfd_elf32_iq2000_vec. * elf.c (prep_headers): Set e_machine to EM_IQ2000. * cpu-iq2000.c: New file. * elf32-iq2000.c: Likewise. * libbfd.h: Regenerate. * bfd-in2.h: Likewise.	24 years ago
Chris Demetriou	af7ee8bfa9	[ bfd/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * aoutx.h (NAME(aout,machine_type)): Add bfd_mach_mipsisa32r2 case. * archures.c (bfd_mach_mipsisa32r2): New define. * bfd-in2.h: Regenerate. * cpu-mips.c (I_mipsisa32r2): New enum value. (arch_info_struct): Add entry for I_mipsisa32r2. * elfxx-mips.c (elf_mips_isa, _bfd_elf_mips_mach) (_bfd_mips_elf_print_private_bfd_data): Handle E_MIPS_ARCH_32R2. (_bfd_mips_elf_final_write_processing): Add bfd_mach_mipsisa32r2 case. (_bfd_mips_elf_merge_private_bfd_data): Handle merging of binaries marked as using MIPS32 Release 2. [ binutils/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * doc/binutils.texi (objdump): Note MIPS HWR (Hardware Register) changes in MIPS -M options. [ gas/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * configure.in: Recognize mipsisa32r2, mipsisa32r2el, and CPU variants. * configure: Regenerate. * config/tc-mips.c (ISA_HAS_DROR, ISA_HAS_ROR): New defines. (macro_build): Handle "K" operand. (macro2): Use ISA_HAS_DROR and ISA_HAS_ROR in the places where CPU_HAS_DROR and CPU_HAS_ROR are currently used. (mips_ip): New variable "lastpos", and implement "+A", "+B", and "+C" operands for MIPS32 Release 2 ins/ext instructions. Implement "K" operand for MIPS32 Release 2 rdhwr instruction. (validate_mips_insn): Implement "+" as a way to extend the allowed operands, and implement "K", "+A", "+B", and "+C" operands. (OPTION_MIPS32R2): New define. (md_longopts): Add entry for OPTION_MIPS32R2. (OPTION_ELF_BASE): Adjust to accomodate OPTIONS_MIPS32R2. (md_parse_option): Handle OPTION_MIPS32R2. (s_mipsset): Reimplement handling of ".set mipsN" options and add support for ".set mips32r2". (mips_cpu_info_table): Add entry for "mips32r2" (MIPS32 Release 2). (md_show_usage): Document "-mips32r2" option. * doc/as.texinfo: Document "-mips32r2" option. * doc/c-mips.texi: Likewise. [ gas/testsuite/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * gas/mips/cp0-names-mips32r2.d: New test. * gas/mips/hwr-names-mips32r2.d: New test. * gas/mips/hwr-names-numeric.d: New test. * gas/mips/hwr-names.s: New test source file. * gas/mips/mips32r2.d: New test. * gas/mips/mips32r2.s: New test source file. * gas/mips/mips32r2-ill.l: New test. * gas/mips/mips32r2-ill.s: New test source file. * gas/mips/mips.exp: Add mips32r2 architecture data array entry. Run new tests mentioned above. [ include/elf/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * mips.h (E_MIPS_ARCH_32R2): New define. [ include/opcode/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * mips.h: Document "+" as the start of two-character operand type names, and add new "K", "+A", "+B", and "+C" operand types. (OP_MASK_INSMSB, OP_SH_INSMSB, OP_MASK_EXTMSB) (OP_SH_EXTMSB, INSN_ISA32R2, ISA_MIPS32R2, CPU_MIPS32R2): New defines. [ opcodes/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * mips-dis.c (mips_cp0_names_mips3264r2, mips_hwr_names_numeric) (mips_hwr_names_mips3264r2): New arrays. (mips_arch_choice): New "hwr_names" member. (mips_arch_choices): Adjust for structure change, and add a new entry for "mips32r2" ISA. (mips_hwr_names): New variable. (set_default_mips_dis_options): Set mips_hwr_names. (parse_mips_dis_option): New "hwr-names" option which sets mips_hwr_names, and adjust "reg-names=ARCH" to set mips_hwr_names. (print_insn_arg): Change return type to "int" and use that to indicate number of characters consumed. Add support for "+" operand extension character, "+A", "+B", "+C", and "K" operands. (print_insn_mips): Adjust for changes to print_insn_arg. (print_mips_disassembler_options): Adjust for "hwr-names" addition and "reg-names" change. * mips-opc (I33): New define (shorthand for INSN_ISA32R2). (mips_builtin_opcodes): Note that "nop" and "ssnop" are special forms of "sll". Add new MIPS32 Release 2 instructions: ehb, di, ei, ext, ins, jr.hb, jalr.hb, mfhc1, mfhc2, mthc1, mthc2, rdhwr, rdpgpr, seb, seh, synci, wrpgpr, wsbh. Note that hardware rotate instructions (ror, rorv) can be used on MIPS32 Release 2, and add the official mnemonics for them (rotr, rotrv) and the similar "rotl" mnemonic for left-rotate.	24 years ago
Nick Clifton	2469cfa284	Add support for msp430.	24 years ago
Nick Clifton	312b768e2f	Change linker's default behaviour - it will now reject binary files whoes architecture it does not recognise, unless it has explicitly told to accept them.	24 years ago
Stephane Carrez	bc7c6a9029	* bfd-in2.h (bfd_mach_m6812): Rebuild. * archures.c (bfd_mach_m6812_default, bfd_mach_m6812, bfd_mach_m6812s): Declare. * elf32-m68hc12.c (m68hc12_elf_set_mach_from_flags): New function. (_bfd_m68hc12_elf_set_private_flags): Call it. (_bfd_m68hc12_elf_print_private_bfd_data): Report processor version. (_bfd_m68hc12_elf_merge_private_bfd_data): Merge the flags and report microcontroller incompatibilities (HC12 vs HCS12). (elf_backend_object_p): Update.	24 years ago
Alan Modra	b34976b65a	s/boolean/bfd_boolean/ s/true/TRUE/ s/false/FALSE/. Simplify comparisons of bfd_boolean vars with TRUE/FALSE. Formatting.	24 years ago
Nick Clifton	3af9a47b1c	Add support for PEF, Mach-O, xSYM	24 years ago
Alan Modra	686e4055ef	* archures.c (bfd_mach_i386_i386, bfd_mach_i386_i8086, bfd_mach_i386_i386_intel_syntax, bfd_mach_x86_64, bfd_mach_x86_64_intel_syntax bfd_mach_ppc, bfd_mach_ppc64, bfd_mach_rs6k, bfd_mach_d10v, bfd_mach_sh, bfd_mach_v850, bfd_mach_arc_5, bfd_mach_arc_6, bfd_mach_arc_7, bfd_mach_arc_8, bfd_mach_m32r, bfd_mach_frv, bfd_mach_frvsimple, bfd_mach_ia64_elf64, bfd_mach_ia64_elf32, bfd_mach_ip2022, bfd_mach_ip2022ext, bfd_mach_s390_31, bfd_mach_s390_64, bfd_mach_xstormy16): Renumber. * bfd-in2.h: Regenerate.	24 years ago
Richard Sandiford	00707a0e89	[include/elf] * mips.h (E_MIPS_MACH_4120, E_MIPS_MACH_5400, E_MIPS_MACH_5500): New. [bfd/] * archures.c (bfd_mach_mips4120, bfd_mach_mips5400): New. (bfd_mach_mips5500): New. * cpu-mips.c (I_mips4120, I_mips5400, I_mips5500): New. (arch_info_struct): Add corresponding entries here. * elfxx-mips.c (_bfd_elf_mips_mach): Handle E_MIPS_MACH_4120, E_MIPS_MACH_5400 and E_MIPS_MACH_5500. (_bfd_mips_elf_final_write_processing): Handle bfd_mach_mips4120, bfd_mach_mips5400 and bfd_mach_mips5500. (_bfd_mips_elf_mach_extends_p): New function. (_bfd_mips_elf_merge_private_bfd_data): Use it to help merge the EF_MIPS_MACH flags. * bfd-in2.h: Regenerate.	24 years ago
Nick Clifton	86aba9dbfa	Add linker relaxation to v850 toolchain	24 years ago
Nick Clifton	026df7c5e6	Add TMS320C4x support	24 years ago
Elena Zannoni	d62b1198f8	2002-08-19 Elena Zannoni <ezannoni@redhat.com> * archures.c (bfd_mach_ppc_e500): Added. * bfd-in2.h: Rebuilt. * cpu-powerpc.c (bfd_powerpc_archs): Added e500.	24 years ago
Nick Clifton	cf88bb9f09	Add IP2k support to BFD and LD	24 years ago
Dave Brolley	4e5ba5b7eb	2002-06-18 Dave Brolley <brolley@redhat.com> From Catherine Moore, Michael Meissner, Dave Brolley: * po/SRC-POTFILES.in: Add cpu-frv.c and elf32-frv.c * targets.c: Support bfd_elf32_frv_vec. * reloc.c: Add FRV relocs. * configure.in: Add support for bfd-elf32-frv-vec. * config.bfd (targ_cpu): Add support for frv--elf. archures.c: Add frv arch and machines. * Makefile.am (ALL_MACHINES): Add cpu-frv.lo. (ALL_MACHINES_CFILES): Add cpu-frv.c. (BFD32_BACKENDS): Add elf32-frv.lo. (BFD32_BACKENDS_CFILES): Add elf32-frv.c (cpu-frv.lo): New target. (elf32-frv.lo): New target. * cpu-frv.c: New file. * elf32-frv.c: New file.	25 years ago
Nick Clifton	d172d4ba03	Add DLX target	25 years ago
Alan Modra	aa3d5824a4	* archures.c (bfd_lookup_arch): Move the list order comment.. (struct bfd_arch_info): ..to where it belongs.	25 years ago
Alan Modra	99dc00929f	* archures.c (bfd_lookup_arch): Add comment on list order. (bfd_default_set_arch_mach): Use bfd_lookup_arch. * cpu-powerpc.c (bfd_powerpc_archs): Re-order so that the default is always at head of list.	25 years ago
Alan Modra	b74fa2cd15	* archures.c (bfd_default_compatible): Test bits_per_word. * cpu-i386.c (i386_compatible): Remove. Replace occurrences with bfd_default_compatible. * cpu-i370.c (i370_compatible): Likewise. * cpu-sparc.c (sparc_compatible): Likewise. * cpu-h8300.c (compatible): Test in->arch == out->arch.	25 years ago
Martin Schwidefsky	befc3abbed	2002-02-19 Martin Schwidefsky <schwidefsky@de.ibm.com> * archures.c (bfd_mach_s390_esa): Rename to bfd_mach_s390_31. (bfd_mach_s390_esame): Rename to bfd_mach_s390_64. * bfd-in2.h: Regenerate. * cpu-s390.c (arch_info_struct): Use renamed architecture defines. Replace architecture name "s390" with "s390:31-bit" and "s390:esame" with "s390:64-bit". * elf32-s390.c (elf_howto_table): Add 32 bit pc relative relocations. (elf_s390_reloc_type_lookup): Likewise. (elf_s390_check_relocs): Likewise. (elf_s390_gc_sweep_hook): Likewise. (elf_s390_relocate_section): Likewise. (elf_s390_object_p): Use renamed architecture define. * elf64-s390.c (elf_s390_object_p): Use renamed architecture define.	25 years ago
Alexandre Oliva	fbca6ad9f3	Contribute sh64-elf. 2002-01-23 Alexandre Oliva <aoliva@redhat.com> * reloc.c (R_SH_GOTPLT32, R_SH_GOT_LOW16, R_SH_GOT_MEDLOW16, R_SH_GOT_MEDHI16, R_SH_GOT_HI16, R_SH_GOTPLT_LOW16, R_SH_GOTPLT_MEDLOW16, R_SH_GOTPLT_MEDHI16, R_SH_GOTPLT_HI16, R_SH_PLT_LOW16, R_SH_PLT_MEDLOW16, R_SH_PLT_MEDHI16, R_SH_PLT_HI16, R_SH_GOTOFF_LOW16, R_SH_GOTOFF_MEDLOW16, R_SH_GOTOFF_MEDHI16, R_SH_GOTOFF_HI16, R_SH_GOTPC_LOW16, R_SH_GOTPC_MEDLOW16, R_SH_GOTPC_MEDHI16, R_SH_GOTPC_HI16, R_SH_GOT10BY4, R_SH_GOTPLT10BY4, R_SH_GOT10BY8, R_SH_GOTPLT10BY8, R_SH_COPY64, R_SH_GLOB_DAT64, R_SH_JMP_SLOT64, R_SH_RELATIVE64): New relocs. * libbfd.h, bfd-in2.h: Rebuilt. * elf32-sh.c (sh_elf_howto_table): Define new relocs. (sh_reloc_map): Map them. (PLT_ENTRY_SIZE, elf_sh_plt0_entry_be, elf_sh_plt0_entry_le, elf_sh_plt_entry_be, elf_sh_plt_entry_le, elf_sh_pic_plt_entry_be, elf_sh_pic_plt_entry_le, elf_sh_plt0_entry, elf_sh_plt_entry, elf_sh_pic_plt_entry, elf_sh_sizeof_plt, elf_sh_plt_plt0_offset, elf_sh_plt0_gotplt_offset, elf_sh_plt_temp_offset, elf_sh_plt_symbol_offset, elf_sh_plt_reloc_offset, movi_shori_putval) [INCLUDE_SHMEDIA]: New. (elf_sh_link_hash_entry) [INCLUDE_SHMEDIA]: Add datalabel_got_offset. (sh_elf_link_hash_newfunc): Initialize it. (sh_elf_relocate_section): Augment the scope of seen_stt_datalabel. Introduce GOTPLT support. Extend GOTPC, PLT, GOT and GOTOFF handling to new SHmedia relocation types. Support GOT_BIAS. (sh_elf_check_relocs): Likewise. (sh_elf_finish_dynamic_symbol) [TARGET_SHMEDIA]: Set up values in PLT entries using movi_shori_putval. Support GOT_BIAS. (sh_elf_finish_dynamic_sections): Likewise. * elf32-sh64.c (shmedia_prepare_reloc): Do not add addend to relocation, it's now done by the caller. (GOT_BIAS): New. * elf64-sh64.c (GOT_BIAS, PLT_ENTRY_SIZE, elf_sh64_sizeof_plt, elf_sh64_plt_plt0_offset, elf_sh64_plt0_gotplt_offset, elf_sh64_plt_temp_offset, elf_sh64_plt_symbol_offset, elf_sh64_plt_reloc_offset, ELF_DYNAMIC_INTERPRETER, elf_sh64_pcrel_relocs_copied, elf_sh64_link_hash_entry, elf_sh64_link_hash_table, sh64_elf64_link_hash_traverse, sh64_elf64_hash_table): New. (sh_elf64_howto_table): Introduce new relocs. (sh_elf64_info_to_howto): Accept new PIC relocs. (sh_elf64_relocate_section): Augment the scope of seen_stt_datalabel. Support new PIC relocs. (sh_elf64_check_relocs): Support new PIC relocs. (elf_sh64_plt0_entry_be, elf_sh64_plt0_entry_le, elf_sh64_plt_entry_be, elf_sh64_plt_entry_le, elf_sh64_pic_plt_entry_be, elf_sh64_pic_plt_entry_le, elf_sh64_plt0_entry, elf_sh64_plt_entry, elf_sh64_pic_plt_entry, sh64_elf64_link_hash_newfunc, sh64_elf64_link_hash_table_create, movi_shori_putval, movi_3shori_putval, sh64_elf64_create_dynamic_sections, sh64_elf64_adjust_dynamic_symbol, sh64_elf64_discard_copies, sh64_elf64_size_dynamic_sections, sh64_elf64_finish_dynamic_symbol, sh64_elf64_finish_dynamic_sections): New. (elf_backend_create_dynamic-sections, bfd_elf64_bfd_link_hash_table_create, elf_backend_adjust_dynamic_symbol, elf_backend_size_dynamic_sections, elf_backend_finish_dynamic_symbol, elf_backend_finish_dynamic_sections, elf_backend_want_got_plt, elf_backend_plt_readonly, elf_backend_want_plt_sym, elf_backend_got_header_size, elf_backend_plt_header_size): Define. 2001-05-16 Alexandre Oliva <aoliva@redhat.com> * elf32-sh.c: Renumbered and renamed some SH5 relocations to match official numbers and names; moved unmaching ones to the range 0xf2-0xff. * elf32-sh64.c, elf64-sh64.c: Likewise. 2001-03-12 DJ Delorie <dj@redhat.com> * elf32-sh.c (sh_elf_relax_section): Don't relax SHmedia sections. 2001-03-12 DJ Delorie <dj@redhat.com> * elf32-sh64.c (shmedia_prepare_reloc): Validate relocs that must be aligned. * elf64-sh64.c (sh_elf64_relocate_section): Ditto. 2001-01-14 Hans-Peter Nilsson <hpn@cygnus.com> * elf32-sh64.c (bfd_elf32_bfd_copy_private_section_data): Define. (sh64_elf_fake_sections): Set type to SHT_SH5_CR_SORTED for a .cranges section with SEC_SORT_ENTRIES set. (sh64_backend_section_from_shdr): Set SEC_SORT_ENTRIES on an incoming sorted .cranges section. (sh64_bfd_elf_copy_private_section_data): New. (sh64_elf_final_write_processing): Only sort .cranges and modify start address if called by linker. 2001-01-08 Ben Elliston <bje@redhat.com> * elf32-sh64.c (sh64_elf_final_write_processing): Activate Hans-Peter Nilsson's set bit 0 patch from 2001-01-06. * elf64-sh64.c (sh64_elf64_final_write_processing): Ditto. 2001-01-06 Hans-Peter Nilsson <hpn@cygnus.com> * elf64-sh64.c (sh_elf64_howto_table): No open brace at start of line. Add comments before all entries. <R_SH_PT_16, R_SH_SHMEDIA_CODE>: Correct and clarify describing comment. (sh_elf64_reloc): Correct head comment. (sh_elf64_relocate_section): Correct spacing. <relocating for a local symbol>: Do not honour STO_SH5_ISA32; instead call reloc_dangerous callback. <case R_SH_SHMEDIA_CODE>: New case. (sh_elf64_gc_mark_hook): Correct spacing. (sh_elf64_check_relocs): Ditto. * elf32-sh64.c (shmedia_prepare_reloc) <case R_SH_SHMEDIA_CODE>: New case. * elf32-sh.c: Correct #endif comments for #ifndef-wrapped functions. (sh_elf_howto_table) <R_SH_PT_16, R_SH_SHMEDIA_CODE>: Correct, clarify describing comment. Add comments before all entries. (sh_elf_relocate_section) <relocating for a local symbol>: Do not honour STO_SH5_ISA32; instead call reloc_dangerous callback. 2001-01-06 Hans-Peter Nilsson <hpn@cygnus.com> Sort .cranges section in final link. Prepare to set bit 0 on entry address. * elf32-sh64.c (struct sh64_find_section_vma_data): New. (sh64_elf_link_output_symbol_hook): Fix typo in prototype. (sh64_elf_set_mach_from_flags): Set SEC_DEBUGGING on incoming .cranges section. (sh64_backend_section_from_shdr): New, to recognize SHT_SH5_CR_SORTED on incoming .cranges section. (elf_backend_section_from_shdr): Define. (sh64_elf_final_write_processing): Sort outgoing .cranges section. (New, temporarily disabled:) Set bit 0 on entry address according to ISA type. (sh64_find_section_for_address): New. (crange_qsort_cmpb, crange_qsort_cmpl, crange_bsearch_cmpb, crange_bsearch_cmpl): Move here from opcodes/sh64-dis.c. (sh64_address_in_cranges): Move here from opcodes/sh64-dis.c. Use bfd_malloc, not xmalloc. (sh64_get_contents_type): Move here from opcodes/sh64-dis.c. Make global. * elf32-sh64.c (sh64_elf64_final_write_processing): New, (but temporarily disabled) setting bit 0 on entry address. (elf_backend_final_write_processing): Define. 2001-01-05 Hans-Peter Nilsson <hpn@cygnus.com> * elf32-sh.c (sh_elf_howto_table) <R_SH_PT_16>: Adjust fields to be a proper relocation for PTA and PTB rather than a marker. <R_SH_IMMU5, R_SH_IMMS6, R_SH_IMMU6, R_SH_IMMS10, R_SH_IMMS10BY2, R_SH_IMMS10BY4, R_SH_IMMS10BY8, R_SH_IMMS16, R_SH_IMMU16, R_SH_IMM_LOW16, R_SH_IMM_LOW16_PCREL, R_SH_IMM_MEDLOW16, R_SH_IMM_MEDLOW16_PCREL, R_SH_IMM_MEDHI16, R_SH_IMM_MEDHI16_PCREL, R_SH_IMM_HI16, R_SH_IMM_HI16_PCREL, R_SH_64, R_SH_64_PCREL>: Zero src_mask. * elf64-sh64.c: Ditto. (sh_elf64_relocate_section) <case R_SH_PT_16>: New case. * elf32-sh64.c: Include opcodes/sh64-opc.h (shmedia_prepare_reloc): Take a bfd_link_info pointer as first argument. Drop const qualifiers from "bfd " and "bfd_byte " parameters. No unused parameters. Caller changed. <case R_SH_PT_16>: New case. * Makefile.am (elf32-sh64.lo): Add dependency on sh64-opc.h. * Makefile.in: Regenerate. 2000-12-30 Hans-Peter Nilsson <hpn@cygnus.com> * elf64-sh64.c (sh64_elf64_fake_sections): Set SHF_SH5_ISA32 for all code sections. (sh_elf64_set_mach_from_flags): Change from EF_SH64 to EF_SH5. (sh64_elf_merge_private_data): Ditto. * elf32-sh64.c (sh64_elf_fake_sections): Use sh64_elf_section_data to access stored section flags. (sh64_elf_final_write_processing): Return immediately unless called by linker. Use sh64_elf_section_data (cranges) to get size of linker-generated cranges entries. (sh64_elf_copy_private_data): Add missing "return true". (sh64_elf_set_mach_from_flags): Change from EF_SH64 to EF_SH5. (sh_elf64_merge_private_data): Ditto. 2000-12-19 Hans-Peter Nilsson <hpn@cygnus.com> * elf64-sh64.c (sh64_elf64_fake_sections): New, copy of elf64-sh64.c:sh64_elf_fake_sections. (elf_backend_fake_sections): Define as sh64_elf64_fake_sections. 2000-12-18 Hans-Peter Nilsson <hpn@cygnus.com> * elf32-sh64.c (sh64_elf_copy_private_data_internal): Delete. (sh64_elf_final_write_processing): New. (elf_backend_final_write_processing): Define. (sh64_elf_fake_sections): Get header flags from tdata field. (sh64_elf_copy_private_data): Do not call sh64_elf_copy_private_data_internal, just copy e_flags field. (sh64_elf_merge_private_data): Do not call sh64_elf_copy_private_data_internal. 2000-12-12 Hans-Peter Nilsson <hpn@cygnus.com> Remove EF_SH64_ABI64, let ELF size make difference. Remove SH64-specific BFD section flag. * elf32-sh64.c (sh64_elf_fake_sections): Recognize section as containing SHmedia through elf_section_data (asect)->tdata non-zero, not using a BFD section flag. (sh64_elf_set_mach_from_flags): Don't recognize EF_SH64_ABI64. (sh64_elf_merge_private_data): Similar. (elf_backend_section_flags): Don't define. (sh64_elf_backend_section_flags): Delete. * elf64-sh64.c (sh_elf64_set_mach_from_flags): Recognize EF_SH64, not EF_SH64_ABI64. (sh_elf64_merge_private_data): Similar. * section.c (Section flags definitions): Don't define SEC_SH_ISA_SHMEDIA. (bfd-in2.h): Regenerate. 2000-12-09 Hans-Peter Nilsson <hpn@cygnus.com> Make DataLabel references work with partial linking. * elf32-sh64.c: Fix formatting. (sh64_elf_link_output_symbol_hook): New. (elf_backend_link_output_symbol_hook): Define to sh64_elf_link_output_symbol_hook. (sh64_elf_add_symbol_hook): Make DataLabel symbol just global undefined if partial linking. Adjust sanity check. * elf64-sh64.c (sh64_elf64_link_output_symbol_hook): New. (elf_backend_link_output_symbol_hook): Define to sh64_elf64_link_output_symbol_hook. (sh64_elf64_add_symbol_hook): Make DataLabel symbol just global undefined if partial linking. Adjust sanity check. 2000-12-07 Hans-Peter Nilsson <hpn@cygnus.com> Implement semantics for inter-file DataLabel references. * elf64-sh64.c (DATALABEL_SUFFIX): Define. (sh64_elf64_add_symbol_hook): New. (sh_elf64_relocate_section): If passing an indirect symbol with st_type STT_DATALABEL on the way to a symbol with st_other STO_SH5_ISA32, do not bitor 1 to the relocation. (elf_backend_add_symbol_hook): Define to sh64_elf64_add_symbol_hook. * elf64-sh32.c: Tweak comments. (DATALABEL_SUFFIX): Define. (sh64_elf_add_symbol_hook): New. (elf_backend_add_symbol_hook): Define to sh64_elf_add_symbol_hook. * elf32-sh.c (sh_elf_relocate_section): If passing an indirect symbol with st_type STT_DATALABEL on the way to a symbol with st_other STO_SH5_ISA32, do not bitor 1 to the relocation. 2000-12-05 Hans-Peter Nilsson <hpn@cygnus.com> Pass through STT_DATALABEL. * elf32-sh64.c (sh64_elf_get_symbol_type): New. (elf_backend_get_symbol_type): Define. * elf64-sh64.c (sh64_elf64_get_symbol_type): New. (elf_backend_get_symbol_type): Define. 2000-11-30 Hans-Peter Nilsson <hpn@cygnus.com> * elf32-sh64.c: Tweak comments. (sh64_elf_copy_private_data_internal): Add prototype. (bfd_elf32_bfd_set_private_flags): Define. (sh64_elf_copy_private_data_internal): Compare machine name, not textual BFD target name, to check whether to copy section flag SHF_SH5_ISA32. (sh64_elf_merge_private_data): Validize bfd_get_arch_size. Tweak section-contents-type-mismatch message. (shmedia_prepare_reloc): Add ATTRIBUTE_UNUSED markers. Validize reloc-types. * elf64-sh64.c: New file. * targets.c (bfd_elf64_sh64_vec, bfd_elf64_sh64l_vec): Declare. * Makefile.am (BFD64_BACKENDS): Add elf64-sh64.lo. (BFD64_BACKENDS_CFILES): Add elf64-sh64.c. Regenerate dependencies. * Makefile.in: Regenerate. * config.bfd (sh64--elf): Add bfd_elf64_sh64_vec and bfd_elf64_sh64l_vec. * configure.in: Handle bfd_elf64_sh64_vec and bfd_elf64_sh64l_vec. * configure: Regenerate. * po/POTFILES.in: Regenerate. * po/bfd.pot: Regenerate. 2000-11-29 Hans-Peter Nilsson <hpn@cygnus.com> * elf32-sh64.c (sh64_elf_set_mach_from_flags): Do not recognize anything else but EF_SH64 and EF_SH64_ABI64. (sh64_elf_merge_private_data): Emit error for anything else but EF_SH64 and EF_SH64_ABI64. * config.bfd: Remove bfd_elf32_shblin_vec and bfd_elf32_shlin_vec from targ_selvecs. * configure.in: Add cofflink.lo to bfd_elf32_sh64_vec and bfd_elf32_sh64l_vec as a temporary measure. * configure: Regenerate. 2000-11-27 Hans-Peter Nilsson <hpn@cygnus.com> * cpu-sh.c (arch_info_struct): Include sh5 item unconditionalized. * config.bfd (sh64--elf): Do not set targ_cflags. Add targ_selvecs bfd_elf32_sh_vec, bfd_elf32_shl_vec, bfd_elf32_shblin_vec and bfd_elf32_shlin_vec. * elf32-sh64.c: Tweak comments. (sh64_elf_set_mach_from_flags): Recognize all machine flags that are proper subsets of SH64 as bfd_mach_sh5. Add EF_SH64_ABI64. (sh64_elf_copy_private_data_internal): Wrap long line. (sh64_elf_merge_private_data): Rewrite to allow objects from SH64 subsets to be linked together. (INCLUDE_SHMEDIA): Define. * elf32-sh.c (sh_elf_relocate_section) <local symbol>: Parenthesize plus-expression inside or-expression. <global symbol>: Ditto. (sh_elf_set_mach_from_flags): Remove code refusing deleted EF_SH64_32BIT_ABI flag. 2000-11-26 Hans-Peter Nilsson <hpn@cygnus.com> * elf32-sh.c (sh_elf_howto_table) <R_SH_IMM_LOW16_PCREL, R_SH_IMM_MEDLOW16_PCREL, R_SH_IMM_MEDHI16_PCREL, R_SH_IMM_HI16_PCREL, R_SH_64_PCREL>: Set pcrel_offset to true. (sh_elf_relocate_section) <local symbol>: Or 1 in calculation of relocation if sym->st_other & STO_SH5_ISA32. <global symbol>: Ditto if h->other & STO_SH5_ISA32. * elf32-sh64.c (shmedia_prepare_reloc): Add rel->r_addend to relocation. 2000-11-24 Hans-Peter Nilsson <hpn@cygnus.com> * Makefile.am (BFD32_BACKENDS): Add elf32-sh64.lo. (BFD32_BACKENDS_CFILES): Add elf32-sh64.c. Regenerate dependencies. * Makefile.in: Regenerate. * archures.c: Add bfd_mach_sh5. * config.bfd: Map targ_cpu sh* to bfd_sh_arch. Handle sh64--elf. Set targ_cflags to -DINCLUDE_SHMEDIA. * configure.in: Handle bfd_elf32_sh64_vec and bfd_elf32_sh64l_vec. * configure: Regenerate. * reloc.c (BFD_RELOC_SH_SHMEDIA_CODE, BFD_RELOC_SH_IMMU5, BFD_RELOC_SH_IMMS6, BFD_RELOC_SH_IMMS6BY32, BFD_RELOC_SH_IMMU6, BFD_RELOC_SH_IMMS10, BFD_RELOC_SH_IMMS10BY2, BFD_RELOC_SH_IMMS10BY4, BFD_RELOC_SH_IMMS10BY8, BFD_RELOC_SH_IMMS16, BFD_RELOC_SH_IMMU16, BFD_RELOC_SH_IMM_LOW16, BFD_RELOC_SH_IMM_LOW16_PCREL, BFD_RELOC_SH_IMM_MEDLOW16, BFD_RELOC_SH_IMM_MEDLOW16_PCREL, BFD_RELOC_SH_IMM_MEDHI16, BFD_RELOC_SH_IMM_MEDHI16_PCREL, BFD_RELOC_SH_IMM_HI16, BFD_RELOC_SH_IMM_HI16_PCREL, BFD_RELOC_SH_PT_16): New relocations. * cpu-sh.c [INCLUDE_SHMEDIA] (arch_info_struct): Define and link in item for SH5. * elf32-sh.c [INCLUDE_SHMEDIA] (sh_elf_howto_table): Add howto items for SHmedia relocs. [INCLUDE_SHMEDIA] (sh_rel): Add mappings for SHmedia relocs. [INCLUDE_SHMEDIA] (sh_elf_relocate_section) [default]: Call shmedia_prepare_reloc, goto final_link_relocate if it returns non-zero, else fail as before. (sh_elf_set_mach_from_flags): Provide function only if not defined as macro. Do not recognize objects with EF_SH64_32BIT_ABI set. (sh_elf_set_private_flags): Provide function only if not defined as a macro. (sh_elf_copy_private_data): Similar. (sh_elf_merge_private_data): Similar. * section.c (SEC_SH_ISA_SHMEDIA): New. * targets.c (bfd_elf32_sh64_vec, bfd_elf32_sh64l_vec): Declare. * elf32-sh64.c: New file. * libbfd.h: Regenerate. * bfd-in2.h: Regenerate. * po/POTFILES.in: Regenerate. * po/bfd.pot: Regenerate. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate.	25 years ago
Alan Modra	899f54f5ee	* archures (bfd_mach_ppc64): Define. (bfd_powerpc_arch): Rename to bfd_powerpc_archs. (bfd_powerpc_arch): Define. * bfd-in2.h: Regenerate. * cpu-powerpc.c (arch_info_struct): Rename to bfd_powerpc_archs. (bfd_powerpc_arch): Move to tail of bfd_powerpc_archs. (bfd_powerpc_archs): Add default powerpc64 arch. * gas/ppc/test1elf64.d: Tweak arch name.	25 years ago
Nick Clifton	3b16e843f2	Add support for OpenRISC 32-bit embedded processor	25 years ago
Nick Clifton	c312a6a489	oops - omitted from previous delta	25 years ago

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91 Commits (7bd3401547f9dd77e511b79a3948d2ab32a295b1)