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775d36a916
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add-fakeroots-dir
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gdb-premipsmulti-2000-06-06-branch
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users/aburgess/try-mips-disasm-styling
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added-to-binutils
arc-20081103-branchpoint
arc-insight_6_8-branchpoint
arc-sim-20090309
binu_ss_19990502
binu_ss_19990602
binu_ss_19990721
binutils-2_10
binutils-2_10-branchpoint
binutils-2_10_1
binutils-2_11
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binutils-2_36_1
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w32api-2_2
x86_64versiong3
${ noResults }
8 Commits (775d36a916c1be042ceb67fc6ea22f53a9f5e331)
| Author | SHA1 | Message | Date |
|---|---|---|---|
|
|
e106fc358c |
sim: cgen: invert sim_state storage for cgen ports
|
11 years ago |
|
|
6df01ab8ab |
sim: switch config.h usage to defs.h
The defs.h header will take care of including the various config.h headers. For now, it's just config.h, but we'll add more when we integrate gnulib in. This header should be used instead of config.h, and should be the first include in every .c file. We won't rely on the old behavior where we expected files to include the port's sim-main.h which then includes the common sim-basics.h which then includes config.h. We have a ton of code that includes things before sim-main.h, and it sometimes needs to be that way. Creating a dedicated header avoids the ordering mess and implicit inclusion that shows up otherwise. |
5 years ago |
|
|
a0c38f0d70 |
sim: or1k: fix include ordering with sim-main.h
Make sure config.h is included before C library headers otherwise the later libiberty.h include gets confused about asprintf state leading to warnings like: common/sim-utils.c:330:9: warning: implicit declaration of function 'vasprintf'; did you mean 'xvasprintf'? [-Wimplicit-function-declaration] |
6 years ago |
|
|
3666a04883 |
Update copyright year range in all GDB files
This commits the result of running gdb/copyright.py as per our Start
of New Year procedure...
gdb/ChangeLog
Update copyright year range in copyright header of all GDB files.
|
6 years ago |
|
|
b811d2c292 |
Update copyright year range in all GDB files.
gdb/ChangeLog:
Update copyright year range in all GDB files.
|
7 years ago |
|
|
42a4f53d2b |
Update copyright year range in all GDB files.
This commit applies all changes made after running the gdb/copyright.py script. Note that one file was flagged by the script, due to an invalid copyright header (gdb/unittests/basic_string_view/element_access/char/empty.cc). As the file was copied from GCC's libstdc++-v3 testsuite, this commit leaves this file untouched for the time being; a patch to fix the header was sent to gcc-patches first. gdb/ChangeLog: Update copyright year range in all GDB files. |
8 years ago |
|
|
e2882c8578 |
Update copyright year range in all GDB files
gdb/ChangeLog:
Update copyright year range in all GDB files
|
9 years ago |
|
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fa8b7c2128 |
sim: or1k: add or1k target to sim
This adds the OpenRISC 32-bit sim target. The OpenRISC sim is a CGEN based sim so the bulk of the code is generated from the .cpu files by CGEN. The engine decode and execute logic in mloop uses scache with pseudo-basic-block extraction and supports both full and fast (switch) modes. The sim does not implement an mmu at the moment. The sim does implement fpu instructions via the common sim-fpu implementation. sim/ChangeLog: 2017-12-12 Stafford Horne <shorne@gmail.com> Peter Gavin <pgavin@gmail.com> * configure.tgt: Add or1k sim. * or1k/README: New file. * or1k/Makefile.in: New file. * or1k/configure.ac: New file. * or1k/mloop.in: New file. * or1k/or1k-sim.h: New file. * or1k/or1k.c: New file. * or1k/sim-if.c: New file. * or1k/sim-main.h: New file. * or1k/traps.c: New file. |
9 years ago |
|
|
61baf725ec |
update copyright year range in GDB files
This applies the second part of GDB's End of Year Procedure, which
updates the copyright year range in all of GDB's files.
gdb/ChangeLog:
Update copyright year range in all GDB files.
|
10 years ago |
|
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618f726fcb |
GDB copyright headers update after running GDB's copyright.py script.
gdb/ChangeLog:
Update year range in copyright notice of all files.
|
11 years ago |
|
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f0c1b768b4 |
sim: move WITH_SCACHE_PBB to sim-main.h
This helps us break up tconfig.h more. Any file using this define should be pulling in sim-main.h already, so things should continue working. |
11 years ago |
|
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3ebe2863f7 |
sim: clean up duplicate sim-engine hooks
Now that we've unified sim-cpu, we can delete the duplicate sim-engine hooks -- these targets defined these only because they didn't fully implement the sim-cpu callbacks. |
11 years ago |
|
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e8d3a34fee |
sim: trim old USING_SIM_BASE_H define
This doesn't appear to have been used since 1998, but wasn't cleaned up since. So much for being "quick" ;). |
11 years ago |
|
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20bca71d82 |
sim: unify SIM_CPU definition
Since every target typedefs this the same way, move it to the common code. We have to leave Blackfin behind here for now because of inter-dependencies on types and headers: sim-base.h includes sim-model.h which needs types in machs.h which needs types in bfim-sim.h which needs SIM_CPU. |
11 years ago |
|
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7e83aa92f2 |
sim: unify sim_cia definition
Almost every target defines sim_cia the same way -- either using the address_word type directly, or a type of equivalent size. The only odd one out is sh64 (who has 32bit address_word and 64bit cia), and even that case doesn't seem to make sense. We'll put off clean up though of sh64 and at least set up a sensible default for everyone. |
11 years ago |
|
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034685f9ce |
sim: replace CIA_{GET,SET} with CPU_PC_{GET,SET}
The CIA_{GET,SET} macros serve the same function as CPU_PC_{GET,SET}
except the latter adds a layer of indirection via the sim state. This
lets models set up different functions at runtime and doesn't reach so
directly into the arch-specific cpu state.
It also doesn't make sense to have two sets of macros that do exactly
the same thing, so lets standardize on the one that gets us more.
|
11 years ago |
|
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78e9aa70fe |
sim: unify sim-cpu usage
Now that all the targets are utilizing CPU_PC_{FETCH,STORE}, and the
cpu state is multicore, and the STATE_CPU defines match, we can move
it all to the common code.
|
11 years ago |
|
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f95f4ed2c4 |
sim: cris/frv/h8300/iq2000/lm32/m32r/sh64: standardize cpu state
This sets up the sim_state structure and the cpu member to match what we do in most other sims, and what the common code suggests. This is a step to unifying on the sim-cpu.o object. |
11 years ago |
|
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32d0add0a6 |
Update year range in copyright notice of all files owned by the GDB project.
gdb/ChangeLog:
Update year range in copyright notice of all files.
|
12 years ago |
|
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ecd75fc8ee |
Update Copyright year range in all files maintained by GDB.
|
13 years ago |
|
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8acc9f485b |
Update years in copyright notice for the GDB files.
Two modifications:
1. The addition of 2013 to the copyright year range for every file;
2. The use of a single year range, instead of potentially multiple
year ranges, as approved by the FSF.
|
14 years ago |
|
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c5a5708100 |
Copyright year update in most files of the GDB Project.
gdb/ChangeLog:
Copyright year update in most files of the GDB Project.
|
15 years ago |
|
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7b6bb8daac |
run copyright.sh for 2011.
|
16 years ago |
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dc3cf14f35 |
Update copyright notices to add year 2010.
|
17 years ago |
|
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c28c63d86b |
gdb/
2009-05-18 Jon Beniston <jon@beniston.com>
* MAINTAINERS: Add lm32 target.
* Makefile.in: Add lm32 dependencies.
* NEWS: Indicate lm32 is a new target.
* configure.tgt: Add lm32 targets.
* lm32-tdep.c: New file.
gdb/testsuite
2009-05-18 Jon Beniston <jon@beniston.com>
* gdb.asm/asm-source.exp: Add lm32 target.
include/gdb/
2009-05-18 Jon Beniston <jon@beniston.com>
* sim-lm32.h: New file.
sim/
2009-05-18 Jon Beniston <jon@beniston.com>
* MAINTAINERS: Add Jon Beniston as maintainer of lm32 sim.
* configure.ac: Add lm32 target.
* lm32: New directory.
sim/common
2009-05-18 Jon Beniston <jon@beniston.com>
* gennltvals.sh: Add lm32 target.
* nltvals.def: Add lm32 syscall definitions.
sim/lm32/
2009-05-18 Jon Beniston <jon@beniston.com>
* Makefile.in: New file.
* arch.c: New file.
* arch.h: New file.
* config.in: New file.
* configure: New file.
* configure.ac: New file.
* cpu.c: New file.
* cpu.h: New file.
* cpuall.h: New file.
* decode.c: New file.
* decode.h: New file.
* dv-lm32cpu.c: New file.
* dv-lm32timer.c: New file.
* dv-lm32uart.c: New file.
* lm32.c: New file.
* lm32-sim.h: New file.
* mloop.in: New file.
* model.c: New file.
* sem.c: New file.
* sem-switch.c: New file.
* sim-if.c: New file.
* sim-main.c: New file.
* tconfig.in: New file.
* traps.c: New file.
* user.c: New file.
|
17 years ago |
|
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6edf0760c5 |
Add support for m32r-linux target, including a RELA ABI and PIC.
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23 years ago |
|
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16b47b253e |
Add support for the m32r2 processor
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23 years ago |
|
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0b2e03b491 |
More reversion of incomplete m32r changes. Should be back to normal.
|
23 years ago |
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cd886a95bf |
Revert last commit, build problems.
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23 years ago |
|
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3c041444b5 |
2003-12-02 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
* Makefile.in : Add new machine m32r2.
* m32r2.c : New file for m32r2.
* mloop2.in : Ditto
* model2.c : Ditto
* sem2-switch.c : Ditto
* m32r-sim.h : Add EVB register.
* sim-if.h : Ditto
* sim-main.h : Ditto
* traps.c : Ditto
|
23 years ago |
|
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2df3850c7b |
import gdb-1999-10-11 snapshot
|
27 years ago |
|
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c906108c21 |
Initial creation of sourceware repository
|
28 years ago |
|
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071ea11e85 |
Initial creation of sourceware repository
|
28 years ago |
|
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0a18a6b8ad |
* configure.in: Call SIM_AC_OPTION_INLINE.
* configure: Regenerate. * sim-main.h: Protect against multiple inclusion. Don't include cgen-scache.h,cgen-cpu.h,cgen-trace.h,cpuall.h. Done by cgen-sim.h now. * tconfig.in (SIM_HAVE_MODEL): Delete, moved to cgen-types.h. * cpuall.h: Regenerate. * cpu.h,decode.c,sem-switch.c,sem.c: Regenerate. * mloop.in (extract16): Make static inline again. Simplify with call to @cpu@_fill_argbuf,@cpu@_fill_argbuf_tp. (extract32): Ditto. Simplify with call to @cpu@_fill_argbuf,@cpu@_fill_argbuf_tp. (execute): Test ARGBUF_PROFILE_P before profiling. Update calls to TRACE_INSN_INIT,TRACE_INSN_FINI. * cpux.h,decodex.c,modelx.c,semx-switch.c: Regenerate. * mloopx.in: Rewrite. |
28 years ago |
|
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48ffd442f6 |
* Makefile.in (SIM_EXTRA_DEPS): Replace cgen headers with
CGEN_INCLUDE_DEPS. (M32RBF_INCLUDE_DEPS): Define. (m32r .o's): Depend on it. (mloop.c): Update call to genmloop.sh. * cpu.h,cpuall.h: Regenerate. * sim-main.h: Delete inclusion of cpu.h,decode.h, moved to cpuall.h. #include cgen-scache.h,cgen-cpu.h. * tconfig.in (WITH_FOO semantic macros): Delete. * Makefile.in (M32RXF_INCLUDE_DEPS): Define. (m32rx .o's): Depend on it. (mloopx.c): Update call to genmloop.sh. * cpux.h: Regenerate. |
28 years ago |
|
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7e92721894 |
* traps.c: New file. Trap support moved here from sim-if.c.
* Makefile.in (SIM_OBJS): Add traps.o * sim-if.c: Don't include targ-vals.h. (sim_engine_illegal_insn): Moved to traps.c * sim-main.h (SIM_CORE_SIGNAL): Define. (m32r_core_signal): Declare. * devices.c (device_io_read_buffer): Handle cache purging via MCCR register. * m32r-sim.h (M32R_MISC_PROFILE): Move here from sim-main.h. (PROFILE_COUNT_SHORTINSNS,PROFILE_COUNT_LONGINSNS): New macros. (TRAP_SYSCALL,TRAP_BREAKPOINT): New macros. |
29 years ago |
|
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02e565a270 |
* sim-main.h (CIA_GET,CIA_SET): Provide dummy definitions for now.
|
29 years ago |
|
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b8a9943dd4 |
* Makefile.in (m32r.o): Depend on cpu.h
(extract.o): Pass -DSCACHE_P.
* mloop.in (extract{16,32}): Update call to m32r_decode.
* arch.h,cpu.h,cpuall.h,decode.[ch]: Regenerate.
* extract.c,model.c,sem-switch.c,sem.c: Regenerate.
* sim-main.h: #include "ansidecl.h".
Don't include cpu-opc.h, done by arch.h.
start-sanitize-m32rx
* Makefile.in (M32RX_OBJS): Build m32rx support now.
(m32rx.o): New rule.
* m32r-sim.h (m32rx_h_cr_[gs]et): Define.
* m32rx.c (m32rx_{fetch,store}_register): Update {get,set} of PC.
(m32rx_h_accums_get): New function.
* mloopx.in: Update call to m32rx_decode. Rewrite exec loop.
* cpux.h,decodex.[ch],modelx.c,readx.c,semx.c: Regenerate.
end-sanitize-m32rx
|
29 years ago |
|
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ea32bce773 |
sanitize m32rx piece of _sim_cpu
|
29 years ago |
|
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369fba3089 |
* arch.c, arch.h, cpuall.h: New files.
* arch-defs.h: Deleted.
* mloop.in: Renamed from mainloop.in.
* sem.c: Renamed from semantics.c.
* Makefile.in: Update.
* sem-ops.h: Deleted.
* mem-ops.h: Deleted.
start-sanitize-cygnus
Add cgen support for generating files.
end-sanitize-cygnus
(arch): Renamed from CPU.
* decode.c: Redone.
* decode.h: Redone.
* extract.c: Redone.
* model.c: Redone.
* sem-switch.c: Redone.
* sem.c: Renamed from semantics.c, and redone.
* m32r-sim.h (PROFILE_COUNT_FILLNOPS): Update.
(GETTWI,SETTWI,BRANCH_NEW_PC): Define.
* m32r.c (WANT_CPU,WANT_CPU_M32R): Define.
(m32r_{fetch,store}_register): New functions.
(model_mark_{get,set}_h_gr): Prefix with m32r_.
(m32r_model_mark_{busy,unbusy}_reg): Prefix with m32r_.
(h_cr_{get,set}): Prefix with m32r_.
(do_trap): Fetch state from current_cpu, not current_state.
Call sim_engine_halt instead of engine_halt.
* sim-if.c (alloc_cpu): New function.
(free_state): New function.
(sim_open): Call sim_state_alloc, and malloc space for selected cpu
type. Call sim_analyze_program.
(sim_create_inferior): Handle selected cpu type when setting PC.
start-sanitize-m32rx
(sim_resume): Handle m32rx.
end-sanitize-m32rx
(sim_stop_reason): Deleted.
(print_m32r_misc_cpu): Update.
start-sanitize-m32rx
(sim_{fetch,store}_register): Handle m32rx.
end-sanitize-m32rx
(sim_{read,write}): Deleted.
(sim_engine_illegal_insn): New function.
* sim-main.h: Don't include arch-defs.h,sim-core.h,sim-events.h.
Include arch.h,cpuall.h. Include cpu.h,decode.h if m32r.
start-sanitize-m32rx
Include cpux.h,decodex.h if m32rx.
end-sanitize-m32rx
(_sim_cpu): Include member appropriate cpu_data member for the cpu.
(M32R_MISC_PROFILE): Renamed from M32R_PROFILE.
(sim_state): Delete members core,events,halt_jmp_buf.
Change `cpu' member to be a pointer to the cpu's struct, rather than
record inside the state struct.
* tconfig.in (WITH_DEVICES): Define here.
(WITH_FAST,WITH_SEM_SWITCH_{FULL,FAST}): Define for the cpu.
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29 years ago |