7010a0c901
* ppc/altivec.igen (vperm): Latch inputs into temporaries.
19 years ago
e8db345894
Added 3 miscellaneous testcases like read32.ms uread16.ms hw-trap.ms.
19 years ago
9c301be69b
These files removed.
19 years ago
20f55b937b
Add the change for testcases comment update and new testcases addition.
19 years ago
fae9ec8dca
Update testcase comment.
19 years ago
ccd2d1c879
Comment change
19 years ago
bff92e6613
Updated the sim engine's ecode logic and commit the code changes
19 years ago
948b4edeea
Update for code standards
19 years ago
537e4bb9d6
Cleaned up unwanted code and fixed BIT operations simulation.
19 years ago
8e26b0f4b5
Update simops struct members and PSR bits.
19 years ago
5da6971689
Fix typo.
19 years ago
052d9a542f
Update the machine code decode algorithm using hash table.
19 years ago
a4e64307fa
2008-04-14 Hans Kester <kester.hans@gmail.com>
* sim-signal.c: Define missing signals for _WIN32.
19 years ago
47fbb84b2e
allinsn.exp: Removed target_alias and global_ld_options.
19 years ago
7c6071482e
Modified Files:
19 years ago
fee8ec0052
Added Files:
19 years ago
86b90b55f4
* configure.ac: Add an entry for National CR16 target.
19 years ago
2878ece136
ChangeLog: sim/cr16/: New directory. Added tests for CR16 simulator.
19 years ago
4ca0c2f6ff
ChangeLog: New file
19 years ago
49b964e718
New files: Testcases for cr16 instruction set.
19 years ago
51405f8781
testutils.inc: New file: Test macros for cr16 target.
19 years ago
ad6037c642
allinsn.exp misc.exp: New files: Test run scripts
19 years ago
2a3591b0e0
gennltvals.sh: Add cr16 target sys macros.
19 years ago
84234f6dc5
Updated the MAINTAINERS file: Add myself as maintainer of cr16 port.
19 years ago
efc111662f
Add myself as maintainer of cr16 port.
19 years ago
29035cbe96
* configure.ac: Pass ../../intl to ZW_GNU_GETTEXT_SISTER_DIR.
* configure: Regenerate.
19 years ago
98e460c30d
* simops.c (OP_1C007E0): Compensate for 64 bit hosts.
(OP_18007E0): Likewise.
(OP_2C007E0): Likewise.
(OP_28007E0): Likewise.
* v850.igen (divh): Likewise.
19 years ago
c5fbc25baf
Index: ChangeLog
* configure.ac (v850): V850 now has a testsuite.
* configure (v850): Likewise.
Index: testsuite/ChangeLog
* sim/v850/: New directory.
* sim/v850/allinsns.exp: New.
* sim/v850/bsh.cgs: New.
* sim/v850/div.cgs: New.
* sim/v850/divh.cgs: New.
* sim/v850/divh_3.cgs: New.
* sim/v850/divhu.cgs: New.
* sim/v850/divu.cgs: New.
* sim/v850/sar.cgs: New.
* sim/v850/satadd.cgs: New.
* sim/v850/satsub.cgs: New.
* sim/v850/satsubi.cgs: New.
* sim/v850/satsubr.cgs: New.
* sim/v850/shl.cgs: New.
* sim/v850/shr.cgs: New.
* sim/v850/testutils.cgs: New.
* sim/v850/testutils.inc: New.
Index: v850/ChangeLog
* simops.c (OP_C0): Correct saturation logic.
(OP_220): Likewise.
(OP_A0): Likewise.
(OP_660): Likewise.
(OP_80): Likewise.
* simops.c (OP_2A0): If the shift count is zero, clear the
carry.
(OP_A007E0): Likewise.
(OP_2C0): Likewise.
(OP_C007E0): Likewise.
(OP_280): Likewise.
(OP_8007E0): Likewise.
* simops.c (OP_2C207E0): Correct PSW flags for special divu
conditions.
(OP_2C007E0): Likewise, for div.
(OP_28207E0): Likewise, for divhu.
(OP_28007E0): Likewise, for divh. Also, sign-extend the correct
operand.
* v850.igen (divh): Likewise, for 2-op divh.
* v850.igen (bsh): Fix carry logic.
19 years ago
f3876f6909
2008-02-04 Antony King <antony.king@st.com>
* interp.c (macl): Fix non-portable implementation.
19 years ago
9b254dd1ce
Updated copyright notices for most files.
19 years ago
beb7a8835e
* frv/frv.c (frvbf_cut): Only look at the six LSBs of
cut_point.
19 years ago
bf31154ff3
* sim/cris/asm/x0-v10.ms, sim/cris/asm/x0-v32.ms: Tweak
stack-pointer match pattern for 4K host environment.
19 years ago
60dc88db8b
sim/mips/
* mips.igen (check_fmt_p): Provide a separate mips32r2 definition
that unconditionally allows fmt_ps.
(ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, CVT.S.PU)
(FLOOR.L.fmt, LWXC1, MADD.fmt, MSUB.fmt, NMADD.fmt, NMSUB.fmt)
(PLL.PS, PLU.PS, PUL.PS, PUU.PS, ROUND.L.fmt, TRUNC.L.fmt): Change
filter from 64,f to 32,f.
(PREFX): Change filter from 64 to 32.
(LDXC1, LUXC1): Provide separate mips32r2 implementations
that use do_load_double instead of do_load. Make both LUXC1
versions unpredictable if SizeFGR () != 64.
(SDXC1, SUXC1): Extend to mips32r2, using do_store_double
instead of do_store. Remove unused variable. Make both SUXC1
versions unpredictable if SizeFGR () != 64.
19 years ago
9538c15c36
* sim/cris/asm/testutils.inc (test_move_cc): Add missing call to
test_cc.
* sim/cris/asm/asr.ms: Correct expected condition code flags.
* sim/cris/asm/boundr.ms: Ditto.
* sim/cris/asm/dstep.ms: Ditto.
* sim/cris/asm/lsr.ms: Ditto.
* sim/cris/asm/movecr.ms: Ditto.
* sim/cris/asm/mover.ms: Ditto.
* sim/cris/asm/neg.ms: Ditto. Use test_cc, not test_move_cc.
* sim/cris/asm/op3.ms: Check the condition code flags after the insn
under test.
* sim/cris/asm/movecrt10.ms: Update expected number of simulated
cycles.
* sim/cris/asm/movecrt32.ms: Ditto.
* sim/cris/asm/jsr.ms: Don't use local label 8.
* sim/cris/asm/nonvcv32.ms: New test.
19 years ago
c9b3544ace
* cris/arch.c, cris/arch.h, cris/cpuall.h, cris/cpuv10.c,
cris/cpuv10.h, cris/cpuv32.c, cris/cpuv32.h, cris/cris-desc.c,
cris/cris-desc.h, cris/cris-opc.h, cris/decodev10.c,
cris/decodev10.h, cris/decodev32.c, cris/decodev32.h,
cris/modelv10.c, cris/modelv32.c, cris/semcrisv10f-switch.c,
cris/semcrisv32f-switch.c: Regenerate.
19 years ago
7cc46491b1
* NEWS: Document target described register support for PowerPC.
* ppc-tdep.h: Remove ppc_spr constants.
(struct gdbarch_tdep): Remove regs, ppc_sr0_regnum, and
ppc_builtin_type_vec128 members.
(PPC_R0_REGNUM, PPC_F0_REGNUM, PPC_PC_REGNUM, PPC_MSR_REGNUM)
(PPC_CR_REGNUM, PPC_LR_REGNUM, PPC_CTR_REGNUM, PPC_XER_REGNUM)
(PPC_FPSCR_REGNUM, PPC_MQ_REGNUM, PPC_SPE_UPPER_GP0_REGNUM)
(PPC_SPE_ACC_REGNUM, PPC_SPE_FSCR_REGNUM, PPC_VR0_REGNUM)
(PPC_VSCR_REGNUM, PPC_VRSAVE_REGNUM, PPC_NUM_REGS): New constants.
* rs6000-tdep.c: Include preparsed descriptions.
(init_sim_regno_table): Do not iterate over pseudo registers.
Look up segment registers by name. Use sim_spr_register_name
for SPRs.
(rs6000_register_sim_regno): Call init_sim_regno_table here.
(rs6000_builtin_type_vec128): Delete.
(rs6000_register_name): Only handle SPE pseudo registers and upper
halves. Call tdesc_register_name for everything else.
(rs6000_register_type): Delete. Replace with...
(rs6000_pseudo_register_type): ...this new function. Only handle
SPE pseudo registers.
(rs6000_register_reggroup_p): Delete. Replace with...
(rs6000_pseudo_register_reggroup_p): ...this new function. Only
handle SPE pseudo registers.
(rs6000_convert_register_p): Use ppc_fp0_regnum instead of
"struct reg".
(rs6000_register_to_value, rs6000_value_to_register): Remove check
of reg->fpr.
(e500_register_reggroup_p): Delete.
(STR, R, R4, R8, R16, F, P8, R32, R64, R0, A4, S, S4, SN4, S64)
(COMMON_UISA_REGS, PPC_UISA_SPRS, PPC_UISA_NOFP_SPRS)
(PPC_SEGMENT_REGS, PPC_OEA_SPRS, PPC_ALTIVEC_REGS, PPC_SPE_GP_REGS)
(PPC_SPE_UPPER_GP_REGS, PPC_EV_PSEUDO_REGS): Delete macros.
(registers_powerpc, registers_403, registers_403GC, registers_505)
(registers_860, registers_601, registers_602, registers_603)
(registers_604, registers_750, registers_7400, registers_e500): Delete
variables.
(struct variant): Delete nregs, npregs, num_tot_regs, and regs. Add
tdesc.
(tot_num_registers, num_registers, num_pseudo_registers): Delete.
(variants): Delete outdated comment. Use standard target descriptions
instead of "struct reg" arrays.
(init_variants): Delete.
(rs6000_gdbarch_init): Do not guess word size from the BFD
architecture if we have a target description. Select a variant
before creating a new architecture. Use the variant's target
description if the target did not define a register layout.
Validate target-supplied registers. Reject mismatches. Use
fixed register numbers and new constants instead of magic
numbers. Call set_gdbarch_ps_regnum. Call tdesc_use_registers.
(_initialize_rs6000_tdep): Initialize the preparsed target
descriptions.
* target-descriptions.c (tdesc_predefined_types): Add int128 and
uint128.
(tdesc_find_register_early): New function.
(tdesc_numbered_register): Use it.
(tdesc_register_size): New function.
(tdesc_use_registers): Take a target_desc argument. Do not use
gdbarch_target_desc.
* target-descriptions.h (tdesc_use_registers): Update prototype
and comment.
(tdesc_register_size): New prototype.
* Makefile.in (powerpc_32_c, powerpc_403_c, powerpc_403gc_c)
(powerpc_505_c, powerpc_601_c, powerpc_602_c, powerpc_603_c)
(powerpc_604_c, powerpc_64_c, powerpc_7400_c, powerpc_750_c)
(powerpc_860_c, powerpc_e500_c, rs6000_c): New macros.
(rs6000-tdep.o): Update.
* arm-tdep.c (arm_gdbarch_init): Update call to tdesc_use_registers.
* m68k-tdep.c (m68k_gdbarch_init): Likewise.
* mips-tdep.c (mips_gdbarch_init): Likewise.
* gdb.texinfo (Predefined Target Types): Add int128
and uint128.
(Standard Target Features): Add PowerPC features.
* gdb.xml/tdesc-regs.exp: Add PowerPC support.
* sim-ppc.h (sim_spr_register_name): New prototype.
* gdb-sim.c (regnum2spr): Rename to...
(sim_spr_register_name): ... this. Make global.
19 years ago
eb639c5004
2007-10-11 Jesper Nilsson <jesper.nilsson@axis.com>
* callback.c (cb_is_stdin, cb_is_stdout, cb_is_stderr): Add functions.
* syscall.c (cb_syscall): Test for stdin/out/err, not just fd 0/1/2.
2007-10-11 Jesper Nilsson <jesper.nilsson@axis.com>
* callback.h (cb_is_stdin, cb_is_stdout, cb_is_stderr): Add prototypes.
2007-10-11 Jesper Nilsson <jesper.nilsson@axis.com>
* sim/cris/c/freopen2.c: Added testcase.
19 years ago
b981d70963
2007-10-11 Jesper Nilsson <jesper.nilsson@axis.com>
* callback.c (cb_is_stdin): Add.
* syscall.c (cb_syscall): Test for stdin, not just fd 0.
2007-10-11 Jesper Nilsson <jesper.nilsson@axis.com>
* callback.h (cb_is_stdin): Add prototype.
19 years ago
4d43927194
2007-09-24 Andrew Stubbs <andrew.stubbs@st.com>
* gencode.c (tab): Add RAISE_EXCEPTION_IF_IN_DELAY_SLOT to the
definition of PC relative 'mov.l'/'mov.w' and also 'mova'.
19 years ago
599ca73e2c
sim/mips/
* mips.igen (ll): Fix mask for WITH_TARGET_WORD_BITSIZE == 32.
(sc, swxc1): Likewise. Also fix big-endian and reverse-endian
shifts for that case.
19 years ago
2525df0347
* interp.c (options enum): Add OPTION_INFO_MEMORY.
(display_mem_info): New static variable.
(mips_option_handler): Handle OPTION_INFO_MEMORY.
(mips_options): Add info-memory and memory-info.
(sim_open): After processing the command line and board specification, check display_mem_info.
If it is set then call the real handler for the --memory-info command line switch.
19 years ago
0ad36c846a
* sim/ppc/emul_bugapi.c (emul_bugapi_create): quote the file
name property before parsing it.
19 years ago
d5ce5596bf
* compare_igen_models: Change license to GPL version 3.
19 years ago
35ee6e1e05
* configure.ac: Change license of multi-run.c to GPL version 3.
* configure: Regenerate.
19 years ago
dfee3164ef
* lf.c (lf_print__gnu_copyleft): Change license to GPL version 3.
19 years ago
db95e31282
* testutils.inc: Change license to GPL version 3.
* utils-dsp.inc: Change license to GPL version 3.
* utils-fpu.inc: Change license to GPL version 3.
* utils-mdmx.inc: Change license to GPL version 3.
19 years ago
4744ac1bb0
Switch the license of all files explicitly copyright the FSF
to GPLv3.
19 years ago
f40f1a01c5
* sim-memopt.c (memory_options): Mention that the memory-size switch accepts suffixes.
(parse_size): Handle a suffix on the size value.
* sim-options.c (standard_options): Mention that the mem-size switch accepts suffixes.
(standard_option_handler): Handle a suffix on the size value.
19 years ago
917c78f962
2007-07-03 Yoshinori Sato <ysato@users.sourceforge.jp>
* compile.c (sim_resume): Fix the last byte of ARGV for
SYS_CMDLINE.
19 years ago
d5fb0879a5
sim/mips/
* configure.ac, configure: Revert last patch.
19 years ago
Joel Brobecker
M R Swami Reddy
Daniel Jacobowitz
Nick Hudson
DJ Delorie
Andrew Stubbs
Hans-Peter Nilsson
Richard Sandiford
Denis Pilat
Nick Clifton
Jerome Guitton