428e3f1f4e
2006-09-04 Paul Brook <paul@codesourcery.com>
gas/
* config/tc-arm.c (do_neon_dyadic_if_i): Remove.
(do_neon_dyadic_if_i_d): Avoid setting U bit.
(do_neon_mac_maybe_scalar): Ditto.
(do_neon_dyadic_narrow): Force operand type to NT_integer.
(insns): Remove out of date comments.
gas/testsuite/
* gas/arm/neon-cov.s: Test .u and .s aliases for .i suffixes.
* gas/arm/neon-cov.d: Adjust expected output.
opcodes/
* arm-dis.c (neon_opcode): Fix suffix on VMOVN.
20 years ago
96fbad7318
2006-08-23 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (three_byte_table): Expand to 256 elements.
20 years ago
4d9567e059
Fix bug 3000
20 years ago
777b13b958
opcodes/
* m68k-opc.c (m68k_opcodes): Fix operand specificer in the Coldfire
"fdaddl" entry.
gas/testsuite/
* gas/m68k/mcf-fpu.s: Add tests for all addressing modes.
* gas/m68k/mcf-fpu.d: Update accordingly.
20 years ago
401a54cf6e
2006-07-19 Paul Brook <paul@codesourcery.com>
gas/
* config/tc-arm.c (insns): Fix rbit Arm opcode.
gas/testsuite/
* gas/arm/archv6t2.d: Adjust expected output for rbit.
opcodes/
* armd-dis.c (arm_opcodes): Fix rbit opcode.
20 years ago
2b516b7297
gas/testsuite/
2006-07-18 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/opcode.s: Add sldt, smsw and str.
* gas/i386/x86-64-opcode.s: Likewise.
* gas/i386/opcode.d: Updated.
* gas/i386/x86-64-opcode.d: Likewise.
opcodes/
2006-07-18 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (grps): Change "sldtQ", "strQ" and "smswQ" to
"sldt", "str" and "smsw".
20 years ago
10505f38ce
Add missing ChangeLog entry.
20 years ago
a6bd098c72
2006-07-15 H.J. Lu <hongjiu.lu@intel.com>
PR binutils/2829
* i386-dis.c (GRP11_C6): NEW.
(GRP11_C7): Likewise.
(GRP12): Updated.
(GRP13): Likewise.
(GRP14): Likewise.
(GRP15): Likewise.
(GRP16): Likewise.
(GRPAMD): Likewise.
(GRPPADLCK1): Likewise.
(GRPPADLCK2): Likewise.
(dis386): Use GRP11_C6 and GRP11_C7 for entres 0xc6 and 0xc7,
respectively.
(grps): Add entries for GRP11_C6 and GRP11_C7.
20 years ago
050dfa73de
Add amdfam10 instructions
20 years ago
e8b42ce4f8
* arm-dis.c (coprocessor): Alter fmsrr disassembly syntax.
20 years ago
1596541188
gas/testsuite/
2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run nops and x86-64-nops.
* gas/i386/nops.d: New file.
* gas/i386/nops.s: Likewise.
* gas/i386/x86-64-nops.d: Likewise.
* gas/i386/x86-64-nops.s: Likewise.
include/opcode/
2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
* i386.h (i386_optab): Add "nop" with memory reference.
opcodes/
2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (dis386_twobyte): Use "nopQ" for 0x1f.
(twobyte_has_modrm): Set 1 for 0x1f.
20 years ago
46e883c5a9
gas/
2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (process_suffix): Don't add rex64 for
"xchg %rax,%rax".
gas/testsuite/
2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/opcode.s: Add "xchg %ax,%ax".
* gas/i386/opcode.d: Updated.
* gas/i386/x86-64-opcode.s: Add xchg %ax,%ax, xchg %eax,%eax,
xchg %rax,%rax, rex64 xchg %rax,%rax and xchg %rax,%r8.
* gas/i386/x86-64-opcode.d: Updated.
include/opcode/
2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
* i386.h (i386_optab): Update comment for 64bit NOP.
opcodes/
2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (NOP_Fixup): Removed.
(NOP_Fixup1): New.
(NOP_Fixup2): Likewise.
(dis386): Use NOP_Fixup1 and NOP_Fixup2 on 0x90.
20 years ago
4e9d3b813b
* arm-dis.c (print_insn_neon): Disassemble 32-bit immediates as signed
on 64-bit hosts.
20 years ago
b3882df925
2006-06-10 H.J. Lu <hongjiu.lu@intel.com>
* i386.c (GRP10): Renamed to ...
(GRP12): This.
(GRP11): Renamed to ...
(GRP13): This.
(GRP12): Renamed to ...
(GRP14): This.
(GRP13): Renamed to ...
(GRP15): This.
(GRP14): Renamed to ...
(GRP16): This.
(dis386_twobyte): Updated.
(grps): Likewise.
21 years ago
5f4df3dd7b
Updated Finnish translation
21 years ago
6648b7cff9
bfd/doc:
* bfd.texinfo: Remove local @tex code.
bfd:
* po/Make-in (pdf, ps): New dummy targets.
binutils:
* po/Make-in (pdf, ps): New dummy targets.
gas:
* po/Make-in (pdf, ps): New dummy targets.
gprof:
* po/Make-in (pdf, ps): New dummy targets.
ld:
* po/Make-in (pdf, ps): New dummy targets.
opcodes:
* po/Make-in (pdf, ps): New dummy targets.
21 years ago
c22aaad1c7
2006-06-06 Paul Brook <paul@codesourcery.com>
opcodes/
* arm-dis.c (coprocessor_opcodes): Add %c to unconditional arm
instructions.
(neon_opcodes): Add conditional execution specifiers.
(thumb_opcodes): Ditto.
(thumb32_opcodes): Ditto.
(arm_conditional): Change 0xe to "al" and add "" to end.
(ifthen_state, ifthen_next_state, ifthen_address): New.
(IFTHEN_COND): Define.
(print_insn_coprocessor, print_insn_neon): Print thumb conditions.
(print_insn_arm): Change %c to use new values of arm_conditional.
(print_insn_thumb16): Print thumb conditions. Add %I.
(print_insn_thumb32): Print thumb conditions.
(find_ifthen_state): New function.
(print_insn): Track IT block state.
gas/testsuite/
* gas/arm/thumb2_bcond.d: Update expected output.
* gas/arm/thumb32.d: Ditto.
* gas/arm/vfp1_t2.d: Ditto.
* gas/arm/vfp1xD_t2.d: Ditto.
binutils/testsuite/
* binutils-all/arm/objdump.exp: New file.
* binutils-all/arm/thumb2-cond.s: New test.
21 years ago
9622b051cf
include/opcode/
* ppc.h (PPC_OPCODE_POWER6): Define.
Adjust whitespace.
gas/
* config/tc-ppc.c (parse_cpu): Handle "-mpower6".
(md_show_usage): Document it.
(ppc_setup_opcodes): Test power6 opcode flag bits.
* doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
opcodes/
* ppc-dis.c (powerpc_dialect): Handle power6 option.
(print_ppc_disassembler_options): Mention power6.
21 years ago
65263ce323
[ gas/ChangeLog ]
* config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
(CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
(macro_build): Update comment.
(mips_ip): Allow DSP64 instructions for MIPS64R2.
(mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
CPU_HAS_MDMX.
(mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
MIPS_CPU_ASE_MDMX flags for sb1.
[ gas/testsuite/ChangeLog ]
* gas/mips/mips64-dsp.s, gas/mips/mips64-dsp.d: New DSP64 tests.
* gas/mips/mips.exp: Run DSP64 tests.
[ opcodes/ChangeLog ]
* mips-dis.c: Disassemble DSP64 instructions for MIPS64R2.
* mips-opc.c: Add DSP64 instructions.
21 years ago
92ce91bb61
* m68hc11-dis.c (print_insn): Warning fix.
21 years ago
4cfe2c59ff
bfd/, binutils/, gas/, gprof/, ld/, opcodes/
* po/Make-in (top_builddir): Define.
21 years ago
7ff1a5b533
* Makefile.am: Run "make dep-am".
* Makefile.in: Regenerate.
* config.in: Regenerate.
21 years ago
20e95c23ab
Configury changes: update src repository (binutils, gdb, and rda) to use
config/gettext-sister.m4 instead of the old gettext.m4. Regenerate all
affected autotools files. Include intl in gdb releases again.
21 years ago
eebf07fbf5
Update Spanish translation
21 years ago
a596001ece
include/opcodes/
* m68k.h (mcf_mask): Define.
opcodes/
* m68k-opc.c (m68k_opcodes): Fix the masks of the Coldfire fmovemd
and fmovem entries. Put register list entries before immediate
mask entries. Use "l" rather than "L" in the fmovem entries.
* m68k-dis.c (match_insn_m68k): Remove the PRIV argument and work it
out from INFO.
(m68k_scan_mask): New function, split out from...
(print_insn_m68k): ...here. If no architecture has been set,
first try printing an m680x0 instruction, then try a Coldfire one.
gas/testsuite/
* gas/m68k/mcf-fpu.s: Add fmovemd and fmovem instructions.
* gas/m68k/mcf-fpu.d: Adjust accordingly.
21 years ago
4a4d496a37
Updated Vietnamese and Irish translations
21 years ago
a854efa328
* crx-dis.c (EXTRACT): Make macro work on 64-bit hosts.
21 years ago
0bd7906139
Updated Dutch translation
21 years ago
7ff7c29e1f
Remove ChangeLog entries, since the template files were already up to date.
21 years ago
5002adadc5
Update translation templates
21 years ago
00988f494c
* avr-dis.c: Formatting fix.
21 years ago
9b3f89ee00
[ gas/ChangeLog ]
* config/tc-mips.c (macro_build): Test for currently active
mips16 option.
(mips16_ip): Reject invalid opcodes.
[ opcodes/ChangeLog ]
* mips16-opc.c (I1, I32, I64): New shortcut defines.
(mips16_opcodes): Change membership of instructions to their
lowest baseline ISA.
[ gas/testsuite/ChangeLog ]
* gas/mips/mips.exp: Run new tests.
* gas/mips/mips16e.s, gas/mips/mips16e.d, gas/mips/mips16e-64.s,
gas/mips/mips16e-64.d, gas/mips/mips16e-64.l: New tests.
21 years ago
cb6d34334f
gas/testsuite/
2006-05-09 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run x86-64-gidt.
* gas/i386/x86-64-gidt.d: New file.
* gas/i386/x86-64-gidt.s: Likewise.
opcodes/
2006-05-09 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (grps): Update sgdt/sidt for 64bit.
21 years ago
1f3c39b9e6
* arm-dis.c (coprocessor_opcodes): Don't interpret fldmx/fstmx as
vldm/vstm.
21 years ago
d43b4baf07
[ gas/ChangeLog ]
* config/tc-mips.c (macro_build): Add case 'k' to handle cache
instruction.
(macro): Add new case M_CACHE_AB.
[ opcodes/ChangeLog ]
* mips-opc.c: Add macro for cache instruction.
[ include/opcode/ChangeLog ]
* mips.h (enum): Add macro M_CACHE_AB.
21 years ago
39a7806dae
[ gas/testsuite/ChangeLog ]
2006-05-04 Thiemo Seufer <ths@mips.com>
Nigel Stephens <nigel@mips.com>
* gas/mips/mips.exp: Run mips32-dsp tests only for mips32r2.
* gas/mips/set-arch.d: Adjust according to opcode table changes.
[ include/opcode/ChangeLog ]
2006-05-04 Thiemo Seufer <ths@mips.com>
Nigel Stephens <nigel@mips.com>
David Ung <davidu@mips.com>
* mips.h: Add INSN_SMARTMIPS define.
[ opcodes/ChangeLog ]
2006-05-04 Thiemo Seufer <ths@mips.com>
Nigel Stephens <nigel@mips.com>
David Ung <davidu@mips.com>
* mips-dis.c (mips_arch_choices): Add smartmips instruction
decoding to MIPS32 and MIPS32R2. Limit DSP decoding to release
2 ISAs. Add MIPS3D decoding to MIPS32R2. Add MT decoding to
MIPS64R2.
* mips-opc.c: fix random typos in comments.
(INSN_SMARTMIPS): New defines.
(mips_builtin_opcodes): Add paired single support for MIPS32R2.
Move bc3f, bc3fl, bc3t, bc3tl downwards. Move flushi, flushd,
flushid, wb upwards. Move cfc3, ctc3 downwards. Rework the
FP_S and FP_D flags to denote single and double register
accesses separately. Move dmfc3, dmtc3, mfc3, mtc3 downwards.
Allow jr.hb and jalr.hb for release 1 ISAs. Allow luxc1, suxc1
for MIPS32R2. Add SmartMIPS instructions. Add two-argument
variants of bc2f, bc2fl, bc2t, bc2tl. Add mfhc2, mthc2 to
release 2 ISAs.
* mips16-opc.c (mips16_opcodes): Add sdbbp instruction.
21 years ago
104b4fab38
2006-05-03 Thiemo Seufer <ths@mips.com>
[ opcodes/ChangeLog ]
* mips-opc.c (mips_builtin_opcodes): Fix mftr argument order.
[ gas/testsuite/ChangeLog ]
* gas/mips/mips32-mt.d: Fix mftr argument order.
21 years ago
022fac6d2a
* mips-dis.c (print_insn_args): Force mips16 to odd addresses.
(print_mips16_insn_arg): Force mips16 to odd addresses.
21 years ago
9bcd4f993c
[ gas/ChangeLog ]
2006-04-30 Thiemo Seufer <ths@mips.com>
David Ung <davidu@mips.com>
* config/tc-mips.c (validate_mips_insn): Handling of udi cases.
(mips_immed): New table that records various handling of udi
instruction patterns.
(mips_ip): Adds udi handling.
[ include/opcode/ChangeLog ]
2006-04-30 Thiemo Seufer <ths@mips.com>
David Ung <davidu@mips.com>
* mips.h: Defines udi bits and masks. Add description of
characters which may appear in the args field of udi
instructions.
[ opcodes/ChangeLog ]
2006-04-30 Thiemo Seufer <ths@mips.com>
David Ung <davidu@mips.com>
* mips-opc.c (mips_builtin_opcodes): Add udi instructions
"udi0" to "udi15".
* mips-dis.c (print_insn_args): Adds udi argument handling.
21 years ago
f095b97b59
Fix buglet noticed while looking at PR 1298.
* m68k-dis.c (match_insn_m68k): Restore fprintf_func before printing
error message.
21 years ago
bdb09db1cf
Don't mis-spell your boss' name...
21 years ago
59c455b37c
[ opcodes/ChangeLog ]
2006-04-28 Thiemo Seufer <ths@mips.com>
David Ung <davidu@mips.com>
Nigel Stevens <nigel@mips.com>
* mips-dis.c (mips_cp0sel_names_mips3264r2): Add MT register
names.
[ gas/testsuite/ChangeLog ]
2006-04-28 Thiemo Seufer <ths@mips.com>
David Ung <davidu@mips.com>
Nigel Stevens <nigel@mips.com>
* gas/mips/cp0sel-names-mips32r2.d,
gas/mips/cp0sel-names-mips64r2.d: Update for MT register names.
21 years ago
cc0ca239ed
* mips-dis.c (print_insn_args): Add mips_opcode argument.
(print_insn_mips): Adjust print_insn_args call.
21 years ago
0d09bfe6d3
* mips-dis.c (print_insn_args): Print $fcc only for FP
instructions, use $cc elsewise.
21 years ago
654c225a6d
* opcodes/mips-dis.c (mips16_to_32_reg_map, mips16_reg_names):
Map MIPS16 registers to O32 names.
(print_mips16_insn_arg): Use mips16_reg_names.
21 years ago
0dbde4cf38
* arm-dis.c (print_insn_neon): Disassemble floating-point constant
VMOV.
21 years ago
16980d0b05
* opcodes/arm-dis.c (coprocessor_opcodes): Add %A, %B, %k, convert
%<code>[zy] into %[zy]<code>. Expand meaning of %<bitfield>['`?].
Add unified load/store instruction names.
(neon_opcode_table): New.
(arm_opcodes): Expand meaning of %<bitfield>['`?].
(arm_decode_bitfield): New.
(print_insn_coprocessor): Add pc argument. Add %A & %B specifiers.
Use arm_decode_bitfield and adjust numeric specifiers. Adjust %z & %y.
(print_insn_neon): New.
(print_insn_arm): Adjust print_insn_coprocessor call. Call
print_insn_neon. Use arm_decode_bitfield and adjust numeric specifiers.
(print_insn_thumb32): Likewise.
21 years ago
ec3fcc5688
* Makefile.am: Run "make dep-am".
* Makefile.in: Regenerate.
21 years ago
7c6646cd4b
* avr-dis.c (avr_operand): Warning fix.
21 years ago
241a6c40c8
bfd/
* warning.m4 (--enable-werror, -build-warnings): Format help messages.
* configure: Regenerate.
binutils/
* configure: Regenerate.
gas/
* configure.in (--enable-targets): Indent help message.
* configure: Regenerate.
gprof/
* configure: Regenerate.
ld/
* configure: Regenerate.
opcodes/
* configure: Regenerate.
21 years ago
Paul Brook
H.J. Lu
Michael Meissner
Richard Sandiford
Julian Brown
Nick Clifton
Joseph Myers
Alan Modra
Thiemo Seufer
Daniel Jacobowitz
Jim Wilson