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4e8fe71f6c
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add-fakeroots-dir
arc-20081103-branch
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binutils-2_10-branch
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gdb-9-branch
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gdb-premipsmulti-2000-06-06-branch
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users/ARM/efi-aarch64-support-binutils
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users/aburgess/try-mips-disasm-styling
users/ahajkova/try-frob
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users/ahayward/variable_sve2
added-to-binutils
arc-20081103-branchpoint
arc-insight_6_8-branchpoint
arc-sim-20090309
binu_ss_19990502
binu_ss_19990602
binu_ss_19990721
binutils-2_10
binutils-2_10-branchpoint
binutils-2_10_1
binutils-2_11
binutils-2_11_1
binutils-2_11_2
binutils-2_12
binutils-2_12-branchpoint
binutils-2_12_1
binutils-2_13
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binutils-2_14
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binutils-2_15
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binutils-2_16
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binutils-2_29_1.1
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binutils-2_31_1
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binutils-2_34
binutils-2_35
binutils-2_35_1
binutils-2_35_2
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binutils-2_36_1
binutils-2_37
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binutils-2_41-release
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${ noResults }
1145 Commits (4e8fe71f6c6f417efb67675695fa0b96cf6081b5)
| Author | SHA1 | Message | Date |
|---|---|---|---|
|
|
6c7d412cf3 |
* xtensa-config.h (XCHAL_HAVE_THREADPTR): Redefine to zero.
(XCHAL_NUM_AREGS, XCHAL_MAX_INSTRUCTION_SIZE): New. |
18 years ago |
|
|
e642969943 |
* mips.h: Update copyright.
(INSN_CHIP_MASK): New macro. (INSN_OCTEON): New macro. (CPU_OCTEON): New macro. (OPCODE_IS_MEMBER): Handle Octeon instructions. |
18 years ago |
|
|
7b03d09a44 |
* mips.h: Update copyright.
(E_MIPS_MACH_OCTEON): New macro. |
18 years ago |
|
|
148b93f236 |
Add OpenVMS extensions.
* ia64.h (SHF_IA_64_VMS_GLOBAL, SHF_IA_64_VMS_OVERLAID)
(SHF_IA_64_VMS_SHARED, SHF_IA_64_VMS_VECTOR)
(SHF_IA_64_VMS_ALLOC_64BIT, SHF_IA_64_VMS_PROTECTED)
(SHT_IA_64_VMS_TRACE, SHT_IA_64_VMS_TIE_SIGNATURES)
(SHT_IA_64_VMS_DEBUG, SHT_IA_64_VMS_DEBUG_STR)
(SHT_IA_64_VMS_LINKAGES, SHT_IA_64_VMS_SYMBOL_VECTOR)
(SHT_IA_64_VMS_FIXUP, DT_IA_64_VMS_SUBTYPE)
(DT_IA_64_VMS_IMGIOCNT, DT_IA_64_VMS_LNKFLAGS)
(DT_IA_64_VMS_VIR_MEM_BLK_SIZ, DT_IA_64_VMS_IDENT)
(DT_IA_64_VMS_NEEDED_IDENT, DT_IA_64_VMS_IMG_RELA_CNT)
(DT_IA_64_VMS_SEG_RELA_CNT, DT_IA_64_VMS_FIXUP_RELA_CNT)
(DT_IA_64_VMS_FIXUP_NEEDED, DT_IA_64_VMS_SYMVEC_CNT)
(DT_IA_64_VMS_XLATED, DT_IA_64_VMS_STACKSIZE)
(DT_IA_64_VMS_UNWINDSZ, DT_IA_64_VMS_UNWIND_CODSEG)
(DT_IA_64_VMS_UNWIND_INFOSEG, DT_IA_64_VMS_LINKTIME)
(DT_IA_64_VMS_SEG_NO, DT_IA_64_VMS_SYMVEC_OFFSET)
(DT_IA_64_VMS_SYMVEC_SEG, DT_IA_64_VMS_UNWIND_OFFSET)
(DT_IA_64_VMS_UNWIND_SEG, DT_IA_64_VMS_STRTAB_OFFSET)
(DT_IA_64_VMS_SYSVER_OFFSET, DT_IA_64_VMS_IMG_RELA_OFF)
(DT_IA_64_VMS_SEG_RELA_OFF, DT_IA_64_VMS_FIXUP_RELA_OFF)
(DT_IA_64_VMS_PLTGOT_OFFSET, DT_IA_64_VMS_PLTGOT_SEG)
(DT_IA_64_VMS_FPMODE, SHN_IA_64_VMS_SYMVEC): Define
* readelf.c (dump_relocations): Decode OpenVMS-specific sections.
(get_ia64_dynamic_type): Decode OpenVMS-specific tags.
(get_dynamic_type): Handle IA64-specific tags.
(get_ia64_section_type_name): Handle OpenVMS-specific sections.
(get_section_type_name): Handle OS-specific sections (and
particularly IA64 OpenVMS one).
(get_elf_section_flags): Makes flags static. Add entries for IA64 and
decode them.
|
18 years ago |
|
|
830ef6349c |
include/
2008-01-26 David Daney <ddaney@avtrex.com> * demangle.h (demangle_component_type): Add DEMANGLE_COMPONENT_JAVA_RESOURCE, DEMANGLE_COMPONENT_COMPOUND_NAME, and DEMANGLE_COMPONENT_CHARACTER as new enum values. (demangle_component): Add struct s_character to union u. libiberty/ 2008-01-26 David Daney <ddaney@avtrex.com> * cp-demangle.c (d_dump): Handle DEMANGLE_COMPONENT_JAVA_RESOURCE, DEMANGLE_COMPONENT_COMPOUND_NAME, and DEMANGLE_COMPONENT_CHARACTER cases. (d_make_comp): Handle DEMANGLE_COMPONENT_COMPOUND_NAME and DEMANGLE_COMPONENT_JAVA_RESOURCE cases. (d_make_character): New function. (d_java_resource): Same. (d_special_name): Handle "Gr" case. (d_print_comp): Handle DEMANGLE_COMPONENT_JAVA_RESOURCE, DEMANGLE_COMPONENT_COMPOUND_NAME, and DEMANGLE_COMPONENT_CHARACTER cases. * testsuite/demangle-expected: Add test for java resource name mangling. |
18 years ago |
|
|
2b1ed17bea |
/gas:
2008-01-23 Eric B. Weddington <eric.weddington@atmel.com> * config/tc-avr.c (mcu_types): Change opcode set for at86rf401. /include: 2008-01-23 Eric B. Weddington <eric.weddington@atmel.com> * opcode/avr.h (AVR_ISA_RF401): Add new opcode set for at86rf401. |
18 years ago |
|
|
c74ba40646 |
* common.h (AT_SUN_AUXFLAGS): Define.
|
18 years ago |
|
|
982b62a030 |
/gas:
2008-01-03 Eric B. Weddington <eric.weddington@atmel.com> * config/tc-avr.c (mcu_types): Change opcode set for avr3, at90usb82, at90usb162. * doc/c-avr.texi: Change architecture grouping for at90usb82, at90usb162. These changes support the new avr35 architecture group in gcc. /include: 2008-01-03 Eric B. Weddington <eric.weddington@atmel.com> * opcode/avr.h (AVR_ISA_USB162): Add new opcode set. (AVR_ISA_AVR3): Likewise. |
18 years ago |
|
|
9b254dd1ce |
Updated copyright notices for most files.
|
19 years ago |
|
|
60955fda27 |
* dwarf2.h (DW_AT_hi_user): Correct value.
|
19 years ago |
|
|
1bbb5f219c |
2007-12-07 Bob Wilson <bob.wilson@acm.org>
include/elf/ * xtensa.h (R_XTENSA_32_PCREL): New. bfd/ * elf32-xtensa.c (elf_howto_table): Add R_XTENSA_32_PCREL. (elf_xtensa_reloc_type_lookup): Handle BFD_RELOC_32_PCREL. (elf_xtensa_check_relocs): Use default case for all relocations that need nothing done here. (elf_xtensa_do_reloc): Compute self_address for all relocation types. Handle R_XTENSA_32_PCREL. (elf_xtensa_relocate_section): Check for R_XTENSA_32_PCREL for dynamic symbols. (check_section_ebb_pcrels_fit): Ignore R_XTENSA_32_PCREL relocations. gas/ * config/tc-xtensa.c (O_pcrel): Define. (suffix_relocs): Add pcrel suffix. (md_pseudo_table): Add 4byte and 2byte directives. (xtensa_elf_cons): Pass correct pcrel argument to fix_new_exp. (xg_assemble_literal): Likewise. Check for O_pcrel. (expression_maybe_register): Reorganize. Handle BFD_RELOC_32_PCREL. (xg_valid_literal_expression): Allow O_pcrel. (md_pcrel_from, md_apply_fix): Handle BFD_RELOC_32_PCREL. (tc_gen_reloc): Fix punctuation in error message. gas/testsuite/ * gas/xtensa/all.exp: Run new pcrel test. * gas/xtensa/err-pcrel.s: New. * gas/xtensa/pcrel.d: New. * gas/xtensa/pcrel.s: New. * gas/xtensa/xtensa-err.exp: New. |
19 years ago |
|
|
350cc38db2 |
bfd/
* archures.c (bfd_mach_mips_loongson_2e): New.
(bfd_mach_mips_loongson_2f): New.
* bfd-in2.h (bfd_mach_mips_loongson_2e): New.
(bfd_mach_mips_loongson_2f): New.
* cpu-mips.c: Add I_loongson_2e and I_loongson_2f to
anonymous enum.
(arch_info_struct): Add Loongson-2E and Loongson-2F entries.
* elfxx-mips.c (_bfd_elf_mips_mach): Handle Loongson-2E
and Loongson-2F flags.
(mips_set_isa_flags): Likewise.
(mips_mach_extensions): Add Loongson-2E and Loongson-2F
entries.
binutils/
* readelf.c (get_machine_flags): Handle Loongson-2E and -2F
flags.
gas/
* config/tc-mips.c (mips_cpu_info_table): Add loongson2e
and loongson2f entries.
* doc/c-mips.texi: Document -march=loongson{2e,2f} options.
gas/testsuite/
* gas/mips/mips.exp: Add loongson-2e and -2f tests.
* gas/mips/loongson-2e.d: New.
* gas/mips/loongson-2e.s: New.
* gas/mips/loongson-2f.d: New.
* gas/mips/loongson-2f.s: New.
include/elf/
* mips.h (E_MIPS_MACH_LS2E): New.
(E_MIPS_MACH_LS2F): New.
include/opcode/
* mips.h (INSN_LOONGSON_2E): New.
(INSN_LOONGSON_2F): New.
(CPU_LOONGSON_2E): New.
(CPU_LOONGSON_2F): New.
(OPCODE_IS_MEMBER): Update for Loongson-2E and -2F flags.
opcodes/
* mips-dis.c (mips_arch_choices): Add Loongson-2E and -2F
entries.
* mips-opc.c (IL2E): New.
(IL2F): New.
(mips_builtin_opcodes): Add Loongson-2E and -2F instructions.
Allow movz and movn for Loongson-2E and -2F. Add movnz entry.
Move coprocessor encodings to the end of the table. Allow
certain MIPS V .ps instructions on the Loongson-2E and -2F.
|
19 years ago |
|
|
569502941a |
include/opcode/
* mips.h (INSN_ISA*): Redefine certain values as an enumeration. Update comments. (mips_isa_table): New. (ISA_MIPS*): Redefine to match enumeration. (OPCODE_IS_MEMBER): Modify to correctly test new INSN_ISA* values. opcodes/ * mips-opc.c (I3_32, I3_33, I4_32, I4_33, I5_33): New. (mips_builtin_opcodes): Use these new I* values. |
19 years ago |
|
|
f7bc09bdbc |
* internal.h (ELF_IS_SECTION_IN_SEGMENT): Adjust to cope with
segments at the end of memory. |
19 years ago |
|
|
42554f6a08 |
[ld/testsuite/ChangeLog]
* ld-mips-elf/attr-gnu-4-14.d, ld-mips-elf/attr-gnu-4-41.d: Adjust warning message for -mfp64 flag. * ld-mips-elf/attr-gnu-4-5.s, ld-mips-elf/attr-gnu-4-04.d, ld-mips-elf/attr-gnu-4-51.d, ld-mips-elf/attr-gnu-4-05.d, ld-mips-elf/attr-gnu-4-15.d, ld-mips-elf/attr-gnu-4-24.d, ld-mips-elf/attr-gnu-4-25.d, ld-mips-elf/attr-gnu-4-34.d, ld-mips-elf/attr-gnu-4-35.d, ld-mips-elf/attr-gnu-4-42.d, ld-mips-elf/attr-gnu-4-43.d, ld-mips-elf/attr-gnu-4-44.d, ld-mips-elf/attr-gnu-4-45.d, ld-mips-elf/attr-gnu-4-40.d, ld-mips-elf/attr-gnu-4-14.d: New testcases files. * ld-mips-elf/mips-elf.exp: Run new testcases. [binutils/ChangeLog] * readelf.c (display_mips_gnu_attribute): Recognize -mips32r2 -mfp64 objects. [include/ChangeLog] * elf/mips.h (Tag_GNU_MIPS_ABI_FP): Mention -mips32r2 -mfp64 variant in comment. [bfd/ChangeLog] * elfxx-mips.c (mips_elf_merge_obj_attributes): Handle -mips32r2 -mfp64 attribute. [gas/ChangeLog] * doc/as.texinfo: Document the new attribute value. |
19 years ago |
|
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e2a0d921a7 |
* dwarf2.h: Mention the location of the DWARF3 spec on the web.
(DW_AT_stride_size): Rename to DW_AT_bit_stride. (DW_AT_stride): Rename to DW_AT_byte_stride. * dwarf.c (process_extended_line_op): Add cases for HP extensions to the line ops. Mention if an unknown op code is in the user defined range. (decode_location_expression): Add cases for HP extensions, the DW_OP_GNU_uninit extension and the DW_OP_call_frame_cfa and DW_OP_bit_piece DWARF3 operators. (read_and_display_attr): Correct list of attributes which can reference a location list. (read_and_display_attr_value): Add cases for DWARF3 values and HP extensions. Correct list of attributes which can reference a location list. (get_AT_name): Add cases for DWARF3 values and HP and PGI extensions. |
19 years ago |
|
|
7a2b07ff7e |
include/elf/
* vxworks.h: New. bfd/ * elf-vxworks.h (elf_vxworks_add_dynamic_entries): Declare. (elf_vxworks_finish_dynamic_entry): Declare. * elf-vxworks.c: Include elf/vxworks.h. (elf_vxworks_add_dynamic_entries): New. (elf_vxworks_finish_dynamic_entry): New. * Makefile.am (elf-vxworks.lo): Add dependency. * Makefile.in (elf-vxworks.lo): Add dependency. * elf32-i386.c (elf_i386_size_dynamic_sections, elf_i386_finish_dynamic_sections): Call elf_vxworks_add_dynamic_entries and elf_vxworks_finish_dynamic_entry. * elf32-ppc.c (ppc_elf_size_dynamic_sections, ppc_elf_finish_dynamic_sections): Likewise. * elfxx-sparc.c (_bfd_sparc_elf_size_dynamic_sections, sparc_finish_dyn): Likewise. * elf32-sh.c (sh_elf_size_dynamic_sections, sh_elf_finish_dynamic_sections): Likewise. * elfxx-mips.c (_bfd_mips_elf_size_dynamic_sections, _bfd_mips_elf_finish_dynamic_sections): Likewise. * elf32-arm.c (elf32_arm_size_dynamic_sections, elf32_arm_finish_dynamic_sections): Likewise. ld/ * ld-vxworks/tls-2.d: New. * ld-vxworks/tls-2.s: New. |
19 years ago |
|
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b14d30e141 |
include:
2007-11-07 Joseph Myers <joseph@codesourcery.com> Daniel Jacobowitz <dan@codesourcery.com> * floatformat.h (struct floatformat): Add split_half field. (floatformat_ibm_long_double): New. libiberty: 2007-11-07 Joseph Myers <joseph@codesourcery.com> Daniel Jacobowitz <dan@codesourcery.com> * floatformat.c (mant_bits_set): New. (floatformat_to_double): Use it. Note no special handling of split formats. (floatformat_from_double): Note no special handing of split formats. (floatformat_ibm_long_double_is_valid, floatformat_ibm_long_double): New. (floatformat_ieee_single_big, floatformat_ieee_single_little, floatformat_ieee_double_big, floatformat_ieee_double_little, floatformat_ieee_double_littlebyte_bigword, floatformat_vax_f, floatformat_vax_d, floatformat_vax_g, floatformat_i387_ext, floatformat_m68881_ext, floatformat_i960_ext, floatformat_m88110_ext, floatformat_m88110_harris_ext, floatformat_arm_ext_big, floatformat_arm_ext_littlebyte_bigword, floatformat_ia64_spill_big, floatformat_ia64_spill_little, floatformat_ia64_quad_big, floatformat_ia64_quad_little): Update for addition of split_half field. gdb: 2007-11-07 Joseph Myers <joseph@codesourcery.com> Daniel Jacobowitz <dan@codesourcery.com> * gdbtypes.c (floatformats_ibm_long_double): New. * gdbtypes.h (floatformats_ibm_long_double): Declare. * ia64-tdep.c (floatformat_ia64_ext): Update for addition of split_half field. * mips-tdep.c (n32n64_floatformat_always_valid, floatformat_n32n64_long_double_big, floatformats_n32n64_long): Remove. (mips_gdbarch_init): Use floatformats_ibm_long_double instead of floatformats_n32n64_long. * ppc-linux-tdep.c (ppc_linux_init_abi): Use 128-bit IBM long double. * doublest.c (convert_floatformat_to_doublest, convert_doublest_to_floatformat): Handle split floating-point formats. * ppc-sysv-tdep.c (ppc_sysv_abi_push_dummy_call): Handle IBM long double arguments. (ppc64_sysv_abi_push_dummy_call): Likewise. (do_ppc_sysv_return_value): Handle IBM long double return. |
19 years ago |
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11ec4ba977 |
include
* coff/pe.h (COFF_ENCODE_ALIGNMENT) Define. gas * read.c (ALIGN_LIMIT): Rename to ... (TC_ALIGN_LIMIT): Guard against prior definition. * config/tc-i386.h (TC_ALIGN_LIMIT)[TE_PE]: Define. bfd * pe-i386.c (COFF_SECTION_ALIGNMENT_ENTRIES): Let .data, .text and .bss section use the default. * pei-i386.c (COFF_SECTION_ALIGNMENT_ENTRIES): Likewise. ld/testsuite * ld-scripts/align.exp: Enable for PECOFF. * ld-scripts/alignof.exp: Likewise. |
19 years ago |
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569006e582 |
* mn10300.h (R_MN10300_ALIGN): Define.
* reloc.c (BFD_RELOC_MN10300_ALIGN): Add. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * elf-m10300.h: Handle R_MN10300_ALIGN relocs. * mn10300_elf_relax_delete_bytes): Honour R_MN10300_ALIGN relocs. Re-fix off by one error in comparisons. * config/tc-mn10300.c (tc_gen_reloc): Fix test that decides when sym_diff relocs should be generated. (md_apply_fix): Skip R_MN10300_ALIGN relocs. (mn10300_fix_adjustable): Do not adjust R_MN10300_ALIGN relocs. (mn10300_handle_align): New function. Generate R_MN10300_ALIGN relocs to record alignment requests. * config/tc-mn10300.h (TC_FORCE_RELOCATION_SUB_SAME): Also force R_MN10300_ALIGN relocs. (HANDLE_ALIGN): Define. Call mn10300_handle_align. * gas/all/gas.exp: Do not run diff1.s test for mn10300. * ld-mn10300/mn10300.exp: Run new tests. Skip i126256 test if a compiler is not available. * ld-mn10300/i112045-3.s: New test. * ld-mn10300/i112045-3.d: Expected disassembly. * ld-mn10300/i135409.s: Rename to i135409-1.s. * ld-mn10300/i135409.d: Rename to i135409-1.d * ld-mn10300/i135409-2.s: New test. * ld-mn10300/i135409-2.d: Expected symbol table. * ld-mn10300/i36434.d: Adjust expected disassembly. |
19 years ago |
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c6e653525f |
* elf32-ppc.c (ppc_elf_merge_obj_attributes): Add support for
Tag_GNU_Power_ABI_Vector. * readelf.c (display_power_gnu_attribute): Add support for Tag_GNU_Power_ABI_Vector. * ppc.h (Tag_GNU_Power_ABI_Vector): New. * ld-powerpc/attr-gnu-8-1.s, ld-powerpc/attr-gnu-8-11.d, ld-powerpc/attr-gnu-8-2.s, ld-powerpc/attr-gnu-8-23.d, ld-powerpc/attr-gnu-8-3.s, ld-powerpc/attr-gnu-8-31.d: New. * ld-powerpc/powerpc.exp: Run new tests. |
19 years ago |
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bfff164249 |
Add MN10300 linker relaxation support for symbol differences
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19 years ago |
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3e6ff6e5e4 |
.
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19 years ago |
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7ca95d9475 |
2007-10-18 Roland McGrath <roland@redhat.com>
* common.h (NT_PPC_VMX): New macro. |
19 years ago |
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7cc46491b1 |
* NEWS: Document target described register support for PowerPC.
* ppc-tdep.h: Remove ppc_spr constants. (struct gdbarch_tdep): Remove regs, ppc_sr0_regnum, and ppc_builtin_type_vec128 members. (PPC_R0_REGNUM, PPC_F0_REGNUM, PPC_PC_REGNUM, PPC_MSR_REGNUM) (PPC_CR_REGNUM, PPC_LR_REGNUM, PPC_CTR_REGNUM, PPC_XER_REGNUM) (PPC_FPSCR_REGNUM, PPC_MQ_REGNUM, PPC_SPE_UPPER_GP0_REGNUM) (PPC_SPE_ACC_REGNUM, PPC_SPE_FSCR_REGNUM, PPC_VR0_REGNUM) (PPC_VSCR_REGNUM, PPC_VRSAVE_REGNUM, PPC_NUM_REGS): New constants. * rs6000-tdep.c: Include preparsed descriptions. (init_sim_regno_table): Do not iterate over pseudo registers. Look up segment registers by name. Use sim_spr_register_name for SPRs. (rs6000_register_sim_regno): Call init_sim_regno_table here. (rs6000_builtin_type_vec128): Delete. (rs6000_register_name): Only handle SPE pseudo registers and upper halves. Call tdesc_register_name for everything else. (rs6000_register_type): Delete. Replace with... (rs6000_pseudo_register_type): ...this new function. Only handle SPE pseudo registers. (rs6000_register_reggroup_p): Delete. Replace with... (rs6000_pseudo_register_reggroup_p): ...this new function. Only handle SPE pseudo registers. (rs6000_convert_register_p): Use ppc_fp0_regnum instead of "struct reg". (rs6000_register_to_value, rs6000_value_to_register): Remove check of reg->fpr. (e500_register_reggroup_p): Delete. (STR, R, R4, R8, R16, F, P8, R32, R64, R0, A4, S, S4, SN4, S64) (COMMON_UISA_REGS, PPC_UISA_SPRS, PPC_UISA_NOFP_SPRS) (PPC_SEGMENT_REGS, PPC_OEA_SPRS, PPC_ALTIVEC_REGS, PPC_SPE_GP_REGS) (PPC_SPE_UPPER_GP_REGS, PPC_EV_PSEUDO_REGS): Delete macros. (registers_powerpc, registers_403, registers_403GC, registers_505) (registers_860, registers_601, registers_602, registers_603) (registers_604, registers_750, registers_7400, registers_e500): Delete variables. (struct variant): Delete nregs, npregs, num_tot_regs, and regs. Add tdesc. (tot_num_registers, num_registers, num_pseudo_registers): Delete. (variants): Delete outdated comment. Use standard target descriptions instead of "struct reg" arrays. (init_variants): Delete. (rs6000_gdbarch_init): Do not guess word size from the BFD architecture if we have a target description. Select a variant before creating a new architecture. Use the variant's target description if the target did not define a register layout. Validate target-supplied registers. Reject mismatches. Use fixed register numbers and new constants instead of magic numbers. Call set_gdbarch_ps_regnum. Call tdesc_use_registers. (_initialize_rs6000_tdep): Initialize the preparsed target descriptions. * target-descriptions.c (tdesc_predefined_types): Add int128 and uint128. (tdesc_find_register_early): New function. (tdesc_numbered_register): Use it. (tdesc_register_size): New function. (tdesc_use_registers): Take a target_desc argument. Do not use gdbarch_target_desc. * target-descriptions.h (tdesc_use_registers): Update prototype and comment. (tdesc_register_size): New prototype. * Makefile.in (powerpc_32_c, powerpc_403_c, powerpc_403gc_c) (powerpc_505_c, powerpc_601_c, powerpc_602_c, powerpc_603_c) (powerpc_604_c, powerpc_64_c, powerpc_7400_c, powerpc_750_c) (powerpc_860_c, powerpc_e500_c, rs6000_c): New macros. (rs6000-tdep.o): Update. * arm-tdep.c (arm_gdbarch_init): Update call to tdesc_use_registers. * m68k-tdep.c (m68k_gdbarch_init): Likewise. * mips-tdep.c (mips_gdbarch_init): Likewise. * gdb.texinfo (Predefined Target Types): Add int128 and uint128. (Standard Target Features): Add PowerPC features. * gdb.xml/tdesc-regs.exp: Add PowerPC support. * sim-ppc.h (sim_spr_register_name): New prototype. * gdb-sim.c (regnum2spr): Rename to... (sim_spr_register_name): ... this. Make global. |
19 years ago |
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eb639c5004 |
2007-10-11 Jesper Nilsson <jesper.nilsson@axis.com>
* callback.c (cb_is_stdin, cb_is_stdout, cb_is_stderr): Add functions. * syscall.c (cb_syscall): Test for stdin/out/err, not just fd 0/1/2. 2007-10-11 Jesper Nilsson <jesper.nilsson@axis.com> * callback.h (cb_is_stdin, cb_is_stdout, cb_is_stderr): Add prototypes. 2007-10-11 Jesper Nilsson <jesper.nilsson@axis.com> * sim/cris/c/freopen2.c: Added testcase. |
19 years ago |
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b981d70963 |
2007-10-11 Jesper Nilsson <jesper.nilsson@axis.com>
* callback.c (cb_is_stdin): Add. * syscall.c (cb_syscall): Test for stdin, not just fd 0. 2007-10-11 Jesper Nilsson <jesper.nilsson@axis.com> * callback.h (cb_is_stdin): Add prototype. |
19 years ago |
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7fac7ff4ae |
Various CR16 fixes
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19 years ago |
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b10a8ae01c |
bfd/
2007-09-17 H.J. Lu <hongjiu.lu@intel.com> PR binutils/3281 PR binutils/5037 * elf-bfd.h (elf_obj_tdata): Remove relro. * elf.c (get_program_header_size): Check info->relro instead of elf_tdata (abfd)->relro. (_bfd_elf_map_sections_to_segments): Likewise. (assign_file_positions_for_load_sections): Don't set PT_GNU_RELRO segment alignment here. (assign_file_positions_for_non_load_sections): Properly set up PT_GNU_RELRO segment for copying executable/shared library. (rewrite_elf_program_header): Remove PT_GNU_RELRO segment. (copy_elf_program_header): Set p_size and p_size_valid fields for PT_GNU_RELRO segment. include/elf/ 2007-09-17 H.J. Lu <hongjiu.lu@intel.com> PR binutils/3281 PR binutils/5037 * internal.h (elf_segment_map): Add p_size and p_size_valid. (ELF_IS_SECTION_IN_SEGMENT): Allow SHF_TLS sections in PT_GNU_RELRO segments. ld/ 2007-09-17 H.J. Lu <hongjiu.lu@intel.com> PR binutils/3281 PR binutils/5037 * ldexp.h (ldexp_control): Add relro, relro_start_stat and relro_end_stat. * ldexp.c (fold_binary): Set expld.dataseg.relro to exp_dataseg_relro_start or exp_dataseg_relro_end when seeing DATA_SEGMENT_ALIGN or DATA_SEGMENT_RELRO_END, respectively. * ldlang.c (lang_size_sections_1): Properly set expld.dataseg.relro_start_stat and expld.dataseg.relro_end_stat. (find_relro_section_callback): New function. (lang_find_relro_sections_1): Likewise. (lang_find_relro_sections): Likewise. (lang_process): Call lang_find_relro_sections for non-relocatable link. ld/testsuite/ 2007-09-17 H.J. Lu <hongjiu.lu@intel.com> PR binutils/3281 PR binutils/5037 * ld-elf/binutils.exp: Update "-z relro" tests to use relro1.s. Add "-z relro" tests with relro2.s. Add "-z relro" tests with TLS for objcopy. * ld-elf/relro1.s: New file. * ld-elf/relro2.s: Likewise. |
19 years ago |
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8d100c328c |
bfd/
* archures.c: Add bfd_mach_mcf_isa_c_nodiv, bfd_mach_mcf_isa_c_nodiv_mac & bfd_mach_mcf_isa_c_nodiv_emac. * ieee.c (ieee_write_processor): Update coldfire architecture list. * bfd-in2.h: Rebuilt. * cpu-m68k.c (arch_info_struct): Add isa_c nodiv architectures. (m68k_arch_features): Likewise. * elf32-m68k.c (elf32_m68k_object_p): Add EF_M68K_CF_ISA_C_NODIV. (elf32_m68k_print_private_bfd_data): Likewise. gas/ * config/tc-m68k.c (m68k_ip): Add mcfisa_c case. (m68k_elf_final_processing): Add EF_M68K_CF_ISA_C_NODIV. include/elf/ * m68k.h (EF_M68K_CF_ISA_C_NODIV): New. |
19 years ago |
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3a0ab69515 |
merge from gcc
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19 years ago |
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8969a67f0a |
merge from gcc
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19 years ago |
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b15fa79e3a |
include/elf/
* common.h (NT_SPU): Define. bfd/ * elf.c (elfcore_grok_spu_note): New function. (elf_parse_notes): Call it. binutils/ * readelf.c (process_note): Recognize SPU core file notes. |
19 years ago |
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c3d65c1ced |
binutils/
* doc/binutils.texi (objdump): Document -Mppcps. gas/ * config/tc-ppc.c (parse_cpu): Handle "750cl". (pre_defined_registers): Add "gqr0" to "gqr7", "gqr.0" to "gqr.7". (md_show_usage): Document -m750cl. (md_assemble): Handle two delimiters in succession (eg. `),'). * doc/c-ppc.texi (PowerPC-Opts): Document -m750cl. * testsuite/gas/ppc/ppc.exp: Run ppc70ps dump tests. * testsuite/gas/ppc/ppc750ps.s: New file. * testsuite/gas/ppc/ppc750ps.d: Likewise. include/opcode/ * ppc.h (PPC_OPCODE_PPCPS): New. opcodes/ * ppc-opc.c (PSW, PSWM, PSQ, PSQM, PSD, MTMSRD_L): New. (XOPS, XOPS_MASK, XW, XW_MASK): Likewise. (PPCPS): Likewise. (powerpc_opcodes): Add all pair singles instructions. * ppc-dis.c (powerpc_dialect): Handle "ppcps". (print_ppc_disassembler_options): Document -Mppcps. |
19 years ago |
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1d52ba212b |
Switch the license of all .h files to GPLv3.
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19 years ago |
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2b05f1b7bb |
bfd/
2007-08-16 H.J. Lu <hongjiu.lu@intel.com> * elf.c: Revert last change. binutils/ 2007-08-16 H.J. Lu <hongjiu.lu@intel.com> * readelf.c: Revert last change. include/elf/ 2007-08-16 H.J. Lu <hongjiu.lu@intel.com> * common.h: Revert last change. |
19 years ago |
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94b11780ad |
bfd/
2007-08-16 H.J. Lu <hongjiu.lu@intel.com> * elf.c (get_segment_type): Change PT_GNU_STACK to PT_GNU_ATTR. (bfd_section_from_phdr): Likewise. (get_program_header_size): Likewise. Add a PT_GNU_ATTR segment if there is an attribute section. (_bfd_elf_map_sections_to_segments): Likewise. (IS_SECTION_IN_INPUT_SEGMENT): Likewise. binutils/ 2007-08-16 H.J. Lu <hongjiu.lu@intel.com> * readelf.c (get_segment_type): Change PT_GNU_STACK to PT_GNU_ATTR. include/elf/ 2007-08-16 H.J. Lu <hongjiu.lu@intel.com> * common.h (PT_GNU_STACK): Renamed to ... (PT_GNU_ATTR): This. (PT_GNU_STACK): New. Make an alias of PT_GNU_ATTR. |
19 years ago |
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bd33be6e27 |
bfd/
2007-08-02 H.J. Lu <hongjiu.lu@intel.com> * coffcode.h (ALIGN_SET): Removed. (ELIFALIGN_SET): Likewise. (coff_set_alignment_hook): Handle IMAGE_SCN_ALIGN_128BYTES, IMAGE_SCN_ALIGN_256BYTES, IMAGE_SCN_ALIGN_512BYTES, IMAGE_SCN_ALIGN_1024BYTES, IMAGE_SCN_ALIGN_2048BYTES, IMAGE_SCN_ALIGN_4096BYTES and IMAGE_SCN_ALIGN_8192BYTES. include/coff/ 2007-08-02 H.J. Lu <hongjiu.lu@intel.com> * pe.h (IMAGE_SCN_ALIGN_POWER_BIT_POS): New. (IMAGE_SCN_ALIGN_POWER_BIT_MASK): Likewise. (IMAGE_SCN_ALIGN_POWER_NUM): Likewise. (IMAGE_SCN_ALIGN_POWER_CONST): Likewise. (IMAGE_SCN_ALIGN_128BYTES): Likewise. (IMAGE_SCN_ALIGN_256BYTES): Likewise. (IMAGE_SCN_ALIGN_512BYTES): Likewise. (IMAGE_SCN_ALIGN_1024BYTES): Likewise. (IMAGE_SCN_ALIGN_2048BYTES): Likewise. (IMAGE_SCN_ALIGN_4096BYTES): Likewise. (IMAGE_SCN_ALIGN_8192BYTES): Likewise. (IMAGE_SCN_ALIGN_1BYTES): Redefined with IMAGE_SCN_ALIGN_POWER_CONST. (IMAGE_SCN_ALIGN_2BYTES): Likewise. (IMAGE_SCN_ALIGN_4BYTES): Likewise. (IMAGE_SCN_ALIGN_8BYTES): Likewise. (IMAGE_SCN_ALIGN_16BYTES): Likewise. (IMAGE_SCN_ALIGN_32BYTES): Likewise. (IMAGE_SCN_ALIGN_64BYTES): Likewise. |
19 years ago |
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0fdaa00544 |
Correct ChangeLog entries.
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19 years ago |
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cd12e26dbd |
* ternary.h: Remove.
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19 years ago |
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0a05a8762f |
* xtensa-config.h (XCHAL_HAVE_THREADPTR): New.
(XCHAL_HAVE_RELEASE_SYNC, XCHAL_HAVE_S32C1I): New. |
19 years ago |
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bd0aa31525 |
* COPYING3: New file. Contains version 3 of the GNU General Public License.
* COPYING3.LIB: New file. Contains version 3 of the GNU Lesser General Public License. |
19 years ago |
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31a55cbe03 |
merge from gcc
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19 years ago |
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ae8772e6ec |
* splay-tree.h (libi_uhostptr_t, libi_shostptr_t): Adjust types
work-a-round whitespace problem in gcc gengtype. |
19 years ago |
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d2df793a71 |
Add support for building on a 64-bit Windows host.
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19 years ago |
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fd2f25da9b |
.
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19 years ago |
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ab24bc21aa |
2007-07-09 Roland McGrath <roland@redhat.com>
* bfdlink.h (struct bfd_link_info): Add member emit_note_gnu_build_id. |
19 years ago |
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1d81b01501 |
2007-07-09 Roland McGrath <roland@redhat.com>
* common.h (NT_GNU_HWCAP, NT_GNU_BUILD_ID): New macros. |
19 years ago |
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a208b53c49 |
Update tp GPLv3
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19 years ago |
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afa2158f09 |
gas/testsuite/
* gas/m68k/mcf-coproc.d: New. * gas/m68k/mcf-coproc.s: New. * gas/m68k/all.exp: Add it. gas/ * config/tc-m68k.c (m68k_ip): Add j & K operand types. (install_operand): Add E encoding. (md_begin): Check and skip initial '.' arg character. (get_num): Add 0..511 case. include/ * opcode/m68k.h: Document j K & E. opcodes/ * m68k-dis.c (fetch_arg): Add E. Replace length switch with direct masking. (print_ins_arg): Add j & K operand types. (match_insn_m68k): Check and skip initial '.' arg character. (m68k_scan_mask): Likewise. * m68k-opc.c (m68k_opcodes): Add coprocessor instructions. |
19 years ago |