412c4e940e
Add config support for the size of the target address and OF cell.
29 years ago
c4db5b04f8
mips - for r5900 generate igen simulator.
igen - stop crash when simulator isn't multi-sim'ed
29 years ago
9ec6741b17
igen: Fix SMP simulator generator support.
Use the bfd-processor name in the sim-engine switch.
Add nr_cpus argument to sim_engine_run.
tic80, v850, d30v, mips, common:
Update
mips: Fill in bfd-processor field of model records so that
they match ../bfd/archures.
29 years ago
2d44e12a27
Use macro GPR_SET(N,VAL) to clear zero registers.
29 years ago
462cfbc4eb
* aclocal.m4: Recognize --enable-maintainer-mode.
*/configure: Regenerated.
29 years ago
e0e0fc765e
* interp.c (sim_monitor): Handle Densan monitor outbyte
and inbyte functions.
29 years ago
76ef416550
* interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
29 years ago
9c8ec16d78
In nrun.c, look for sigaction & SA_RESTART. When both present,
install cntrl-c (SIGINT) handler with no SA_RESTART bit set.
29 years ago
b17d2d1474
For MADD et.al. instructions sign extend 32 bit result assigned to a
register.
29 years ago
255cbbf190
* configure.in (sim_igen_filter): Multi-sim vr5000 - vr5000 or
vr5400 with the vr5000 as the default.
29 years ago
23850e9219
* mips.igen (MSUB): Fix to work like MADD.
* gencode.c (MSUB): Similarly.
29 years ago
c02ed6a8a3
For bfd, add vr5400 and vr5000 mips machine variants to list of machines.
For sim/mips, enable multi-sim support when mips64vr5400-elf is target.
For sim/igen, allow specification of a default machine (will need
more work later).
29 years ago
6e51f990a2
Regenerate configure files.
29 years ago
0931ce5aa7
Missing change log entry.
29 years ago
0d5d0d102d
Fix typo in format argument to sim_io_eprintf.
29 years ago
35c246c9d7
Move MDMX instructions which are public knowledge from vr5400.igen
into mdmx.igen (MDMX is MMX on steroids). Keep the file secret.
29 years ago
8c31916d92
sanitize-r5900 not v5900
29 years ago
58fb5d0a4f
vr5400 sanitize cleanups
29 years ago
232156dee9
o Add SIM_SIGFPE to sim-signals
o Start SIM_SIG* at 64 so that the use of host signal numbers can be
detected and reported.
o Update MIPS simulator to use sim-signal.
29 years ago
a09a30d298
Allow reads/writes to C0_CONFIG register.
29 years ago
486740ce01
* Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
29 years ago
f23e93dab0
* mips.igen: Tag vr5000 instructions.
(ANDI): Was missing mipsIV model, fix assembler syntax.
(do_c_cond_fmt): New function.
(C.cond.fmt): Handle mips I-III which do not support CC field
separatly.
(bc1): Handle mips IV which do not have a delaed FCC separatly.
(SDR): Mask paddr when BigEndianMem, not the converse as specified
in IV3.2 spec.
(DMULT, DMULTU): Force use of hosts 64bit multiplication. Handle
vr5000 which saves LO in a GPR separatly.
* configure.in (enable-sim-igen): For vr5000, select vr5000
specific instructions.
* configure: Re-generate.
29 years ago
a94c5493a7
Make the signess of compares between GPR's explicit using a cast to
signed_word.
29 years ago
030843d7f8
Fix IGEN version of MFC0, MTC0, SWC1, LWC1, SDC1, LDC1, LWXC1,
SWXC1MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1, MULT, MULTU, BEQZ, ...MTHI,
MFHI instructions.
Trace nullified instruction.
29 years ago
95469cebdd
Replace global IPC with function argument cia or current instruction
address.
Pass cia into calls to sim_engine_stop so that breakpoints et.al. work.
29 years ago
7ce8b9178c
IGEN likes to cache the current instruction address (CIA). Change the
MIPS simulator so that correctly writes the value of CIA back int PC
(the global previously used) when the simulation halts.
Fix implementation of DELAY_SLOT and NULLIFY_NEXT_INSTRUCTION macros.
29 years ago
44b8585a3d
Add option --enable-sim-igen to mips configuration. Allows user to
attempt a build of an older MIPS simulator using igen.
29 years ago
63be8febf7
Rewrite the MIPS simulator's memory model so that it uses the generic
common/sim-core.
Add support for 3, 5, 6, 7 byte transfers to sim core.
29 years ago
22de994d0e
Delete -l and -n options, didn't do anything.
Rename option trace to dinero-trace & dinero-file - -t clashed with
common options.
Enable common trace options.
29 years ago
525d929e49
Rewrite sim_monitor (implements read, write, open, et.al. system
calls) and sim_open so that they uses the virtual memory data transfer
functions sim_read & sim_write. This eliminates all code (other than
in load_memory & store_memory) that makes assumptions about the
implementation of the underlying memory model.
29 years ago
6205f37913
* gencode.c: Add tx49 configury and insns.
* configure.in: Add tx49 configury.
* configure: Update.
29 years ago
01b9cd49ca
common/sim-bits.h: Document ROTn macro.
igen/{igen.c,ld-insns.h}: Document mnemonic string formats.
mips/Makefile.in: Add dependencies for files included by mips.igen
mips/vr5400.igen: checkpoint vr5400 instructions.
29 years ago
89d0973831
Add support for 16 byte quantities to sim-endian macro H2T.
Add model-filter field to option, include, model anf function igen records
29 years ago
16bd5d6e52
Separate r5900 specifoc and mips16 instructions.
Add support for this to configure (vr5400 target only)
29 years ago
90ad43b2de
Add mips64vr5400 to configuration list
Mark mipsIV instructions as being implemented by the vr5400.
Sanitize.
29 years ago
635ae9cb7c
* sim/mips/gencode.c (build_instruction): Follow sim_write's lead in using
BigEndianMem instead of !ByteSwapMem.
29 years ago
122edc03de
Add basic igen configuration to autoconf. Disable.
29 years ago
dad6f1f326
Add function to fetch 32bit instructions
When address translation of insn fetch fails raise exception immediatly.
Use address_word as type of all address variables (instead of unsigned64),
the former is configured as either 32 or 64 bit type.
Always compile fpu code (no #if has fpu)
29 years ago
92ad193bb0
Use SIM*_OVERFLOW_RESULT defined in sim-alu.h
29 years ago
aa324b9b1e
Output pc profile statistics once gathered.
29 years ago
e2f8ffb736
Delete profile support from MIPS simulator, use sim/common/sim-profile
module instead.
Generate a "gmon.out" (gprof) when profiling the target PC.
Add target PC profiling option --profile-pc-granularity (bucket size)
29 years ago
fb5a2a3e39
Make mips registers of type unsigned_word.
Ensure all references to MIPS registers use same type.
29 years ago
ea985d2472
Move register definitions and macros out of interp.c and into sim-main.h
29 years ago
284e759d1f
Rename generated file engine.c to oengine.c.
29 years ago
339fb14904
* gencode.c (build_instruction): Use FPR_STATE not fpr_state.
29 years ago
8b70f83790
* gencode.c (build_instruction): For "FPSQRT", output correct number
of arguments to Recip.
29 years ago
0c2c5f6141
Move global MIPS simulator variables into sim_cpu struct.
29 years ago
18c64df613
o Add support for configuring wordsize, fp hardware and target
endianness. Provide defaults for some tier-1 mips targets.
o Parameterize all functions with SIM_DESC.
29 years ago
adf4739efe
Add access to hi part of r5900 128 bit registers.
29 years ago
26b20b0a0e
* configure: Regenerated.
Can't hack one without the other...
29 years ago
Andrew Cagney
Doug Evans
Mark Alexander
Felix Lee
Jeff Law
Gavin Romig-Koch
Bob Manson