binutils-gdb

Commit Graph

Author	SHA1	Message	Date
Andrew Cagney	63be8febf7	Rewrite the MIPS simulator's memory model so that it uses the generic common/sim-core. Add support for 3, 5, 6, 7 byte transfers to sim core.	29 years ago
Andrew Cagney	22de994d0e	Delete -l and -n options, didn't do anything. Rename option trace to dinero-trace & dinero-file - -t clashed with common options. Enable common trace options.	29 years ago
Andrew Cagney	525d929e49	Rewrite sim_monitor (implements read, write, open, et.al. system calls) and sim_open so that they uses the virtual memory data transfer functions sim_read & sim_write. This eliminates all code (other than in load_memory & store_memory) that makes assumptions about the implementation of the underlying memory model.	29 years ago
Gavin Romig-Koch	6205f37913	* gencode.c: Add tx49 configury and insns. * configure.in: Add tx49 configury. * configure: Update.	29 years ago
Andrew Cagney	01b9cd49ca	common/sim-bits.h: Document ROTn macro. igen/{igen.c,ld-insns.h}: Document mnemonic string formats. mips/Makefile.in: Add dependencies for files included by mips.igen mips/vr5400.igen: checkpoint vr5400 instructions.	29 years ago
Andrew Cagney	89d0973831	Add support for 16 byte quantities to sim-endian macro H2T. Add model-filter field to option, include, model anf function igen records	29 years ago
Andrew Cagney	16bd5d6e52	Separate r5900 specifoc and mips16 instructions. Add support for this to configure (vr5400 target only)	29 years ago
Andrew Cagney	90ad43b2de	Add mips64vr5400 to configuration list Mark mipsIV instructions as being implemented by the vr5400. Sanitize.	29 years ago
Gavin Romig-Koch	635ae9cb7c	* sim/mips/gencode.c (build_instruction): Follow sim_write's lead in using BigEndianMem instead of !ByteSwapMem.	29 years ago
Andrew Cagney	122edc03de	Add basic igen configuration to autoconf. Disable.	29 years ago
Andrew Cagney	dad6f1f326	Add function to fetch 32bit instructions When address translation of insn fetch fails raise exception immediatly. Use address_word as type of all address variables (instead of unsigned64), the former is configured as either 32 or 64 bit type. Always compile fpu code (no #if has fpu)	29 years ago
Andrew Cagney	92ad193bb0	Use SIM*_OVERFLOW_RESULT defined in sim-alu.h	29 years ago
Andrew Cagney	aa324b9b1e	Output pc profile statistics once gathered.	29 years ago
Andrew Cagney	e2f8ffb736	Delete profile support from MIPS simulator, use sim/common/sim-profile module instead. Generate a "gmon.out" (gprof) when profiling the target PC. Add target PC profiling option --profile-pc-granularity (bucket size)	29 years ago
Andrew Cagney	fb5a2a3e39	Make mips registers of type unsigned_word. Ensure all references to MIPS registers use same type.	29 years ago
Andrew Cagney	ea985d2472	Move register definitions and macros out of interp.c and into sim-main.h	29 years ago
Andrew Cagney	284e759d1f	Rename generated file engine.c to oengine.c.	29 years ago
Andrew Cagney	339fb14904	* gencode.c (build_instruction): Use FPR_STATE not fpr_state.	29 years ago
Andrew Cagney	8b70f83790	* gencode.c (build_instruction): For "FPSQRT", output correct number of arguments to Recip.	29 years ago
Andrew Cagney	0c2c5f6141	Move global MIPS simulator variables into sim_cpu struct.	29 years ago
Andrew Cagney	18c64df613	o Add support for configuring wordsize, fp hardware and target endianness. Provide defaults for some tier-1 mips targets. o Parameterize all functions with SIM_DESC.	29 years ago
Andrew Cagney	adf4739efe	Add access to hi part of r5900 128 bit registers.	29 years ago
Bob Manson	26b20b0a0e	* configure: Regenerated. Can't hack one without the other...	29 years ago
Mark Alexander	6eedf3f4e5	* interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.	29 years ago
Andrew Cagney	e63bc706fe	Allow gencode.c to generate input to the igen generator.	29 years ago
Andrew Cagney	eb2e3c85ca	Pacify GCC -Wall	29 years ago
Andrew Cagney	92f91d1ff0	Remove need to update <targ>/Makefile.in when adding optional options to <targ>/configure.in. Simplify logic used to select target [default] endianness.	29 years ago
Andrew Cagney	76a6247f07	Add memory alignment config option.	29 years ago
Andrew Cagney	794e9ac96a	Simplify logic behind the generic configuration option --enable-sim-alignment.	29 years ago
Andrew Cagney	b45caf050c	Add support for --enable-sim-alignment to simulator common aclocal.m4 Add support for --alignment={strict,nonstrict,forced} to simulator common run-time options. For v850 use, make the default NONSTRICT_ALIGNMENT.	29 years ago
Gavin Romig-Koch	7afa8d4edc	* gencode.c: Add r3900 (tx39). * gencode.c: Fix some configuration problems by improving the relationship between tx19 and tx39.	29 years ago
Gavin Romig-Koch	667065d0d4	* sim/mips/gencode.c (build_instruction): Don't need to subtract 4 for JALR, just 2.	29 years ago
Gavin Romig-Koch	9cb8397f86	* sim/mips/interp.c: Correct some HASFPU problems.	29 years ago
Andrew Cagney	a2ab5e65eb	Update to reflect change to sim/common/aclocal.m4 (allow sim/common directory to specify its own unqiue config.h file).	29 years ago
Andrew Cagney	11ac69e013	Short form of sample-size option had wrong value.	29 years ago
Andrew Cagney	972f3a34f5	mips/sim_info was just returning?????	29 years ago
Andrew Cagney	9eeaaefa0f	Better word error messages.	29 years ago
Andrew Cagney	c31c13b481	Remove GCC specific `0x...LL', replace with SIGNED64 (0x...).	29 years ago
Gavin Romig-Koch	b637f306ba	tx19 and related necessary changes. * config.sub: Add tx19/r1900. * sim/mips/configure.in, sim/mips/gencode: Add tx19/r1900. * gcc/config.sub, gcc/configure: Add tx19/r1900. * gcc/config/mips/r1900.h, config/mips/t-r1900: New. * gas/config/tc-mips.c: Add tx19/r1900. * gcc/config/mips/mips.c: Don't build 16 bit to 32 bit stubs for TARGET_SOFT_FLOAT. * config.sub: Add "marketing-names" patch. * gcc/config.sub: Add "marketing-names" patch. * gcc/configure: Change "as" link from "../gas/as.new" to "../gas/as-new"; Same for "ld" link.	29 years ago
David Edelsohn	6fea47635b	* configure: Regenerated to track ../common/aclocal.m4 changes.	29 years ago
Andrew Cagney	52352d38d6	Test/fix pabsh, pabsw, psrlvw.	29 years ago
Andrew Cagney	8811705410	Fix doco on enable-sim-inline.	29 years ago
Andrew Cagney	fafce69ab1	Add ABFD argument to sim_create_inferior. Document. Add file sim-hload.c - generic load for hardware only simulators. Review each simulators sim_open, sim_load, sim_create_inferior so that they more closely match required behavour.	29 years ago
Andrew Cagney	7230ff0faa	Flush defunct sim_kill.	29 years ago
Andrew Cagney	247fccdeb5	Add ABFD argument to sim_open call. Pass through to sim_config so that image properties such as endianness can be checked. More strongly document the expected behavour of each of the sim_* interfaces. Add default endian argument to simulator config macro SIM_AC_OPTION_ENDIAN. Use in sim_config.	29 years ago
Gavin Romig-Koch	c12e2e4c48	gencode.c: Two arg MADD should not assign result to /bin/bash.	30 years ago
Andrew Cagney	1e851d2c82	Fix a number of problems in the r5900 specific p* (parallel) instructions. In particular a host endian dependency one fixed resolved most problems.	30 years ago
Jeff Law	6443523484	* gencode.c (build_instruction): Handle "pext5" according to version 1.95 of the r5900 ISA. Fixes pr12413 (c/h from toshiba).	30 years ago
Jeff Law	649625bb8e	* gencode.c (build_instruction): Handle "ppac5" according to version 1.95 of the r5900 ISA. fixes pr12407 (c/h from toshiba).	30 years ago
Jeff Law	05d1322f2c	* interp.c (sim_engine_run): Reset the ZERO register to zero regardless of FEATURE_WARN_ZERO.	30 years ago

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353 Commits (3fcb85483c84be99135979216566fdb1dc1e2ae2)