339fb14904
* gencode.c (build_instruction): Use FPR_STATE not fpr_state.
29 years ago
8b70f83790
* gencode.c (build_instruction): For "FPSQRT", output correct number
of arguments to Recip.
29 years ago
eaa202ddd4
* gen-semantics.c (print_semantic_body): Use CIA not cia.ip. Escape
newlines at end of generated call to sim_engine_abort.
29 years ago
81b3b32cda
Sanitize additional files.
29 years ago
5a9bddea84
Enable d10v simulator testsuite - two tests: Hello World and exit47.
29 years ago
fd89abc204
Handle core regions which start at a poorly aligned address.
29 years ago
7456a10d9b
* sim-alu.h (ALU64_HAD_OVERFLOW): Define.
(ALU64_SUB): Define.
* Make-common.in (all): Build SIM_EXTRA_ALL first.
(.gdbinit): Remove dependencies, generate once per build.
29 years ago
055ee2977f
Checkpoint IGEN version of MIPS simulator.
29 years ago
0c2c5f6141
Move global MIPS simulator variables into sim_cpu struct.
29 years ago
1b217de0f3
Correct type of address argument for sim_core_{read,write}
29 years ago
18c64df613
o Add support for configuring wordsize, fp hardware and target
endianness. Provide defaults for some tier-1 mips targets.
o Parameterize all functions with SIM_DESC.
29 years ago
d5cecca93c
Output line-ref to original igen source file when generating trace
statements.
Define NIA macro (dependant on gen-delayed-branch).
Verify opening/closing quote in input assembler strings.
29 years ago
1155e06e3f
* simops.c (OP_6A01): Change OP_POSTDEC to OP_POSTINC and move
exception generation code to OP_6E01.
(OP_6E01): Change OP_POSTINC to OP_POSTDEC and insert exception
generation code.
PR 13550
29 years ago
b83093ff79
* simops.c (OP_6401): postdecrement on r15 is OK, remove exception.
(OP_6601): Ditto.
PR 13498
29 years ago
93f0cb6975
* simops.c (OP_6401): postdecrement on r15 is OK, remove exception.
(OP_6601): Ditto.
29 years ago
49a6eed58a
Snap. Gets through igen's checks.
29 years ago
8782bfcfc4
Add -Wnodiscard option so that warning about discarded instructions
can be suppressed.
Allow ``<insn-spec> { <nmemonic> | <model> }'' in instruction file.
29 years ago
2875c6c685
Build IGEN with the MIPS simulator.
29 years ago
f2b3001251
MIPS/IGEN checkpoint - doesn't build.
29 years ago
391c71708e
Checkpoint IGEN input file for MIPS simulator.
29 years ago
b3c77578dc
Rewrite simulator floating point module. Do not rely on host FP
implementation. Add preliminary support for different IEEE-754
rounding modes. Implement SQRT in software.
Update TiC80 simulator.
Add sim-fpu -> TestFloat interface for testing.
29 years ago
63fe2cc799
Fix typo, WITH_TARGET_WORD_BITSIZE not WITH_TARGET_BITSIZE.
29 years ago
adf4739efe
Add access to hi part of r5900 128 bit registers.
29 years ago
26b20b0a0e
* configure: Regenerated.
Can't hack one without the other...
29 years ago
e9b53280ba
Do not sanitize out sim/testsuite/common directory.
29 years ago
5f90b21e40
* d10v_sim.h (INC_ADDR): Align MOD_E to increment before testing
for end condition.
PR 13334
29 years ago
823f2df47f
* interp.c (pc_addr): Discard upper bit(s) of PC in case
IMAP1 selects unified memory.
PR 13275
29 years ago
6eedf3f4e5
* interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
29 years ago
b28ad90b4d
* sim-main.h: delete null override of SIM_ENGINE_HALT_HOOK and
SIM_ENGINE_RESTART_HOOK.
29 years ago
68f92f98ac
* sim-break.c (sim_set_breakpoint sim_clear_breakpoint): Use ZALLOC
and zfree instead of xmalloc and free. Prevents warnings.
29 years ago
af51b8d56d
Add/use SIM_AC_OPTION_BITSIZE.
29 years ago
7a3fb4e6ea
* config/v850/tm-v850.h (BREAKPOINT): Use 1 word DIVH insn with
RRRRR=0 for simulator breakpoint. Previous breakpoint insn was two
words.
29 years ago
e63bc706fe
Allow gencode.c to generate input to the igen generator.
29 years ago
eb2e3c85ca
Pacify GCC -Wall
29 years ago
b9d580a4b0
* Make-common.in: New files sim-break.c, sim-break.h.
* sim-base.h: Add point to breakpoint list to sim_state_base.
* sim-break.c sim-break.h: New modules that implement intrinsic
breakpoint support.
* sim-module.c: Add breakpoint module.
29 years ago
bfebf1a52a
r5900 sanitization fixes.
29 years ago
c118539e6b
mips64vr5900el-elf -> mips64r5900-elf.
29 years ago
34d07b7867
* sim-events.c (SIM_EVENTS_POLL_RATE): poll more often than once
an hour.
* sim-n-core.h (WITH_XOR_ENDIAN): MSVC barfs on
if (0) { 1 % 0; }
* sim-core.c (sim_core_xor_write_buffer): WITH_XOR_ENDIAN + 1.
(SIGBUS) define for Windows.
* sim-trace.c (trace_printf,debug_printf): added ALMOST_STDC.
* sim-resume.c: define SIGTRAP for windows.
* sim-xcat.h: use token pasting if ALMOST_STDC.
29 years ago
832f05e865
vr5900-r5900.
29 years ago
1398204eb0
Check v850eq popm[hl] instructions.
Check v850 NMI/RETI.
29 years ago
4141b1c63d
* Make-common.in (SIM_SCACHE, SIM_DEFAULT_MODEL): Assign configured values.
(CONFIG_CFLAGS): Add same.
29 years ago
9f4fd82344
* sim-types.h (SIGNED64): ##i64 when _MSC_VER, not _WIN32.
(SIGNED32): use ##i32.
29 years ago
8f80453197
* configure.in: i386-windows is a cross, so don't expect
libiberty to be there.
* configure: updated.
29 years ago
92f91d1ff0
Remove need to update <targ>/Makefile.in when adding optional options
to <targ>/configure.in.
Simplify logic used to select target [default] endianness.
29 years ago
76a6247f07
Add memory alignment config option.
29 years ago
8d332f9c1a
Enable --alignment option, stop sim-options.c hardwiring the alignment.
29 years ago
4ca7d6d25b
Fix disabling of model code when simulator does not support modeling.
Stops `-p' crashing simulators.
29 years ago
794e9ac96a
Simplify logic behind the generic configuration option --enable-sim-alignment.
29 years ago
b45caf050c
Add support for --enable-sim-alignment to simulator common aclocal.m4
Add support for --alignment={strict,nonstrict,forced} to simulator common
run-time options.
For v850 use, make the default NONSTRICT_ALIGNMENT.
29 years ago
f13f11b494
Removed the v850eq sanitization
29 years ago
Andrew Cagney
Fred Fish
Bob Manson
Mark Alexander
Felix Lee
Stu Grossman
Jeff Law
Nick Clifton