binutils-gdb

Commit Graph

Author	SHA1	Message	Date
Andrew Cagney	113dd8b27d	2003-02-27 Andrew Cagney <cagney@redhat.com> * remote-sim.h (sim_open, sim_load, sim_create_inferior): Rename _bfd to bfd.	24 years ago
DJ Delorie	638ceb1a84	merge from gcc	24 years ago
Nick Clifton	ecc51f48c5	Add SHT_IA_64_LOPSREG, SHT_IA_64_HIPSREG and SHT_IA_64_PRIORITY_INIT. Add code to display these values in readelf.	24 years ago
Nick Clifton	d1c1f9109a	(ldmac, stmac): Replace MACREG with MS32 and MD32.	24 years ago
DJ Delorie	4938384a1f	merge from gcc	24 years ago
Daniel Jacobowitz	e2803db937	* libiberty.h (lrealpath): Add declaration.	24 years ago
Andrew Cagney	836cc9f493	Index: include/gdb/ChangeLog 2003-02-20 Andrew Cagney <ac131313@redhat.com> * remote-sim.c (gdbsim_insert_breakpoint) (gdbsim_remove_breakpoint): Delete #ifdef SIM_HAS_BREAKPOINTS code. Index: include/gdb/ChangeLog 2003-02-20 Andrew Cagney <ac131313@redhat.com> * remote-sim.h (SIM_RC): Delete unused SIM_RC_UNKNOWN_BREAKPOINT, SIM_RC_INSUFFICIENT_RESOURCES and SIM_RC_DUPLICATE_BREAKPOINT. (sim_set_breakpoint, sim_clear_breakpoint): Delete declarations. (sim_clear_all_breakpoints, sim_enable_breakpoint): Ditto. (sim_enable_all_breakpoints, sim_disable_breakpoint): Ditto. (sim_disable_all_breakpoints): Ditto. Index: sim/common/ChangeLog 2003-02-20 Andrew Cagney <ac131313@redhat.com> * Make-common.in (SIM_NEW_COMMON_OBJS): Remove sim-break.o (sim-break_h): Delete macro. (sim-break.o): Delete rule. * sim-break.c: Delete file. * sim-break.h: Delete file. * sim-base.h [SIM_HAVE_BREAKPOINTS]: Don't include "sim-break.h". (STATE_BREAKPOINTS): Delete macro. (sim_state_base): Delete field breakpoints. * sim-module.c (modules) [SIM_HAVE_BREAKPOINTS]: Don't add sim_break_install to array.	24 years ago
Alan Modra	89c3607e7b	* ppc64.h (IS_PPC64_TLS_RELOC): Rename from IS_TLS_RELOC.	24 years ago
Alan Modra	948567965d	* ppc.h: Replace DTPMOD64, TPREL64, DTPREL64 with DTPMOD32 etc. (IS_PPC_TLS_RELOC): Define.	24 years ago
Nick Clifton	fde78edd7a	Add support for marking ARM ELF binaries as support the Cirrus EP9312 Maverick floating point co-processor.	24 years ago
Alan Modra	5255ffd3df	* ppc.h: Add TLS relocs. Format. * ppc64.h: Likewise.	24 years ago
Dave Anglin	974a8e9cbf	* hppa.h (ldwa, ldda): Add ordered opcodes.	24 years ago
Alexandre Oliva	6aefc2162d	* mips.h (EF_MIPS_XGOT): Define.	24 years ago
Daniel Jacobowitz	5f9624e37e	include/ * hashtab.h (htab_alloc_with_arg, htab_free_with_arg): Add new types. (struct htab): Add alloc_arg, alloc_with_arg_f, free_with_arg_f. (htab_create_alloc_ex): New prototype. (htab_set_functions_ex): New prototype. libiberty/ * hashtab.c (htab_create_alloc_ex): New function. (hatab_set_functions_ex): New function. (htab_delete, htab_expand): Support alternate allocation functions.	24 years ago
Jakub Jelinek	b9734f3572	bfd/ * elf32-sparc.c (_bfd_sparc_elf_howto_table): Add TLS relocs. (elf32_sparc_rev32_howto): New variable. (sparc_reloc_map): Add TLS relocs. (elf32_sparc_reloc_type_lookup, elf32_sparc_info_to_howto): Handle REV32. (sparc_elf_hix22_reloc, sparc_elf_lox10_reloc, elf32_sparc_mkobject): New functions. (struct elf32_sparc_dyn_relocs, struct elf32_sparc_link_hash_entry, struct elf32_sparc_link_hash_table): New structures. (elf32_sparc_tdata, elf32_sparc_local_got_tls_type, elf32_sparc_hash_table): Define. (link_hash_newfunc, elf32_sparc_link_hash_table_create, create_got_section, elf32_sparc_create_dynamic_sections, elf32_sparc_copy_indirect_symbol, elf32_sparc_tls_transition): New functions. (elf32_sparc_check_relocs): Handle TLS relocs. Add dynamic reloc reference counting. (elf32_sparc_gc_sweep_hook): Likewise. (elf32_sparc_adjust_dynamic_symbol): Likewise. (elf32_sparc_size_dynamic_sections): Likewise. (elf32_sparc_relocate_section): Likewise. (allocate_dynrelocs, readonly_dynrelocs, dtpoff_base, tpoff): New functions. (elf32_sparc_object_p): Allocate backend private object data. (bfd_elf32_bfd_link_hash_table_create, elf_backend_copy_indirect_symbol, bfd_elf32_mkobject, elf_backend_can_refcount): Define. (elf_backend_create_dynamic_sections): Define to elf32_sparc_create_dynamic_sections. * reloc.c: Add SPARC TLS relocs. * bfd-in2.h, libbfd.h: Rebuilt. * elf64-sparc.c (sparc64_elf_howto_table): Add TLS relocs. (sparc_reloc_map): Likewise. gas/ * config/tc-sparc.c (sparc_ip): Handle TLS % operators. (tc_gen_reloc): Handle TLS relocs. (sparc_cons, cons_fix_new_sparc): Handle %r_tls_dtpoff. * config/tc-sparc.h (tc_fix_adjustable): Don't adjust TLS relocs. * config/obj-elf.c (obj_elf_section_word): Handle tls. (obj_elf_type): Handle tls_object. include/ * elf/sparc.h: Add TLS relocs. Move R_SPARC_REV32 to 252. ld/testsuite/ * ld-sparc/sparc.exp: New. * ld-sparc/tlsg32.s: New test. * ld-sparc/tlsg32.sd: Likewise. * ld-sparc/tlsg64.s: Likewise. * ld-sparc/tlsg64.sd: Likewise. * ld-sparc/tlslib.s: Likewise. * ld-sparc/tlsnopic.s: Likewise. * ld-sparc/tlspic.s: Likewise. * ld-sparc/tlssunbin32.dd: Likewise. * ld-sparc/tlssunbin32.rd: Likewise. * ld-sparc/tlssunbin32.s: Likewise. * ld-sparc/tlssunbin32.sd: Likewise. * ld-sparc/tlssunbin32.td: Likewise. * ld-sparc/tlssunbin64.dd: Likewise. * ld-sparc/tlssunbin64.rd: Likewise. * ld-sparc/tlssunbin64.s: Likewise. * ld-sparc/tlssunbin64.sd: Likewise. * ld-sparc/tlssunbin64.td: Likewise. * ld-sparc/tlssunbinpic32.s: Likewise. * ld-sparc/tlssunbinpic64.s: Likewise. * ld-sparc/tlssunnopic32.dd: Likewise. * ld-sparc/tlssunnopic32.rd: Likewise. * ld-sparc/tlssunnopic32.s: Likewise. * ld-sparc/tlssunnopic32.sd: Likewise. * ld-sparc/tlssunnopic64.dd: Likewise. * ld-sparc/tlssunnopic64.rd: Likewise. * ld-sparc/tlssunnopic64.s: Likewise. * ld-sparc/tlssunnopic64.sd: Likewise. * ld-sparc/tlssunpic32.dd: Likewise. * ld-sparc/tlssunpic32.rd: Likewise. * ld-sparc/tlssunpic32.s: Likewise. * ld-sparc/tlssunpic32.sd: Likewise. * ld-sparc/tlssunpic32.td: Likewise. * ld-sparc/tlssunpic64.dd: Likewise. * ld-sparc/tlssunpic64.rd: Likewise. * ld-sparc/tlssunpic64.s: Likewise. * ld-sparc/tlssunpic64.sd: Likewise. * ld-sparc/tlssunpic64.td: Likewise.	24 years ago
Martin Schwidefsky	c20c23d506	* s390.h: Add s390 TLS relocations.	24 years ago
Nick Clifton	5177500f26	Add SH2E support	24 years ago
Alan Modra	f0abc2a11f	include/elf/ChangeLog * sh.h: Split out various bits to bfd/elf32-sh64.h. include/opcode/ChangeLog * m68hc11.h (cpu6812s): Define. bfd/ChangeLog * elf-bfd.h (struct bfd_elf_section_data): Remove tdata. Change dynindx to an int. Rearrange for better packing. * elf.c (_bfd_elf_new_section_hook): Don't alloc if already done. * elf32-mips.c (bfd_elf32_new_section_hook): Define. * elf32-sh64.h: New. Split out from include/elf/sh.h. (struct _sh64_elf_section_data): New struct. (sh64_elf_section_data): Don't dereference sh64_info (was tdata). * elf32-sh64-com.c: Include elf32-sh64.h. * elf32-sh64.c: Likewise. (sh64_elf_new_section_hook): New function. (bfd_elf32_new_section_hook): Define. (sh64_elf_fake_sections): Adjust for sh64_elf_section_data change. (sh64_bfd_elf_copy_private_section_data): Likewise. (sh64_elf_final_write_processing): Likewise. * elf32-sparc.c (struct elf32_sparc_section_data): New. (elf32_sparc_new_section_hook): New function. (SET_SEC_DO_RELAX, SEC_DO_RELAX): Delete. (sec_do_relax): Define. (elf32_sparc_relax_section): Adjust to use sec_do_relax. (elf32_sparc_relocate_section): Likewise. * elf64-mips.c (bfd_elf64_new_section_hook): Define. * elf64-mmix.c (struct _mmix_elf_section_data): New. (mmix_elf_section_data): Define. Use throughout file. (mmix_elf_new_section_hook): New function. (bfd_elf64_new_section_hook): Define. * elf64-ppc.c (struct _ppc64_elf_section_data): New. (ppc64_elf_section_data): Define. Use throughout. (ppc64_elf_new_section_hook): New function. (bfd_elf64_new_section_hook): Define. * elf64-sparc.c (struct sparc64_elf_section_data): New. (sparc64_elf_new_section_hook): New function. (SET_SEC_DO_RELAX, SEC_DO_RELAX): Delete. (sec_do_relax): Define. (sparc64_elf_relax_section): Adjust to use sec_do_relax. (sparc64_elf_relocate_section): Likewise. (bfd_elf64_new_section_hook): Define. * elfn32-mips.c (bfd_elf32_new_section_hook): Define. * elfxx-mips.c (struct _mips_elf_section_data): New. (mips_elf_section_data): Define. Use throughout. (_bfd_mips_elf_new_section_hook): New function. (mips_elf_create_got_section): Don't alloc used_by_bfd. * elfxx-mips.h (_bfd_mips_elf_new_section_hook): Declare. * elfxx-target.h (bfd_elfNN_new_section_hook): Add #ifndef. * Makefile.am: Run "make dep-am". * Makefile.in: Regenerate. opcodes/ChangeLog * sh64-dis.c: Include elf32-sh64.h. * Makefile.am: Run "make dep-am". * Makefile.in: Regenerate. gas/ChangeLog * config/tc-sh64.c (shmedia_frob_section_type): Adjust for changed sh64_elf_section_data. * config/tc-sh64.h: Include elf32-sh64.h. * config/tc-m68hc11.c: Don't include stdio.h. (md_show_usage): Fix missing continuation. * Makefile.am: Run "make dep-am". * Makefile.in: Regenerate. ld/ChangeLog * emultempl/sh64elf.em: Include elf32-sh64.h. (sh64_elf_${EMULATION_NAME}_before_allocation): Adjust for changed sh64_elf_section_data. (sh64_elf_${EMULATION_NAME}_after_allocation): Likewise.	24 years ago
Svein Seldal	0da35f8be8	Updates for fixing tic4x arch tagging of its object files. * bfd/coffcode.h (coff_set_flags): Added get/set arch hooks. * include/coff/tic4x.h (TICOFF_TARGET_MACHINE_GET): Fixed define bug * include/coff/ti.h (TICOFF_TARGET_MACHINE_GET): Added macros * ld/Makefile.am: Added etic3xcoff.o and etic4xcoff_onchip.o * ld/Makefile.in: Regenerate * ld/configure.tgt: Added extra target emulations * ld/emulparams/tic3xcoff.sh: Remove old settings * ld/emulparams/tic4xcoff.sh: Ditto * ld/emulparams/tic3xcoff-onchip.sh: Added new * ld/scripttempl/tic4xcoff.sc: Revise and combine both c3x and c4x * ld/scripttempl/tic3xcoff.sc: Remove	24 years ago
Martin Schwidefsky	43d92ce0bf	* s390.h: Rename R_390_GOTOFF to R_390_GOTOFF32. Add new gotoff, gotplt and pltoff relocations.	24 years ago
Alan Modra	d65aa1c654	missed changelog entry	24 years ago
Alan Modra	029ad6e2ac	* common.h: Formatting, typo fixes. (DT_ENCODING): Correct value. * common.h (ELFOSABI_AROS): Define. (ELFOSABI_OPENVMS): Likewise. (ELFOSABI_NSK): Likewise.	24 years ago
Alan Modra	1df2fdb5b7	* ppc.h: Split out ppc64 definitions to.. * pcc64.h: ..here. New file. (R_PPC64_REL30): Rename from R_PPC64_ADDR30.	24 years ago
Nick Clifton	4931efb9b0	Change EM_MSP430 value to new, officially assigned number.	24 years ago
DJ Delorie	32b5d30132	merge from gcc	24 years ago
Chris Demetriou	626d0adf84	2003-01-07 Chris Demetriou <cgd@broadcom.com> * mips.h: Fix missing space in comment. (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4, INSN_ISA5) (INSN_ISA32, INSN_ISA32R2, INSN_ISA64): Shift values right by four bits.	24 years ago
Stan Cox	fa59d133f4	* dis-asm.h (print_insn_iq2000): Declare. * common.h (EM_IQ2000): Define. * iq2000.h: New file.	24 years ago
Chris Demetriou	071742cf97	[ gas/ChangeLog ] 2003-01-02 Chris Demetriou <cgd@broadcom.com> * config/tc-mips.c: Update copyright years to include 2003. (mips_ip): Fix indentation of "+A", "+B", and "+C" handling. Additionally, clean up their code slightly and clean up their comments some more. * doc/c-mips.texi: Add MIPS32r2 to ".set mipsN" documentation. [ gas/testsuite/ChangeLog ] 2003-01-02 Chris Demetriou <cgd@broadcom.com> * gas/mips/elf_arch_mips32r2.d: Fix file description comment. [ include/opcode/ChangeLog ] 2003-01-02 Chris Demetriou <cgd@broadcom.com> * mips.h: Update copyright years to include 2002 (which had been missed previously) and 2003. Make comments about "+A", "+B", and "+C" operand types more descriptive.	24 years ago
Chris Demetriou	bbcc08074f	[ gas/ChangeLog ] 2002-12-31 Chris Demetriou <cgd@broadcom.com> * config/tc-mips.c (validate_mips_insn, mips_ip): Recognize the "+D" operand, which will be used only by the disassembler. [ gas/testsuite/ChangeLog ] 2002-12-31 Chris Demetriou <cgd@broadcom.com> * gas/mips/cp0sel-names-mips32.d: New test. * gas/mips/cp0sel-names-mips32r2.d: New test. * gas/mips/cp0sel-names-mips64.d: New test. * gas/mips/cp0sel-names-numeric.d: New test. * gas/mips/cp0sel-names-sb1.d: New test. * gas/mips/cp0sel-names.s: New test source file. * gas/mips/mips.exp: Run new tests. [ include/opcode/ChangeLog ] 2002-12-31 Chris Demetriou <cgd@broadcom.com> * mips.h: Note that the "+D" operand type name is now used. [ opcodes/ChangeLog ] 2002-12-31 Chris Demetriou <cgd@broadcom.com> * mips-dis.c (mips_cp0sel_name): New structure. (mips_cp0sel_names_mips3264, mips_cp0sel_names_mips3264r2) (mips_cp0sel_names_sb1): New arrays. (mips_arch_choice): New structure members "cp0sel_names" and "cp0sel_names_len". (mips_arch_choices): Add references to new cp0sel_names arrays as appropriate, and make all existing entries reference appropriate mips_XXX_names_numeric arrays rather than simply using NULL. (mips_cp0sel_names, mips_cp0sel_names_len): New variables. (lookup_mips_cp0sel_name): New function. (set_default_mips_dis_options): Set mips_cp0sel_names and mips_cp0sel_names_len as appropriate. Remove now-unnecessary checks for NULL register name arrays. (parse_mips_dis_option): Likewise. (print_insn_arg): Handle "+D" operand type. * mips-opc.c (mips_builtin_opcodes): Add new "+D" variants of mfc0, mtc0, dmfc0, and dmtc0 to print CP0+sel register names symbolically.	24 years ago
Chris Demetriou	af7ee8bfa9	[ bfd/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * aoutx.h (NAME(aout,machine_type)): Add bfd_mach_mipsisa32r2 case. * archures.c (bfd_mach_mipsisa32r2): New define. * bfd-in2.h: Regenerate. * cpu-mips.c (I_mipsisa32r2): New enum value. (arch_info_struct): Add entry for I_mipsisa32r2. * elfxx-mips.c (elf_mips_isa, _bfd_elf_mips_mach) (_bfd_mips_elf_print_private_bfd_data): Handle E_MIPS_ARCH_32R2. (_bfd_mips_elf_final_write_processing): Add bfd_mach_mipsisa32r2 case. (_bfd_mips_elf_merge_private_bfd_data): Handle merging of binaries marked as using MIPS32 Release 2. [ binutils/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * doc/binutils.texi (objdump): Note MIPS HWR (Hardware Register) changes in MIPS -M options. [ gas/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * configure.in: Recognize mipsisa32r2, mipsisa32r2el, and CPU variants. * configure: Regenerate. * config/tc-mips.c (ISA_HAS_DROR, ISA_HAS_ROR): New defines. (macro_build): Handle "K" operand. (macro2): Use ISA_HAS_DROR and ISA_HAS_ROR in the places where CPU_HAS_DROR and CPU_HAS_ROR are currently used. (mips_ip): New variable "lastpos", and implement "+A", "+B", and "+C" operands for MIPS32 Release 2 ins/ext instructions. Implement "K" operand for MIPS32 Release 2 rdhwr instruction. (validate_mips_insn): Implement "+" as a way to extend the allowed operands, and implement "K", "+A", "+B", and "+C" operands. (OPTION_MIPS32R2): New define. (md_longopts): Add entry for OPTION_MIPS32R2. (OPTION_ELF_BASE): Adjust to accomodate OPTIONS_MIPS32R2. (md_parse_option): Handle OPTION_MIPS32R2. (s_mipsset): Reimplement handling of ".set mipsN" options and add support for ".set mips32r2". (mips_cpu_info_table): Add entry for "mips32r2" (MIPS32 Release 2). (md_show_usage): Document "-mips32r2" option. * doc/as.texinfo: Document "-mips32r2" option. * doc/c-mips.texi: Likewise. [ gas/testsuite/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * gas/mips/cp0-names-mips32r2.d: New test. * gas/mips/hwr-names-mips32r2.d: New test. * gas/mips/hwr-names-numeric.d: New test. * gas/mips/hwr-names.s: New test source file. * gas/mips/mips32r2.d: New test. * gas/mips/mips32r2.s: New test source file. * gas/mips/mips32r2-ill.l: New test. * gas/mips/mips32r2-ill.s: New test source file. * gas/mips/mips.exp: Add mips32r2 architecture data array entry. Run new tests mentioned above. [ include/elf/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * mips.h (E_MIPS_ARCH_32R2): New define. [ include/opcode/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * mips.h: Document "+" as the start of two-character operand type names, and add new "K", "+A", "+B", and "+C" operand types. (OP_MASK_INSMSB, OP_SH_INSMSB, OP_MASK_EXTMSB) (OP_SH_EXTMSB, INSN_ISA32R2, ISA_MIPS32R2, CPU_MIPS32R2): New defines. [ opcodes/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * mips-dis.c (mips_cp0_names_mips3264r2, mips_hwr_names_numeric) (mips_hwr_names_mips3264r2): New arrays. (mips_arch_choice): New "hwr_names" member. (mips_arch_choices): Adjust for structure change, and add a new entry for "mips32r2" ISA. (mips_hwr_names): New variable. (set_default_mips_dis_options): Set mips_hwr_names. (parse_mips_dis_option): New "hwr-names" option which sets mips_hwr_names, and adjust "reg-names=ARCH" to set mips_hwr_names. (print_insn_arg): Change return type to "int" and use that to indicate number of characters consumed. Add support for "+" operand extension character, "+A", "+B", "+C", and "K" operands. (print_insn_mips): Adjust for changes to print_insn_arg. (print_mips_disassembler_options): Adjust for "hwr-names" addition and "reg-names" change. * mips-opc (I33): New define (shorthand for INSN_ISA32R2). (mips_builtin_opcodes): Note that "nop" and "ssnop" are special forms of "sll". Add new MIPS32 Release 2 instructions: ehb, di, ei, ext, ins, jr.hb, jalr.hb, mfhc1, mfhc2, mthc1, mthc2, rdhwr, rdpgpr, seb, seh, synci, wrpgpr, wsbh. Note that hardware rotate instructions (ror, rorv) can be used on MIPS32 Release 2, and add the official mnemonics for them (rotr, rotrv) and the similar "rotl" mnemonic for left-rotate.	24 years ago
Nick Clifton	2469cfa284	Add support for msp430.	24 years ago
Nick Clifton	3badd4651b	Added some more pseudo opcodes for system call processing.	24 years ago
Chris Demetriou	640c0ccdc9	[ binutils/ChangeLog ] 2002-12-27 Chris Demetriou <cgd@broadcom.com> * doc/binutils.texi (objdump): Document MIPS -M options. [ gas/testsuite/ChangeLog ] 2002-12-27 Chris Demetriou <cgd@broadcom.com> * gas/mips/cp0-names-mips32.d: New file. * gas/mips/cp0-names-mips64.d: New file. * gas/mips/cp0-names-numeric.d: New file. * gas/mips/cp0-names-sb1.d: New file. * gas/mips/cp0-names.s: New file. * gas/mips/fpr-names-32.d: New file. * gas/mips/fpr-names-64.d: New file. * gas/mips/fpr-names-n32.d: New file. * gas/mips/fpr-names-numeric.d: New file. * gas/mips/fpr-names.s: New file. * gas/mips/gpr-names-32.d: New file. * gas/mips/gpr-names-64.d: New file. * gas/mips/gpr-names-n32.d: New file. * gas/mips/gpr-names-numeric.d: New file. * gas/mips/gpr-names.s: New file. * gas/mips/mips.exp: Run new tests. [ include/ChangeLog ] 2002-12-27 Chris Demetriou <cgd@broadcom.com> * dis-asm.h (print_mips_disassembler_options): Prototype. [ include/opcode/ChangeLog ] 2002-12-19 Chris Demetriou <cgd@broadcom.com> * mips.h (OP_OP_COP0, OP_OP_COP1, OP_OP_COP2, OP_OP_COP3) (OP_OP_LWC1, OP_OP_LWC2, OP_OP_LWC3, OP_OP_LDC1, OP_OP_LDC2) (OP_OP_LDC3, OP_OP_SWC1, OP_OP_SWC2, OP_OP_SWC3, OP_OP_SDC1) (OP_OP_SDC2, OP_OP_SDC3): Define. [ opcodes/ChangeLog ] 2002-12-27 Chris Demetriou <cgd@broadcom.com> * disassemble.c (disassembler_usage): Add invocation of print_mips_disassembler_options. * mips-dis.c (print_mips_disassembler_options) (set_default_mips_dis_options, parse_mips_dis_option) (parse_mips_dis_options, choose_abi_by_name, choose_arch_by_name) (choose_arch_by_number): New functions. (mips_abi_choice, mips_arch_choice): New structures. (mips32_reg_names, mips64_reg_names, reg_names): Remove. (mips_gpr_names_numeric, mips_gpr_names_oldabi) (mips_gpr_names_newabi, mips_fpr_names_numeric) (mips_fpr_names_32, mips_fpr_names_n32, mips_fpr_names_64) (mips_cp0_names_numeric, mips_cp0_names_mips3264) (mips_cp0_names_sb1, mips_abi_choices, mips_arch_choices) (mips_processor, mips_isa, mips_gpr_names, mips_fpr_names) (mips_cp0_names): New variables. (print_insn_args): Use new variables to print GPR, FPR, and CP0 register names. (mips_isa_type): Remove. (print_insn_mips): Remove ISA and CPU setup since it is now done... (_print_insn_mips): Here. Remove register setup code, and call set_default_mips_dis_options and parse_mips_dis_options instead. (print_mips16_insn_arg): Use mips_gpr_names instead of mips32_names.	24 years ago
Kazu Hirata	a7df09ae3c	* sim-h8300.h: Remove ^M.	24 years ago
Alan Modra	c6b640180c	* bfdlink.h (struct bfd_link_info): Add "strip_discarded".	24 years ago
DJ Delorie	2eb47c5fe9	* xstormy16.h: Add XSTORMY16_12.	24 years ago
Alan Modra	cddd00895f	* bfdlink.h (struct bfd_link_info): Replace bfd_boolean fields with bit-fields. Rearrange to put all like types together.	24 years ago
DJ Delorie	5fdd7054d3	* xstormy16.h (START_RELOC_NUMBERS) Add relocation numbers for R_XSTORMY16_LO16 and R_XSTORMY16_HI16.	24 years ago
Alan Modra	3f2a9fb79d	* hppa.h (completer_chars): #if 0 out.	24 years ago
Alan Modra	9bd1915f75	* ns32k.h (struct ns32k_opcode): Constify "name", "operands" and "default_args". (struct not_wot): Constify "args". (struct not): Constify "name". (numopcodes): Delete. (endop): Delete.	24 years ago
Alan Modra	0e073f4ce8	* pj.h (pj_opc_info_t): Add union. * pj-dis.c (print_insn_pj): Adjust for pj_opc_info_t change. * config/tc-pj.c (little, big, parse_exp_save_ilp): Prototype. (c_to_r, ipush_code, fake_opcode, alias): Likewise. (fake_opcode): Adjust for pj_opc_int_t change. (md_begin): Likewise. (md_assemble): Likewise. (ipush_code): Correct parse_exp_save_ilp call. Test pending_reloc instead of non-existent third arg of parse_exp_save_ilp. (md_parse_option): Correct "little" and "big" calls.	24 years ago
Nick Clifton	84ad6ede87	Add support for displaying extension to DWARF2 used by Unified Parallel C compiler.	24 years ago
Jim Wilson	c10d9d8fc3	Patch to update IA-64 port to SDM 2.1. bfd/ChangeLog * cpu-ia64-opc.c: Add operand constant "ar.csd". gas/ChangeLog * config/tc-ia64.c (pseudo_func): Add "@pause" constant for "hint" instruction. (emit_one_bundle): Handle "hint" instruction. (operand_match): Match IA64_OPND_AR_CSD. gas/testsuite/ChangeLog * gas/ia64/opc-b.d: Update for instructions added by SDM2.1. * gas/ia64/opc-b.s: Ditto. * gas/ia64/opc-f.d: Ditto. * gas/ia64/opc-f.s: Ditto. * gas/ia64/opc-i.d: Ditto. * gas/ia64/opc-i.s: Ditto. * gas/ia64/opc-m.d: Ditto. * gas/ia64/opc-m.s: Ditto. * gas/ia64/opc-x.d: Ditto. * gas/ia64/opc-x.s: Ditto. include/opcode/ChangeLog * ia64.h: Fix copyright message. (IA64_OPND_AR_CSD): New operand kind. opcodes/ChangeLog * ia64-opc-d.c (ia64_opcodes_d): Add "hint" instruction. * ia64-opc-b.c: Add "hint.b" instruction. * ia64-opc-f.c: Add "hint.f" instruction. * ia64-opc-i.c: Add "hint.i" instruction. * ia64-opc-m.c: Add "hint.m", "fc.i", "ld16", "st16", and "cmp8xchg16" instructions. * ia64-opc-x.c: Add "hint.x" instruction. * ia64-opc.h (AR_CSD): New macro. * ia64-ic.tbl: Update according to SDM2.1. * ia64-raw.tbl: Ditto. * ia64-waw.tbl: Ditto. * ia64-gen.c (in_iclass): Handle "hint" like "nop". (lookup_regindex): Recognize AR[FCR], AR[EFLAG], AR[CSD], AR[SSD], AR[CFLG], AR[FSR], AR[FIR], and AR[FDR]. * ia64-asmtab.c: Regenerate.	24 years ago
Richard Henderson	a823923bf6	include/opcode/ * ia64.h (enum ia64_opnd): Add IA64_OPND_LDXMOV. bfd/ * cpu-ia64-opc.c (elf64_ia64_operands): Add ldxmov entry. opcodes/ * ia64-opc-m.c: Add ld8.mov. * ia64-asmtab.c: Regenerate. gas/ * config/tc-ia64.c (operand_match): Add IA64_OPND_LDXMOV case. gas/testsuite/ * gas/ia64/ldxmov-1.[ds]: New. * gas/ia64/ldxmov-2.[ls]: New. * gas/ia64/ia64.exp: Run them.	24 years ago
Alan Modra	4fdf0a751a	* cgen.h (struct cgen_maybe_multi_ifield): Add "const PTR p" to union. Constify "leaf" and "multi".	24 years ago
Stephane Carrez	542751c41f	* m68hc11.h (EF_M68HC12_MACH, EF_M68HCS12_MACH): Define. (EF_M68HC11_MACH_MASK, EF_M68HC11_MACH): Define. (EF_M68HC11_MERGE_MACH, EF_M68HC11_CAN_MERGE_MACH): Define.	24 years ago
Alan Modra	b34976b65a	s/boolean/bfd_boolean/ s/true/TRUE/ s/false/FALSE/. Simplify comparisons of bfd_boolean vars with TRUE/FALSE. Formatting.	24 years ago
Alan Modra	947216bf8f	include/elf/ChangeLog * internal.h (elf32_internal_ehdr, Elf32_Internal_Ehdr, elf64_internal_ehdr, Elf64_Internal_Ehdr, elf32_internal_phdr, Elf32_Internal_Phdr, elf64_internal_phdr, Elf64_Internal_Phdr, elf32_internal_shdr, Elf32_Internal_Shdr, elf64_internal_shdr, Elf64_Internal_Shdr, elf32_internal_sym, elf64_internal_sym, Elf32_Internal_Sym, Elf64_Internal_Sym, Elf32_Internal_Note, elf32_internal_note, elf32_internal_rel, Elf32_Internal_Rel, elf64_internal_rel, Elf64_Internal_Rel, elf32_internal_rela, elf64_internal_rela, Elf32_Internal_Rela, Elf64_Internal_Rela, elf32_internal_dyn, elf64_internal_dyn, Elf32_Internal_Dyn, Elf64_Internal_Dyn, elf32_internal_verdef, elf64_internal_verdef, elf32_internal_verdaux, elf64_internal_verdaux, elf32_internal_verneed, elf64_internal_verneed, elf32_internal_vernaux, elf64_internal_vernaux, elf32_internal_versym, elf64_internal_versym, Elf32_Internal_Verdef, Elf64_Internal_Verdef, Elf32_Internal_Verdaux, Elf64_Internal_Verdaux, Elf32_Internal_Verneed, Elf64_Internal_Verneed, Elf32_Internal_Vernaux, Elf64_Internal_Vernaux, Elf32_Internal_Versym, Elf64_Internal_Versym, Elf32_Internal_Syminfo, Elf64_Internal_Syminfo): Delete. (Elf_Internal_Rel): Delete. bfd/ChangeLog * elf-bfd.h: Replace occurrences of Elf32_Internal_* and Elf64_Internal_* with Elf_Internal_. Replace Elf_Internal_Rel with Elf_Internal_Rela. elf-hppa.h, elf-m10200.c, elf-m10300.c, elf32-arc.c, elf32-arm.h, elf32-avr.c, elf32-cris.c, elf32-d10v.c, elf32-d30v.c, elf32-dlx.c, elf32-fr30.c, elf32-frv.c, elf32-gen.c, elf32-h8300.c, elf32-hppa.c, elf32-i370.c, elf32-i386.c, elf32-i860.c, elf32-i960.c, elf32-ip2k.c, elf32-m32r.c, elf32-m68hc11.c, elf32-m68hc12.c, elf32-m68k.c, elf32-mcore.c, elf32-mips.c, elf32-openrisc.c, elf32-or32.c, elf32-ppc.c, elf32-s390.c, elf32-sh.c, elf32-v850.c, elf32-vax.c, elf32-xstormy16.c, elf64-alpha.c, elf64-gen.c, elf64-hppa.c, elf64-mips.c, elf64-mmix.c, elf64-ppc.c, elf64-s390.c, elf64-sh64.c, elf64-sparc.c, elf64-x86-64.c, elfarm-nabi.c, elfarm-oabi.c, elfcode.h, elflink.h, elfn32-mips.c, elfxx-ia64.c, elfxx-mips.c: Ditto. * elf-hppa.h (elf_hppa_internal_shdr): Delete. Use Elf_Internal_Shdr throughout instead. * elf.c (_bfd_elf_no_info_to_howto_rel): Delete. * elfcode.h (elf_swap_reloca_in): Pass source operand as a bfd_byte . Remove INLINE keyword. (elf_swap_reloc_in): Likewise. Also clear r_addend. (elf_swap_reloc_out, elf_swap_reloca_out): Pass destination operand as a bfd_byte . (elf_write_relocs): Consolidate REL and RELA code. (elf_slurp_reloc_table_from_section): Simplify REL code. (NAME(_bfd_elf,size_info)): Populate reloc swap entries. * elf-bfd.h (MAX_INT_RELS_PER_EXT_REL): Define. * elflink.h (elf_link_read_relocs_from_section): Consolidate REL and RELA code. (elf_link_adjust_relocs): Likewise. Don't malloc space for temp reloc array, use a fixed size of MAX_INT_RELS_PER_EXT_REL. (elf_link_output_relocs): Likewise. (elf_reloc_link_order): Likewise. (elf_finish_pointer_linker_section): Likewise. (struct elf_link_sort_rela): Remove union. (elf_link_sort_cmp1): Update to suit. (elf_link_sort_cmp2): Here too. (elf_link_sort_relocs): Consolidate REL and RELA code. Fix memory over-allocation for int_rels_per_ext_rel != 1 case. * elf32-arm.h: Update all bfd_elf32_swap_reloc_out calls. * elf32-i386.c: Likewise. * elf32-cris.c: Likewise for bfd_elf32_swap_reloca_out. * elf32-hppa.c, elf32-i370.c, elf32-m68k.c, elf32-ppc.c, elf32-s390.c, elf32-sh.c, elf32-vax.c, elfxx-mips.c: Likewise. * elf64-alpha.c: Likewise for bfd_elf64_swap_reloca_out. * elf64-hppa.c, elf64-mips.c, elf64-ppc.c, elf64-s390.c, elf64-sh64.c, elf64-sparc.c, elf64-x86-64.c: Likewise. * elfxx-ia64.c: Likewise for bfd_elfNN_swap_reloca_out. * elfxx-mips.c (sort_dynamic_relocs): Likewise for bfd_elf32_swap_reloc_in. * elf32-arm.h: Update elf32_arm_info_to_howto calls. * elf32-mips.c: Likewise for mips_info_to_howto_rel. (mips_elf64_swap_reloc_in): Zero r_addend. (mips_elf64_be_swap_reloc_in): Likewise. (mips_elf64_slurp_one_reloc_table): Simplify. * elf64-alpha.c (alpha_elf_size_info): Populate reloc swap entries. * elf64-hppa.c (hppa64_elf_size_info): Likewise. * elf64-sparc.c (sparc64_elf_size_info): Likewise.	24 years ago
Jason Thorpe	40fb7a1f93	* libiberty.h (basename): Add NetBSD to the list.	24 years ago
DJ Delorie	2a80c0a458	merge from gcc	24 years ago

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598 Commits (2c4c2bc0a526e8e0c186cd7cb005e2947cac3b88)