binutils-gdb

Commit Graph

Author	SHA1	Message	Date
Tatsuyuki Ishi	159afbb761	RISC-V: Initial ld.bfd support for TLSDESC. Only relocation handling for now; relaxation is not implemented yet. bfd/ * elfnn-riscv.c (riscv_elf_check_relocs): Record GOT reference and paired relocation for TLSDESC_HI20. (riscv_elf_adjust_dynamic_symbol): Allocate GOT and reloc slots for TLSDESC symbols. (riscv_elf_size_dynamic_sections): Likewise but for local symbols. (tlsdescoff): New helper to determine static addend for R_TLSDESC. (riscv_elf_relocate_section): Ignore TLSDESC_CALL reloc for now (it is relaxation only). Handle TLSDESC_{LOAD,ADD}_LO12 as paired pcrel relocs. For TLS GOT slot generation, generalize the logic to handle any combination of (GD, IE, TLSDESC). Add TLSDESC Rela generation. * ld/testsuite/ld-riscv-elf/tls*: Add TLSDESC instruction sequences next to the existing GD and IE sequences. Update expectations.	2 years ago
Vladislav Belov	60856b5cda	Fix implementation of SUBALIGN.	2 years ago
Alan Modra	4b72a278f4	PR23881, pdp11 binutils fails if too much debug data The PR testcase overflows one of the exec header fields, e_syms (the size of the symbol table), leading to the string table offset being wrong. Things go downhill from there. Fixed by checking for overflow. This happens to trigger in the ld testsuite, so xfail that test. PR 23881 bfd/ * libaout.h (swap_exec_header_out): Return a bool. * aoutx.h (swap_exec_header_out): Check for overflow in exec header. * pdp11.c (swap_exec_header_out): Likewise. * i386lynx.c (WRITE_HEADERS): Adjust. ld/ * testsuite/ld-scripts/map-address.exp: xfail pdp11.	2 years ago
Andreas Krebbel	896a639bab	s390: Avoid reloc overflows on undefined weak symbols Replace relative long addressing instructions of weak symbols, which will definitely resolve to zero, with either a load address of 0, a NOP, or a trapping insn. This prevents the PC32DBL relocation from overflowing in case the binary will be loaded at 4GB or more. bfd/ChangeLog: * bfd/elf64-s390.c (elf_s390_relocate_section): Replace instructions using undefined weak symbols with relative addressing to avoid relocation overflows. ld/ChangeLog: * ld/testsuite/ld-s390/s390.exp: * ld/testsuite/ld-s390/8GB.ld: New test. * ld/testsuite/ld-s390/weakundef-1.dd: New test. * ld/testsuite/ld-s390/weakundef-1.s: New test.	2 years ago
mengqinggang	54af729da1	LoongArch: Run overflow testcases only on LoongArch target	2 years ago
Jinyang He	fb266c9083	Avoid unused space in .rela.dyn if sec was discarded The relsec size is still increased although sec is discarded, which cause a lot of unused space allocated. Avoid size increased if sec was discarded. bfd/ChangeLog: * bfd/elfnn-loongarch.c: (allocate_dynrelocs): Do not increase sreloc size when discarded_section. ld/ChangeLog: * ld/testsuite/ld-loongarch-elf/ld-loongarch-elf.exp: Add test. * ld/testsuite/ld-loongarch-elf/pie_discard.d: New test. * ld/testsuite/ld-loongarch-elf/pie_discard.s: New test. * ld/testsuite/ld-loongarch-elf/pie_discard.t: New test.	3 years ago
Jinyang He	b98da8583a	LoongArch: ld: Fix other pop relocs overflow check and add tests Add reloc_unsign_bits() to fix others sop_pop relocs overflow check. Then add over/underflow tests for relocs B, SOP_POP and PCREL20_S2. bfd/ChangeLog: * bfd/elfxx-loongarch.c: Add reloc_unsign_bits(). ld/ChangeLog: * ld/testsuite/ld-loongarch-elf/ld-loongarch-elf.exp: Add tests. * ld/testsuite/ld-loongarch-elf/abi1_max_imm.dd: New test. * ld/testsuite/ld-loongarch-elf/abi1_max_imm.s: New test. * ld/testsuite/ld-loongarch-elf/abi1_sops.s: New test. * ld/testsuite/ld-loongarch-elf/abi2_max_imm.s: New test. * ld/testsuite/ld-loongarch-elf/abi2_overflows.s: New test. * ld/testsuite/ld-loongarch-elf/max_imm_b16.d: New test. * ld/testsuite/ld-loongarch-elf/max_imm_b21.d: New test. * ld/testsuite/ld-loongarch-elf/max_imm_b26.d: New test. * ld/testsuite/ld-loongarch-elf/max_imm_pcrel20.d: New test. * ld/testsuite/ld-loongarch-elf/overflow_b16.d: New test. * ld/testsuite/ld-loongarch-elf/overflow_b21.d: New test. * ld/testsuite/ld-loongarch-elf/overflow_b26.d: New test. * ld/testsuite/ld-loongarch-elf/overflow_pcrel20.d: New test. * ld/testsuite/ld-loongarch-elf/overflow_s_0_10_10_16_s2.d: New test. * ld/testsuite/ld-loongarch-elf/overflow_s_0_5_10_16_s2.d: New test. * ld/testsuite/ld-loongarch-elf/overflow_s_10_12.d: New test. * ld/testsuite/ld-loongarch-elf/overflow_s_10_16.d: New test. * ld/testsuite/ld-loongarch-elf/overflow_s_10_16_s2.d: New test. * ld/testsuite/ld-loongarch-elf/overflow_s_10_5.d: New test. * ld/testsuite/ld-loongarch-elf/overflow_s_5_20.d: New test. * ld/testsuite/ld-loongarch-elf/overflow_u.d: New test. * ld/testsuite/ld-loongarch-elf/overflow_u_10_12.d: New test. * ld/testsuite/ld-loongarch-elf/underflow_b16.d: New test. * ld/testsuite/ld-loongarch-elf/underflow_b21.d: New test. * ld/testsuite/ld-loongarch-elf/underflow_b26.d: New test. * ld/testsuite/ld-loongarch-elf/underflow_pcrel20.d: New test. * ld/testsuite/ld-loongarch-elf/underflow_s_0_10_10_16_s2.d: New test. * ld/testsuite/ld-loongarch-elf/underflow_s_0_5_10_16_s2.d: New test. * ld/testsuite/ld-loongarch-elf/underflow_s_10_12.d: New test. * ld/testsuite/ld-loongarch-elf/underflow_s_10_16.d: New test. * ld/testsuite/ld-loongarch-elf/underflow_s_10_16_s2.d: New test. * ld/testsuite/ld-loongarch-elf/underflow_s_10_5.d: New test. * ld/testsuite/ld-loongarch-elf/underflow_s_5_20.d: New test.	3 years ago
Alan Modra	9c697157b8	Make is_relocatable_executable only affect dynamic section syms I believe the only elflink.c specialties for is_relocatable_executable needed by tic6x are those directly related to dynamic section symbols. I might be wrong, the code in record_dynamic_symbol and record_link_assignment predated the tic6x port, but I think these were symbian specific hacks. The shlib-app-1* testsuite changes aren't needed for this patch. I started making them when trying to remove is_relocatable_executable completely, but figure it is worth keeping the more permissive address matching for some future generic linker change. The static-app-1* changes also adjust to the fact that an unneeded "c" no longer appears in the dynamic symbol table. bfd/ * elflink.c (bfd_elf_link_record_dynamic_symbol): Don't do anything special for is_relocatable_executable. (bfd_elf_record_link_assignment): Likewise. ld/ * testsuite/ld-tic6x/shlib-app-1.rd: Make some address matching more permissive. * testsuite/ld-tic6x/shlib-app-1b.rd: Likewise. * testsuite/ld-tic6x/shlib-app-1r.rd: Likewise. * testsuite/ld-tic6x/shlib-app-1rb.rd: Likewise. * testsuite/ld-tic6x/static-app-1.rd: Likewise, and adjust expected dynamic symbol table. * testsuite/ld-tic6x/static-app-1b.rd: Likewise. * testsuite/ld-tic6x/static-app-1r.rd: Likewise. * testsuite/ld-tic6x/static-app-1rb.rd: Likewise.	2 years ago
Tatsuyuki Ishi	0ac6b8701f	RISC-V: Fix local GOT and reloc size calculation for TLS. The previous code did not account correctly for two cases: * A TLS symbol can be referenced with multiple TLS types (although rare), in which case it only allocated the maximum slot size among the types, instead of the sum. * TLS relocations are only needed for DLLs, unlike normal symbols which requires relocations for all PIE code. Modify the logic to account for the two cases, so this fixes the redundant dynamic R_RISCV_NONE in .rela.dyn when using --no-pie for TLS GD and IE. Passed the gcc/binutils regressions of riscv-gnu-toolchain. bfd/ * elfnn-riscv.c (riscv_elf_size_dynamic_sections): Handle relocation sizing for TLS and non-TLS symbols differently, with the former requiring relocs on DLL while the latter requiring on PIE. Allocate GOT slots and relocation slots for each TLS type separately, accounting for the possibility of a TLS variable getting referenced by multiple symbols. ld/ * testsuite/ld-riscv-elf/ld-riscv-elf.exp: Updated. * testsuite/ld-riscv-elf/tls*: New testcase for TLS GD and IE, with symbols referred by both types and global and local symbols.	2 years ago
Alan Modra	b19a0b915f	Re: elf_backend_finish_dynamic_symbol returning false Making a bfd_final_link failure noisy requires testsuite changes.	3 years ago
H.J. Lu	5bc71c2a6b	x86-64: Add R_X86_64_CODE_6_GOTTPOFF For add %reg1, name@gottpoff(%rip), %reg2 and add name@gottpoff(%rip), %reg1, %reg2 add #define R_X86_64_CODE_6_GOTTPOFF 50 if the instruction starts at 6 bytes before the relocation offset. They are similar to R_X86_64_GOTTPOFF. Linker can covert GOTTPOFF to add $name@tpoff, %reg1, %reg2 Rewrite fx_tcbit, fx_tcbit2 and fx_tcbit3 usage to generate R_X86_64_GOTPCRELX, R_X86_64_REX_GOTPCRELX, R_X86_64_CODE_4_GOTPCRELX, R_X86_64_CODE_4_GOTTPOFF, R_X86_64_CODE_4_GOTPC32_TLSDESC and R_X86_64_CODE_6_GOTTPOFF. NB: There is no need to check BFD_RELOC_X86_64_CODE_4_GOTTPOFF in md_assemble since there is only BFD_RELOC_X86_64_GOTTPOFF at this stage, which will be converted to BFD_RELOC_X86_64_CODE_4_GOTTPOFF or BFD_RELOC_X86_64_CODE_6_GOTTPOFF in i386_validate_fix. 5 relocations: #define R_X86_64_CODE_5_GOTPCRELX 46 #define R_X86_64_CODE_5_GOTTPOFF 47 #define R_X86_64_CODE_5_GOTPC32_TLSDESC 48 #define R_X86_64_CODE_6_GOTPCRELX 49 #define R_X86_64_CODE_6_GOTPC32_TLSDESC 51 are added for completeness and they are unused. bfd/ * elf64-x86-64.c (x86_64_elf_howto_table): Add R_X86_64_CODE_5_GOTPCRELX, R_X86_64_CODE_5_GOTTPOFF, R_X86_64_CODE_5_GOTPC32_TLSDESC, R_X86_64_CODE_6_GOTPCRELX, R_X86_64_CODE_6_GOTTPOFF and R_X86_64_CODE_6_GOTPC32_TLSDESC. (R_X86_64_standard): Updated. (x86_64_reloc_map): Add R_X86_64_CODE_5_GOTPCRELX, R_X86_64_CODE_5_GOTTPOFF, R_X86_64_CODE_5_GOTPC32_TLSDESC, R_X86_64_CODE_6_GOTPCRELX, R_X86_64_CODE_6_GOTTPOFF and R_X86_64_CODE_6_GOTPC32_TLSDESC. (elf_x86_64_check_tls_transition): Handle R_X86_64_CODE_6_GOTTPOFF. (elf_x86_64_tls_transition): Likewise. (elf_x86_64_scan_relocs): Handle R_X86_64_CODE_6_GOTTPOFF. Issue an error for R_X86_64_CODE_5_GOTPCRELX, R_X86_64_CODE_5_GOTTPOFF, R_X86_64_CODE_5_GOTPC32_TLSDESC, R_X86_64_CODE_6_GOTPCRELX and R_X86_64_CODE_6_GOTPC32_TLSDESC. (elf_x86_64_relocate_section): Handle R_X86_64_CODE_6_GOTTPOFF. * reloc.c (bfd_reloc_code_real): Add BFD_RELOC_X86_64_CODE_5_GOTPCRELX, BFD_RELOC_X86_64_CODE_5_GOTTPOFF, BFD_RELOC_X86_64_CODE_5_GOTPC32_TLSDESC, BFD_RELOC_X86_64_CODE_6_GOTPCRELX, BFD_RELOC_X86_64_CODE_6_GOTTPOFF and BFD_RELOC_X86_64_CODE_6_GOTPC32_TLSDESC. * bfd-in2.h: Regenerated. * libbfd.h: Likewise. elfcpp/ * x86_64.h (R_X86_64_CODE_5_GOTPCRELX): New. (R_X86_64_CODE_5_GOTTPOFF): Likewise. (R_X86_64_CODE_5_GOTPC32_TLSDESC): Likewise. (R_X86_64_CODE_6_GOTPCRELX): Likewise. (R_X86_64_CODE_6_GOTTPOFF): Likewise. (R_X86_64_CODE_6_GOTPC32_TLSDESC): Likewise. gas/ * config/tc-i386.c (tc_i386_fix_adjustable): Handle BFD_RELOC_X86_64_CODE_6_GOTTPOFF. (md_assemble): Don't check BFD_RELOC_X86_64_CODE_4_GOTTPOFF. Allow "add %reg1, foo@gottpoff(%rip), %reg2". (output_disp): Handle BFD_RELOC_X86_64_CODE_6_GOTTPOFF. Rewrite setting fx_tcbitX bits for BFD_RELOC_X86_64_GOTTPOFF, BFD_RELOC_X86_64_GOTPC32_TLSDESC and BFD_RELOC_32_PCREL. (md_apply_fix): Handle BFD_RELOC_X86_64_CODE_6_GOTTPOFF. (i386_validate_fix): Rewrite fx_tcbitX bit checking for BFD_RELOC_X86_64_GOTTPOFF, BFD_RELOC_X86_64_GOTPC32_TLSDESC and BFD_RELOC_32_PCREL. (tc_gen_reloc): Handle BFD_RELOC_X86_64_CODE_6_GOTTPOFF. * testsuite/gas/i386/x86-64-gottpoff.d: Updated. * testsuite/gas/i386/x86-64-gottpoff.s: Add tests for "add %reg1, foo@gottpoff(%rip), %reg2" and "add foo@gottpoff(%rip), %reg, %reg2". gold/ * x86_64.cc (Target_x86_64::optimize_tls_reloc): Handle R_X86_64_CODE_6_GOTTPOFF. (Target_x86_64::Scan::get_reference_flags): Likewise. (Target_x86_64::Scan::local): Likewise. (Target_x86_64::Scan::global): Likewise. (Target_x86_64::Relocate::relocate): Likewise. (Target_x86_64::Relocate::relocate_tls): Likewise. (Target_x86_64::Relocate::tls_ie_to_le): Handle. R_X86_64_CODE_6_GOTTPOFF. * testsuite/x86_64_ie_to_le.s: Add tests for "add %reg1, foo@gottpoff(%rip), %reg2" and "add foo@gottpoff(%rip), %reg, %reg2". * testsuite/x86_64_ie_to_le.sh: Updated. include/ * elf/x86-64.h (elf_x86_64_reloc_type): Add R_X86_64_CODE_5_GOTPCRELX, R_X86_64_CODE_5_GOTTPOFF, R_X86_64_CODE_5_GOTPC32_TLSDESC, R_X86_64_CODE_6_GOTPCRELX, R_X86_64_CODE_6_GOTTPOFF and R_X86_64_CODE_6_GOTPC32_TLSDESC. ld/ * testsuite/ld-x86-64/tlsbindesc.s: Add R_X86_64_CODE_6_GOTTPOFF tests. * testsuite/ld-x86-64/tlsbindesc.d: Updated. * testsuite/ld-x86-64/tlsbindesc.rd: Likewise.	3 years ago
Alan Modra	60c95acdac	Link x86-64 mark-plt-1.so with --no-as-needed Fixes FAIL: Build mark-plt-1.so where gcc is built with default --as-needed. * testsuite/ld-x86-64/x86-64.exp (Build mark-plt-1.so): Pass --no-as-needed.	3 years ago
H.J. Lu	1b06334552	elf: Rename is_standard_elf to uses_elf_em Rename is_standard_elf to uses_elf_em for targets which use elf.em. binutils/ PR ld/31289 * testsuite/lib/binutils-common.exp (is_standard_elf): Renamed to ... (uses_elf_em): This. ld/ PR ld/31289 * testsuite/ld-elf/fatal-warnings-2a.d: Replace is_standard_elf with uses_elf_em. * testsuite/ld-elf/fatal-warnings-2b.d: Likewise. * testsuite/ld-elf/fatal-warnings-3a.d: Likewise. * testsuite/ld-elf/fatal-warnings-3b.d: Likewise. * testsuite/ld-elf/fatal-warnings-4a.d: Likewise. * testsuite/ld-elf/fatal-warnings-4b.d: Likewise.	3 years ago
Nick Clifton	9c8d5b9a4f	Remove -pie from command line of fatal-warnings 1a and 1b tests.	3 years ago
mengqinggang	a0aa6f4abd	LoongArch: ld: Add support for TLS LE symbol with addend Add support for TLS LE symbol with addend, such as: lu12i.w $t0, %le_hi20(a + 0x8) ori $t0, $t0, %le_lo12(a + 0x8)	3 years ago
H.J. Lu	eb12b17047	elf: Add is_standard_elf PR ld/31289 tests failed for fr30-elf, frv-elf, ft32-elf, iq2000-elf, mn10200-elf, ms1-elf and msp430-elf targets: FAIL: ld-elf/fatal-warnings-2a FAIL: ld-elf/fatal-warnings-2b FAIL: ld-elf/fatal-warnings-3a FAIL: ld-elf/fatal-warnings-3b FAIL: ld-elf/fatal-warnings-4a FAIL: ld-elf/fatal-warnings-4b even though PR ld/31289 targets xfail for [is_generic] targets. These targets not only don't use the generic_link_hash_table linker, but also don't use the standard ELF emulation. Add is_standard_elf for ELF targets which use the standard ELF emulation and replace [is_generic] with ![is_standard_elf] in PR ld/31289 tests. binutils/ PR ld/31289 * testsuite/lib/binutils-common.exp (is_standard_elf): New. ld/ PR ld/31289 * testsuite/lib/binutils-common.exp (is_generic): Return 1 for fr30--, frv--elf, ft32--, iq2000--, mn10200--, moxie--moxiebox, msp430--* and mt--. * testsuite/ld-elf/fatal-warnings-2a.d: Replace [is_generic] with ![is_standard_elf]. * testsuite/ld-elf/fatal-warnings-2b.d: Likewise. * testsuite/ld-elf/fatal-warnings-3a.d: Likewise. * testsuite/ld-elf/fatal-warnings-3b.d: Likewise. * testsuite/ld-elf/fatal-warnings-4a.d: Likewise. * testsuite/ld-elf/fatal-warnings-4b.d: Likewise.	3 years ago
H.J. Lu	3eb33b8875	ld: Improve --fatal-warnings for unknown command-line options There are 2 problems with --fatal-warnings for unknown command-line options: 1. --fatal-warnings doesn't trigger an error for an unknown command-line option when --fatal-warnings is the last command-line option. 2. When --fatal-warnings triggers an error for an unknown command-line option, the message says that the unknown command-line option is ignored. This patch queues unknown command-line option warnings and outputs queued command-line option warnings after all command-line options have been processed so that --fatal-warnings can work for unknown command-line options regardless of the order of --fatal-warnings. When --fatal-warnings is used, the linker message is changed from ld: warning: -z bad-option ignored to ld: error: unsupported option: -z bad-option The above also applies to "-z dynamic-undefined-weak" when the known "-z dynamic-undefined-weak" option is ignored. PR ld/31289 * ldelf.c (ldelf_after_parse): Use queue_unknown_cmdline_warning to warn the ignored -z dynamic-undefined-weak option. * ldmain.c (main): Call output_unknown_cmdline_warnings after calling ldemul_after_parse. * ldmisc.c (CMDLINE_WARNING_SIZE): New. (cmdline_warning_list): Likewise. (cmdline_warning_head): Likewise. (cmdline_warning_tail): Likewise. (queue_unknown_cmdline_warning): Likewise. (output_unknown_cmdline_warnings): Likewise. * ldmisc.h (queue_unknown_cmdline_warning): Likewise. (output_unknown_cmdline_warnings): Likewise. * emultempl/elf.em (gld${EMULATION_NAME}_handle_option): Use queue_unknown_cmdline_warning to warn unknown -z option. * testsuite/ld-elf/fatal-warnings-1a.d: New file. * testsuite/ld-elf/fatal-warnings-1b.d: Likewise. * testsuite/ld-elf/fatal-warnings-2a.d: Likewise. * testsuite/ld-elf/fatal-warnings-2b.d: Likewise. * testsuite/ld-elf/fatal-warnings-3a.d: Likewise. * testsuite/ld-elf/fatal-warnings-3b.d: Likewise. * testsuite/ld-elf/fatal-warnings-4a.d: Likewise. * testsuite/ld-elf/fatal-warnings-4b.d: Likewise.	3 years ago
Xi Ruoyao	7b0b94b7b9	LoongArch: Fix some test failures about TLS desc and TLS relaxation There are two issues causing 11 test failures: 1. The TLS desc tests are matching the entire disassemble of a linked executable. But if ld is configured --enable-default-hash-style=gnu (note that most modern distros use this option), the layout of the linked executables will be different and the immediate operands in the linked executables will also be different. So we add "--hash-style=both" for these tests to cancel the effect of --enable-default-hash-style=gnu, like [x86_64 mark-plt tests]. 2. By default objdump disassemble uses [pseudo-instructions] so "addi.w" is outputed as "li.w", causing mismatches in TLS relaxation tests. We can turn off the pseudo-instruction usage in objdump using "-M no-aliases" to fix them. [x86_64 mark-plt tests]: `16666ccc91` [pseudo-instructions]: `17f9439038` Signed-off-by: Xi Ruoyao <xry111@xry111.site>	3 years ago
mengqinggang	32ee2b4b71	LoongArch: Do not emit R_LARCH_RELAX for two register macros For two register macros (e.g. la.local $t0, $t1, symbol) used in extreme code model, do not emit R_LARCH_RELAX relocations.	3 years ago
H.J. Lu	16666ccc91	Update x86-64: Add -z mark-plt and -z nomark-plt Pass --hash-style=both to ld for -z mark-plt tests to support linker configured with --enable-default-hash-style=gnu. * testsuite/ld-x86-64/mark-plt-1b-x32.d: Pass --hash-style=both to ld. * testsuite/ld-x86-64/mark-plt-1b.d: Likewise. * testsuite/ld-x86-64/mark-plt-1d-x32.d: Likewise. * testsuite/ld-x86-64/mark-plt-1d.d: Likewise.	3 years ago
Xi Ruoyao	6590ec8097	LoongArch: Adapt R_LARCH_{PCALA,GOT,TLS_IE,TLS_DESC}64_* handling per psABI v2.30 In LoongArch psABI v2.30, an offset (-8 for LO20 and -12 for HI12) should be applied on PC for these reloc types to avoid wrong relocation when the instruction sequence crosses a page boundary. The lld linker has already adapted the change. Make it for the bfd linker too. Link: https://github.com/loongson/la-abi-specs/releases/v2.30 Link: https://github.com/loongson-community/discussions/issues/17 Link: https://github.com/llvm/llvm-project/pull/73387 Signed-off-by: Xi Ruoyao <xry111@xry111.site>	3 years ago
mengqinggang	156a2edbdb	LoongArch: Fix relaxation overflow caused by section alignment When deleting NOP instructions addend by .align at second pass, this may cause the PC decrease but the symbol address to remain unchanged due to section alignment. To solve this question, we subtract a maximux alignment of all sections like RISC-V.	3 years ago
changjiachen	2bee95b73c	LoongArch: ld: Adjusted some code order in relax.exp. ld/testsuite/ChangeLog: * ld/testsuite/ld-loongarch-elf/relax.exp: Modify test.	3 years ago
H.J. Lu	9167304255	elf: Add elf_backend_add_glibc_version_dependency When -z mark-plt is used to add DT_X86_64_PLT, DT_X86_64_PLTSZ and DT_X86_64_PLTENT, the r_addend field of the R_X86_64_JUMP_SLOT relocation stores the offset of the indirect branch instruction. However, glibc versions which don't have this commit in glibc 2.36: commit f8587a61892cbafd98ce599131bf4f103466f084 Author: H.J. Lu <hjl.tools@gmail.com> Date: Fri May 20 19:21:48 2022 -0700 x86-64: Ignore r_addend for R_X86_64_GLOB_DAT/R_X86_64_JUMP_SLOT According to x86-64 psABI, r_addend should be ignored for R_X86_64_GLOB_DAT and R_X86_64_JUMP_SLOT. Since linkers always set their r_addends to 0, we can ignore their r_addends. Reviewed-by: Fangrui Song <maskray@google.com> won't ignore the r_addend value in the R_X86_64_JUMP_SLOT relocation. Although this commit has been backported to glibc 2.33/2.34/2.35 release branches, it is safer to require glibc 2.36 for such binaries. Extend the glibc version dependency of GLIBC_ABI_DT_RELR for DT_RELR to also add GLIBC_2.36 version dependency for -z mark-plt on the shared C library if it provides a GLIBC_2.XX symbol version. * elflink.c (elf_find_verdep_info): Moved to ... * elf-bfd.h (elf_find_verdep_info): Here. (elf_backend_data): Add elf_backend_add_glibc_version_dependency. (_bfd_elf_link_add_glibc_version_dependency): New function. (_bfd_elf_link_add_dt_relr_dependency): Likewise. * elf64-x86-64.c (elf_x86_64_add_glibc_version_dependency): Likewise. (elf_backend_add_glibc_version_dependency): New. * elflink.c (elf_link_add_dt_relr_dependency): Renamed to ... (elf_link_add_glibc_verneed): This. Modified to support other glibc dependencies. (_bfd_elf_link_add_glibc_version_dependency): Likewise. (_bfd_elf_link_add_dt_relr_dependency): Likewise. (bfd_elf_size_dynamic_sections): Call elf_backend_add_glibc_version_dependency instead of elf_link_add_dt_relr_dependency. * elfxx-target.h (elf_backend_add_glibc_version_dependency): New. (elfNN_bed): Add elf_backend_add_glibc_version_dependency. ld/ * testsuite/ld-x86-64/mark-plt-1a.rd: New file. * testsuite/ld-x86-64/mark-plt-1b.rd: Likewise. * testsuite/ld-x86-64/x86-64.exp: Run -z mark-plt test for GLIBC_2.36 dependency.	3 years ago
H.J. Lu	2e93abb858	x86: Don't check R_386_NONE nor R_X86_64_NONE Update x86 ELF linker to skip R_386_NONE/R_X86_64_NONE when scanning relocations. bfd/ * PR ld/31047 * elf32-i386.c (elf_i386_scan_relocs): Don't check R_386_NONE. * elf64-x86-64.c (elf_x86_64_scan_relocs): Don't check R_X86_64_NONE. ld/ * PR ld/31047 * testsuite/ld-i386/i386.exp: Run PR ld/31047 test. * testsuite/ld-x86-64/x86-64.exp: Likewise. * testsuite/ld-i386/pr31047.d: New file. * testsuite/ld-x86-64/pr31047-x32.d: Likewise. * testsuite/ld-x86-64/pr31047.d: Likewise. * testsuite/ld-x86-64/pr31047a.s: Likewise. * testsuite/ld-x86-64/pr31047b.s: Likewise.	3 years ago
H.J. Lu	c9eb960580	ld: Adjust x86 and x86-64 tests for -z mark-plt To support -z mark-plt enabled by default, adjust x86 tests to accept non-zero r_addend for JUMP_SLOT relocation and pass -z nomark-plt to x86-64 tests if -z mark-plt changes the expected outputs. * testsuite/ld-elf/indirect-extern-access-2.rd: Allow non-zero r_addend for JUMP_SLOT relocation. * testsuite/ld-elf/pr23161d.rd: Likewise. * testsuite/ld-ifunc/ifunc-25c-x86.d: Likewise. * testsuite/ld-ifunc/ifunc-16-x86-64-now.d: Pass -z nomark-plt to linker. * testsuite/ld-ifunc/ifunc-16-x86-64.d: Likewise. * testsuite/ld-ifunc/ifunc-2-local-x86-64-now.d: Likewise. * testsuite/ld-ifunc/ifunc-2-local-x86-64.d: Likewise. * testsuite/ld-ifunc/ifunc-2-x86-64-now.d: Likewise. * testsuite/ld-ifunc/ifunc-2-x86-64.d: Likewise. * testsuite/ld-ifunc/ifunc-20-x86-64.d: Likewise. * testsuite/ld-ifunc/ifunc-5b-x86-64.d: Likewise. * testsuite/ld-ifunc/pr17154-x86-64-now.d: Likewise. * testsuite/ld-ifunc/pr17154-x86-64.d: Likewise. * testsuite/ld-x86-64/dt-relr-1a-x32.d: Likewise. * testsuite/ld-x86-64/dt-relr-1a.d: Likewise. * testsuite/ld-x86-64/dt-relr-1b-x32.d: Likewise. * testsuite/ld-x86-64/dt-relr-1b.d: Likewise. * testsuite/ld-x86-64/ibt-plt-2a-x32.d: Likewise. * testsuite/ld-x86-64/ibt-plt-2a.d: Likewise. * testsuite/ld-x86-64/ibt-plt-3a-x32.d: Likewise. * testsuite/ld-x86-64/ibt-plt-3a.d: Likewise. * testsuite/ld-x86-64/pr19636-2d.d: Likewise. * testsuite/ld-x86-64/pr19636-2e.d: Likewise. * testsuite/ld-x86-64/pr19636-2f.d: Likewise. * testsuite/ld-x86-64/pr19636-2l.d: Likewise. * testsuite/ld-x86-64/x86-64.exp: Pass -z nomark-plt to linker in 6 tests.	3 years ago
Alan Modra	fd67aa1129	Update year range in copyright notice of binutils files Adds two new external authors to etc/update-copyright.py to cover bfd/ax_tls.m4, and adds gprofng to dirs handled automatically, then updates copyright messages as follows: 1) Update cgen/utils.scm emitted copyrights. 2) Run "etc/update-copyright.py --this-year" with an extra external author I haven't committed, 'Kalray SA.', to cover gas testsuite files (which should have their copyright message removed). 3) Build with --enable-maintainer-mode --enable-cgen-maint=yes. 4) Check out /po/.pot which we don't update frequently.	3 years ago
mengqinggang	e493ba6255	LoongArch: Fix linker generate PLT entry for data symbol With old "medium" code model, we call a function with a pair of PCALAU12I and JIRL instructions. The assembler produces something like: 8: 1a00000c pcalau12i $t0, 0 8: R_LARCH_PCALA_HI20 g c: 4c000181 jirl $ra, $t0, 0 c: R_LARCH_PCALA_LO12 g The linker generates a "PLT entry" for data without any diagnostic. If "g" is a data symbol and ld with -shared option, it may load two instructions in the PLT. Without -shared option, loongarch_elf_adjust_dynamic_symbol can delete PLT entry. For R_LARCH_PCALA_HI20 relocation, linker only generate PLT entry for STT_FUNC and STT_GNU_IFUNC symbols.	4 years ago
Lulu Cai	06bfdc6e5e	LoongArch: Fix loongarch-elf target ld testsuite failure The loongarch-elf target does not support SHARED and PIE, so this target is skipped for some tests that require these options.	3 years ago
changjiachen	90827b4eef	LoongArch: ld: Add support for tls le relax. Add tls le relax related testsuites in ld. The new test cases are mainly tested in three aspects: 1. tls le relax function correctness test. 2. tls le relax boundary check test. 3. tls le relax function compatibility test. ld/testsuite/ChangeLog: * ld/testsuite/ld-loongarch-elf/relax.exp: Modify test. * ld/testsuite/ld-loongarch-elf/old-tls-le.s: New test. * ld/testsuite/ld-loongarch-elf/relax-bound-check-tls-le.s: Likewise. * ld/testsuite/ld-loongarch-elf/tls-relax-compatible-check-new.s: Likewise. * ld/testsuite/ld-loongarch-elf/relax-tls-le.s: Likewise. * ld/testsuite/ld-loongarch-elf/tls-relax-compatible-check-old.s: Likewise.	3 years ago
H.J. Lu	a533c8df59	x86-64: Add R_X86_64_CODE_4_GOTTPOFF/R_X86_64_CODE_4_GOTPC32_TLSDESC For add name@gottpoff(%rip), %reg mov name@gottpoff(%rip), %reg add # define R_X86_64_CODE_4_GOTTPOFF 44 and for lea name@tlsdesc(%rip), %reg add # define R_X86_64_CODE_4_GOTPC32_TLSDESC 45 if the instruction starts at 4 bytes before the relocation offset. They are similar to R_X86_64_GOTTPOFF and R_X86_64_GOTPC32_TLSDESC, respectively. Linker can covert GOTTPOFF to add $name@tpoff, %reg mov $name@tpoff, %reg and GOTPC32_TLSDESC to mov $name@tpoff, %reg mov name@gottpoff(%rip), %reg if the instruction is encoded with the REX2 prefix when possible. bfd/ * elf64-x86-64.c (x86_64_elf_howto_table): Add R_X86_64_CODE_4_GOTTPOFF and R_X86_64_CODE_4_GOTPC32_TLSDESC. (R_X86_64_standard): Updated. (x86_64_reloc_map): Add BFD_RELOC_X86_64_CODE_4_GOTTPOFF and BFD_RELOC_X86_64_CODE_4_GOTPC32_TLSDESC. (elf_x86_64_check_tls_transition): Handle R_X86_64_CODE_4_GOTTPOFF and R_X86_64_CODE_4_GOTPC32_TLSDESC. (elf_x86_64_tls_transition): Likewise. (elf_x86_64_scan_relocs): Likewise. (elf_x86_64_relocate_section): Likewise. * reloc.c (bfd_reloc_code_real): Add BFD_RELOC_X86_64_CODE_4_GOTTPOFF and BFD_RELOC_X86_64_CODE_4_GOTPC32_TLSDESC. * bfd-in2.h: Regenerated. * libbfd.h: Likewise. gas/ * config/tc-i386.c (tc_i386_fix_adjustable): Handle BFD_RELOC_X86_64_CODE_4_GOTTPOFF and BFD_RELOC_X86_64_CODE_4_GOTPC32_TLSDESC. (md_assemble): Handle BFD_RELOC_X86_64_CODE_4_GOTTPOFF. (output_insn): Don't add empty REX prefix with REX2 prefix. (output_disp): Handle BFD_RELOC_X86_64_CODE_4_GOTTPOFF and BFD_RELOC_X86_64_CODE_4_GOTPC32_TLSDESC. (md_apply_fix): Likewise. (i386_validate_fix): Generate BFD_RELOC_X86_64_CODE_4_GOTTPOFF or BFD_RELOC_X86_64_CODE_4_GOTPC32_TLSDESC if ixp->fx_tcbit3 is set. (tc_gen_reloc): Handle BFD_RELOC_X86_64_CODE_4_GOTTPOFF and BFD_RELOC_X86_64_CODE_4_GOTPC32_TLSDESC. * testsuite/gas/i386/x86-64-gottpoff.d: New file. * testsuite/gas/i386/x86-64-gottpoff.s: Likewise. * testsuite/gas/i386/x86-64-tlsdesc.d: Likewise. * testsuite/gas/i386/x86-64-tlsdesc.s: Likewise. include/ * elf/x86-64.h (elf_x86_64_reloc_type): Add R_X86_64_CODE_4_GOTTPOFF and R_X86_64_CODE_4_GOTPC32_TLSDESC ld/ * testsuite/ld-x86-64/tlsbindesc.d: Updated. * testsuite/ld-x86-64/tlsbindesc.rd: Likewise. * testsuite/ld-x86-64/tlsbindesc.s: Add R_X86_64_CODE_4_GOTTPOFF and R_X86_64_CODE_4_GOTPC32_TLSDESC tests.	3 years ago
H.J. Lu	3d5a60de52	x86-64: Add R_X86_64_CODE_4_GOTPCRELX For mov name@GOTPCREL(%rip), %reg test %reg, name@GOTPCREL(%rip) binop name@GOTPCREL(%rip), %reg where binop is one of adc, add, add, cmp, or, sbb, sub, xor instructions, add # define R_X86_64_CODE_4_GOTPCRELX 43 if the instruction starts at 4 bytes before the relocation offset. It similar to R_X86_64_GOTPCRELX. Linker can treat R_X86_64_CODE_4_GOTPCRELX as R_X86_64_GOTPCREL or convert the above instructions to lea name(%rip), %reg mov $name, %reg test $name, %reg binop $name, %reg if the instruction is encoded with the REX2 prefix when possible. bfd/ * elf64-x86-64.c (x86_64_elf_howto_table): Add R_X86_64_CODE_4_GOTPCRELX. (R_X86_64_standard): Updated. (x86_64_reloc_map): Add BFD_RELOC_X86_64_CODE_4_GOTPCRELX. (elf_x86_64_convert_load_reloc): Handle R_X86_64_CODE_4_GOTPCRELX. (elf_x86_64_scan_relocs): Likewise. (elf_x86_64_relocate_section): Likewise. * reloc.c (bfd_reloc_code_real): Add BFD_RELOC_X86_64_CODE_4_GOTPCRELX. * bfd-in2.h: Regenerated. * libbfd.h: Likewise. gas/ * write.h (fix): Add fx_tcbit3. Change fx_unused to 1 bit. * config/tc-i386.c (tc_i386_fix_adjustable): Handle BFD_RELOC_X86_64_CODE_4_GOTPCRELX. (tc_gen_reloc): Likewise. (output_disp): Set fixP->fx_tcbit3 for REX2 prefix. (i386_validate_fix): Generate BFD_RELOC_X86_64_CODE_4_GOTPCRELX if fixp->fx_tcbit3 is set. * config/tc-i386.h (TC_FORCE_RELOCATION_LOCAL): Add BFD_RELOC_X86_64_CODE_4_GOTPCRELX. (TC_FORCE_RELOCATION_ABS): Likewise. * testsuite/gas/i386/x86-64-gotpcrel.s: Add tests for R_X86_64_CODE_4_GOTPCRELX. * testsuite/gas/i386/x86-64-localpic.s: Likewise. * testsuite/gas/i386/x86-64-gotpcrel.d: Updated. * testsuite/gas/i386/x86-64-localpic.d: Likewise. * testsuite/gas/i386/ilp32/x86-64-localpic.d: Likewise. include/ * elf/x86-64.h (elf_x86_64_reloc_type): Add R_X86_64_CODE_4_GOTPCRELX. ld/ * testsuite/ld-x86-64/apx-load1.s: New file. * testsuite/ld-x86-64/apx-load1a.d: Likewise. * testsuite/ld-x86-64/apx-load1b.d: Likewise. * testsuite/ld-x86-64/apx-load1c.d: Likewise. * testsuite/ld-x86-64/apx-load1d.d: Likewise. * testsuite/ld-x86-64/x86-64.exp: Run apx-load1a, apx-load1b, apx-load1c and apx-load1d.	3 years ago
Nelson Chu	73d931e560	RISC-V: PR31179, The SET/ADD/SUB fix breaks ABI compatibility with 2.41 objects * Problematic fix commit, `2029e13917` RISC-V: Clarify the behaviors of SET/ADD/SUB relocations * Bugzilla, https://sourceware.org/bugzilla/show_bug.cgi?id=31179#c5 The addend of SUB_ULEB128 should be zero if using .uleb128, but we make it non-zero by accident in assembler before. This causes troubles by applying the above commit, since the calculation is changed to support .reloc SUB relocations with non-zero addend. We encourage people to rebuild their stuff to get the non-zero addend of SUB_ULEB128, but that might need some times, so report warnings to inform people need to rebuild their stuff if --check-uleb128 is enabled. Since the failed .reloc cases for ADD/SET/SUB/ULEB128 are rarely to use, it may acceptable that stop supproting them until people rebuld their stuff, maybe half-year or a year later. Or maybe we should teach people that don't write the .reloc R_RISCV_SUB* with non-zero constant, and then report warnings/errors in assembler. bfd/ * elfnn-riscv.c (perform_relocation): Ignore the non-zero addend of R_RISCV_SUB_ULEB128. (riscv_elf_relocate_section): Report warnings to inform people need to rebuild their stuff if --check-uleb128 is enabled. So that can get the right non-zero addend of R_RISCV_SUB_ULEB128. * elfxx-riscv.h (struct riscv_elf_params): Added bool check_uleb128. ld/ * NEWS: Updated. * emultempl/riscvelf.em: Added linker risc-v target options, --[no-]check-uleb128, to enable/disable checking if the addend of uleb128 is non-zero or not. So that people will know they need to rebuild the objects with binutils 2.42 and up, to get the right zero addend of SUB_ULEB128 relocation, or they may get troubles if using .reloc. * ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp: Updated. * ld/testsuite/ld-riscv-elf/pr31179*: New test cases.	3 years ago
Lulu Cai	d27473e7c5	LoongArch: Add testsuit for DESC and tls transition and tls relaxation.	3 years ago
mengqinggang	ae296cc452	LoongArch: Add support for TLS LD/GD/DESC relaxation The pcalau12i + addi.d of TLS LD/GD/DESC relax to pcaddi. Relaxation is only performed when the TLS model transition is not possible.	3 years ago
mengqinggang	c3d507aba3	LoongArch: Add support for the third expression of .align for R_LARCH_ALIGN If the symbol index is not zero, the addend is used to represent the first and the third expressions of the .align. The lowest 8 bits are used to represent the first expression. Other bits are used to represent the third expression. The addend of R_LARCH_ALIGN for ".align 5, ,4" is 0x405. The addend of R_LARCH_ALIGN for ".balign 32, ,4" is 0x405.	3 years ago
Torbjörn SVENSSON	8ea1e363b9	ld: Print 0 size in B and not in GB When using --print-memory-usage, the printed size can be zero and in that case, the unit should be B and not GB. ld/ * ldlang.c (lang_print_memory_size) Print 0 B instead of 0 GB. * testsuite/ld-scripts/print-memory-usage-1.l: Validate emplty region. * testsuite/ld-scripts/print-memory-usage-1.t: Define empty region. Signed-off-by: Torbjörn SVENSSON <torbjorn.svensson@foss.st.com>	3 years ago
mengqinggang	784d5a936a	LoongArch: Add call36 and tail36 pseudo instructions for medium code model For tail36, it is necessary to explicitly indicate the temporary register. Therefore, the compiler and users will know that the tail will use a register. call36 func pcalau18i $ra, %call36(func) jirl $ra, $ra, 0; tail36 $t0, func pcalau18i $t0, %call36(func) jirl $zero, $t0, 0;	3 years ago
mengqinggang	dc5f359ed6	LoongArch: Add new relocation R_LARCH_CALL36 R_LARCH_CALL36 is used for medium code model function call pcaddu18i+jirl, and these two instructions must adjacent. The LoongArch ABI v2.20 at here: https://github.com/loongson/la-abi-specs.	3 years ago
H.J. Lu	63fc64a8d0	Update Make const_1_mode print $1 in AT&T syntax commit `b70a487d59` Author: Cui, Lili <lili.cui@intel.com> Date: Wed Dec 13 06:07:36 2023 +0000 Make const_1_mode print $1 in AT&T syntax changes disassembler output from d1 f8 sar %eax to d1 f8 sar $1,%eax Adjust pe-x86-64-6.od accordingly. * testsuite/ld-x86-64/pe-x86-64-6.od: Adjusted.	3 years ago
Alan Modra	7fcc471ca2	R_MICROMIPS_GPREL7_S2 This reloc is meant for the 16-bit LWGP instruction, 0x6400/0xfc00 match/mask encoding in `micromips_opcodes'. It is correctly specified to operate on a half-word by the howtos in elf32-mips.c, elfn32-mips.c and elf64-mips.c, but is incorrectly subject to shuffle/unshuffle in code like _bfd_mips_elf32_gprel16_reloc. Current behaviour when applying the reloc to .byte 0x11,0x22,0x33,0x44 is to apply the reloc to byte 0x22 when big-endian, and to byte 0x33 when little-endian. Big-endian behaviour is unchanged after this patch and little-endian correctly applies the reloc to byte 0x11. The patch also corrects REL addend extraction from section contents, and overflow checking. gold had all of the bfd problems with this reloc and additionally did not apply the rightshift by two. bfd/ * elfxx-mips.c (micromips_reloc_shuffle_p): Return false for R_MICROMIPS_GPREL7_S2. (mips_elf_calculate_relocation): Correct sign extension and overflow calculation for R_MICROMIPS_GPREL7_S2. (_bfd_mips_elf_relocate_section): Update small-data overflow message. gold/ * mips.cc (Mips_relocate_functions::should_shuffle_micromips_reloc): Return false for R_MICROMIPS_GPREL7_S2. (Mips_relocate_functions::mips_reloc_unshuffle): Update comment. (Mips_relocate_functions::relgprel): Remove R_MICROMIPS_GPREL7_S2 handling. (Mips_relocate_functions::relgprel7): New function. (Target_mips::Relocate::relocate): Adjust to suit. ld/ * testsuite/ld-mips-elf/reloc-4.d: Adjust expected error. * testsuite/ld-mips-elf/reloc-5.d: Likewise.	3 years ago
Alan Modra	21a2a3d567	aarch64-elf: FAIL: indirect call stub to BTI stub relaxation aarch64-elf fails the ld-aarch64/bfd-far-3.d test, due to the stubs being emitted in a different order to that of aarch64-linux. They are emitted in a different order due to stub names for local symbols having the section id in the stub name. aarch64-linux-ld generates one more section than aarch64-elf-ld. That section is .gnu.hash. So the stub names differ and are hashed to different slots in stub_hash_table. Fix this by running the test with --hash-style=sysv, and adjust expected output. I've also changed the branch over stubs emitted at the start of a group of stubs to not care about the symbol, for all groups not just the one that needed changing. * ld-aarch64/bti-far-3.d: Add --hash-style=sysv. Adjust expected output.	3 years ago
H.J. Lu	260aa570ed	Fix ld/x86: reduce testsuite dependency on system object files commit `eab996435f` Author: Jan Beulich <jbeulich@suse.com> Date: Tue Nov 7 13:58:32 2023 +0100 ld/x86: reduce testsuite dependency on system object files changed some C compiler tests to assembler/linker tests which introduced 2 problems: 1. It broke x32 binutils tests since --64 was passed to assembler, but -m elf_x86_64 wasn't passed to linker. 2. -nostdlib was passed to C compiler driver to exclude standard run-time files which should be avoided with -r option for linker tests. Fix them by passing -m elf_x86_64 to linker and removing -nostdlib for linker tests with -r. PR ld/30722 * testsuite/ld-x86-64/x86-64.exp: Pass -m elf_x86_64 to linker for tests with --64. Remove -nostdlib for tests with -r.	3 years ago
mengqinggang	580a53dab4	LoongArch: Add more relaxation testcases 1. .so relaxation testcase 2. ld --no-relax testcase 3. segment alignment testcase	3 years ago
Nick Clifton	e922d1eaa3	Add ability to change linker warning messages into errors when reporting executable stacks and/or executable segments. include * bfdlink.h (struct bfd_link_info): Update descriptions of the 'execstack', 'noexecstack' and 'warn_execstack' fields. Add 'error_exectack' and 'warn_is_error_for_rwx_segments' fields. bfd * elf.c (assign_file_positions_except_relocs): Turn warnings about executable segments into errors if so requested. * elflink.c (bfd_elf_size_dynamic_sections): Turn warnings about executable stacks into errors if so requested. ld * ldlex.h (enum option_values): Add OPTION_ERROR_EXECSTACK, OPTION_NO_ERROR_EXECSTACK, OPTION_WARN_EXECSTACK_OBJECTS, OPTION_ERROR_RWX_SEGMENTS and OPTION_NO_ERROR_RWX_SEGMENTS. (struct ld_option): Add new long options. (parse_args): Parse new long options. (elf_static_list_options): Display the new options. * ld.texi: Document the new command line options. * configure.ac (error-execstack): New configuration option. (error-rwx-segments): New configuration option. * emultempl/elf.em (_before_parse): Initialse the new linkinfo fields. * NEWS: Mention the new features. * config.in: Regenerate. * configure: Regenerate. * testsuite/ld-elf/commonpage2.d: Disable errors for RWX segments and/or executable stacks. * testsuite/ld-elf/elf.exp: Likewise. * testsuite/ld-elf/header.d: Likewise. * testsuite/ld-elf/loadaddr1.d: Likewise. * testsuite/ld-elf/loadaddr2.d: Likewise. * testsuite/ld-elf/maxpage4.d: Likewise. * testsuite/ld-elf/nobits-1.d: Likewise. * testsuite/ld-elf/note-1.d: Likewise. * testsuite/ld-elf/orphan-10.d: Likewise. * testsuite/ld-elf/orphan-11.d: Likewise. * testsuite/ld-elf/orphan-12.d: Likewise. * testsuite/ld-elf/orphan-5.d: Likewise. * testsuite/ld-elf/orphan-7.d: Likewise. * testsuite/ld-elf/orphan-8.d: Likewise. * testsuite/ld-elf/orphan-9.d: Likewise. * testsuite/ld-elf/orphan-region.d: Likewise. * testsuite/ld-elf/orphan.d: Likewise. * testsuite/ld-elf/pr19539.d: Likewise. * testsuite/ld-elf/pr26256-1a.d: Likewise. * testsuite/ld-elf/pr26907.d: Likewise. * testsuite/ld-elf/pr28597.d: Likewise. * testsuite/ld-elf/retain2.d: Likewise. * testsuite/ld-elf/shared.exp: Likewise. * testsuite/ld-elf/size-1.d: Likewise. * testsuite/ld-elf/textaddr7.d: Likewise. * testsuite/ld-elf/warn1.d: Likewise. * testsuite/ld-elf/warn2.d: Likewise. * testsuite/ld-i386/discarded1.d: Likewise. * testsuite/ld-i386/pr19175.d: Likewise. * testsuite/ld-i386/pr19539.d: Likewise. * testsuite/ld-i386/pr23189.d: Likewise. * testsuite/ld-plugin/lto-3r.d: Likewise. * testsuite/ld-plugin/lto-5r.d: Likewise. * testsuite/ld-plugin/lto.exp: Likewise. * testsuite/ld-powerpc/ppc476-shared.d: Likewise. * testsuite/ld-powerpc/ppc476-shared2.d: Likewise. * testsuite/ld-powerpc/pr28827-2.d: Likewise. * testsuite/ld-s390/s390.exp: Likewise. * testsuite/ld-scripts/align2a.d: Likewise. * testsuite/ld-scripts/align2b.d: Likewise. * testsuite/ld-scripts/align5.d: Likewise. * testsuite/ld-scripts/alignof.exp: Likewise. * testsuite/ld-scripts/crossref.exp: Likewise. * testsuite/ld-scripts/defined2.d: Likewise. * testsuite/ld-scripts/defined3.d: Likewise. * testsuite/ld-scripts/defined5.d: Likewise. * testsuite/ld-scripts/pr14962.d: Likewise. * testsuite/ld-scripts/pr18963.d: Likewise. * testsuite/ld-scripts/pr20302.d: Likewise. * testsuite/ld-scripts/print-memory-usage.exp: Likewise. * testsuite/ld-scripts/rgn-at1.d: Likewise. * testsuite/ld-scripts/rgn-at10.d: Likewise. * testsuite/ld-scripts/rgn-at4.d: Likewise. * testsuite/ld-scripts/rgn-at6.d: Likewise. * testsuite/ld-scripts/rgn-at8.d: Likewise. * testsuite/ld-scripts/rgn-at9.d: Likewise. * testsuite/ld-scripts/rgn-over1.d: Likewise. * testsuite/ld-scripts/rgn-over2.d: Likewise. * testsuite/ld-scripts/rgn-over4.d: Likewise. * testsuite/ld-scripts/rgn-over5.d: Likewise. * testsuite/ld-scripts/rgn-over6.d: Likewise. * testsuite/ld-scripts/script.exp: Likewise. * testsuite/ld-scripts/sizeof.exp: Likewise. * testsuite/ld-scripts/sort-file.d: Likewise. * testsuite/ld-x86-64/discarded1.d: Likewise. * testsuite/ld-x86-64/pr19175.d: Likewise. * testsuite/ld-x86-64/pr19539a.d: Likewise. * testsuite/ld-x86-64/pr19539b.d: Likewise. * testsuite/ld-x86-64/pr23189.d: Likewise.	3 years ago
Szabolcs Nagy	7b0c124970	ld: aarch64: Use lp64 abi in recent BTI stub tests The tests are not compatible with ilp32 abi: the GNU property note is ABI dependent (size changes) and the disasm is ABI dependent too. Making the test portable between the ABIs is not trivial. For now force lp64 abi.	3 years ago
Szabolcs Nagy	b418c9d49e	ld: aarch64: Add BTI stub insertion test PR30930 The test creates a large shared library and covers a number of BTI stub insertion cases.	3 years ago
Jan Beulich	eab996435f	ld/x86: reduce testsuite dependency on system object files PR ld/30722 Tests looking for certain .note-section recorded properties may not involve object files from the underlying platform (e.g. via using the C compiler for linking): Such object files may themselves have similar note sections, and hence they may influence the overall outcome. For now convert just the tests known to be affected by crt*.o coming with "ISA v3 needed" notes. Eventually other tests ought to be converted, too.	3 years ago
Jan Beulich	50df0f438e	Revert "ld x86_64 tests: Accept x86-64-v3 as a needed ISA" This reverts commit `bf77f42f67`. It wrongly altered testcase expectations; the issue will need taking care of differently.	3 years ago
Nick Clifton	f1837d9c3f	ld: =fillexp different behaviors for hexidecimal literal PR 30865 * ld.texi: Update description of the FILL command. * testsuite/ld-scripts/fill2.d: New test. * testsuite/ld-scripts/fill2.t: New test source. * testsuite/ld-scripts/data.exp: Run the new test.	3 years ago

1 2 3 4 5 ...

3978 Commits (159afbb7617d2c8a9cd3f3350374711f37f60442)