binutils-gdb

Commit Graph

Author	SHA1	Message	Date
Ulrich Weigand	759cc328c6	gdb/ChangeLog: * auxv.c (fprint_target_auxv): Handle AT_BASE_PLATFORM and AT_EXECFN. Re-sort AT_SECURE. include/elf/ChangeLog: * common.h (AT_BASE_PLATFORM, AT_EXECFN): Define.	18 years ago
Chao-ying Fu	de9a3e5195	2008-11-06 Chao-ying Fu <fu@mips.com> * mips.h: Doucument '1' for 5-bit sync type.	18 years ago
Alan Modra	75ded2dbe4	* obstack.h (obstack_finish <!__GNUC__>): Cast result to void *.	18 years ago
Nathan Froyd	f82e0623e1	include/elf/ * ppc.h: Add Tag_GNU_Power_ABI_Struct_Return. bfd/ * elf32-ppc.c (ppc_elf_merge_obj_attributes): Merge Tag_GNU_Power_ABI_Struct_Return. binutils/ * readelf.c (display_power_gnu_attribute): Decode Tag_GNU_Power_ABI_Struct_Return. ld/testsuite/ * ld-powerpc/gnu-attr-12-1.s: New file. * ld-powerpc/gnu-attr-12-2.s: New file. * ld-powerpc/gnu-attr-12-11.d: New file. * ld-powerpc/gnu-attr-12-21.d: New file. * ld-powerpc/powerpc.exp: Run new dump tests.	18 years ago
DJ Delorie	1c08f2c880	merge from gcc	18 years ago
Hans-Peter Nilsson	1d03769272	* cris.h (R_CRIS_32_GOT_GD, R_CRIS_16_GOT_GD, R_CRIS_32_GD) (R_CRIS_DTP, R_CRIS_32_DTPREL, R_CRIS_16_DTPREL, R_CRIS_DTPMOD) (R_CRIS_32_GOT_TPREL, R_CRIS_16_GOT_TPREL, R_CRIS_32_TPREL) (R_CRIS_16_TPREL): New relocations.	18 years ago
Richard Henderson	f1c4cc7516	include/ * elf/dwarf2.h (DW_OP_GNU_encoded_addr): New. binutils/ * dwarf.c (size_of_encoded_value, get_encoded_value): Move up. (decode_location_expression): Add section parameter. Handle DW_OP_GNU_encoded_addr. (read_and_display_attr_value): Update decode_location_expression call. (display_debug_loc, display_debug_frames): Likewise. gas/ * dw2gencfi.c (DWARF2_ADDR_SIZE): Provide default. (struct cfi_insn_data): Add ea member. (CFI_val_encoded_addr, dot_cfi_val_encoded_addr): New. (output_cfi_insn): Handle CFI_val_encoded_addr. (select_cie_for_fde): Don't match CFI_val_encoded_addr. * doc/as.texinfo (.cfi_val_encoded_addr): Document.	18 years ago
Ian Lance Taylor	bbb444b67a	* plugin-api.h (ld_plugin_status): Remove comma from the last item. Use C style comment. (ld_plugin_api_version, ld_plugin_output_file_type, ld_plugin_symbol_kind, ld_plugin_symbol_visibility, ld_plugin_symbol_resolution, ld_plugin_level, ld_plugin_tag): Remove comma from the last item.	18 years ago
Cary Coutant	89fc34211b	Add plugin functionality for link-time optimization (LTO). include/: * plugin-api.h: New file. gold/: * configure.ac (plugins): Add --enable-plugins option. * configure: Regenerate. * config.in: Regenerate. * Makefile.am (LIBDL): New variable. (CCFILES): Add plugin.cc. (HFILES): Add plugin.h. (ldadd_var): Add LIBDL. * Makefile.in: Regenerate. * archive.cc: Include "plugin.h". (Archive::setup): Don't preread archive symbols when using a plugin. (Archive::get_file_and_offset): Add memsize parameter. Change callers. (Archive::get_elf_object_for_member): Call plugin hooks for claiming files. (Archive::include_member): Add symbols from plugin objects. * archive.h (Archive::get_file_and_offset): Add memsize parameter. * descriptors.cc (Descriptors::open): Check for file descriptors abandoned by plugins. (Descriptors::claim_for_plugin): New function. * descriptors.h (Descriptors::claim_for_plugin): New function. (Open_descriptor::is_claimed): New field. (claim_descriptor_for_plugin): New function. * fileread.cc (File_read::claim_for_plugin): New function. * fileread.h (File_read::claim_for_plugin): New function. (File_read::descriptor): New function. * gold.cc: Include "plugin.h". (queue_initial_tasks): Add task to call plugin hooks for generating new object files. * main.cc: Include "plugin.h". (main): Load plugin libraries. * object.h (Pluginobj): Declare. (Object::pluginobj): New function. (Object::do_pluginobj): New function. (Object::set_target): New function. * options.cc: Include "plugin.h". (General_options::parse_plugin): New function. (General_options::General_options): Initialize plugins_ field. (General_options::add_plugin): New function. * options.h (Plugin_manager): Declare. (General_options): Add --plugin option. (General_options::has_plugins): New function. (General_options::plugins): New function. (General_options::add_plugin): New function. (General_options::plugins_): New field. * plugin.cc: New file. * plugin.h: New file. * readsyms.cc: Include "plugin.h". (Read_symbols::do_read_symbols): Check for archive before checking for ELF file. Call plugin hooks to claim files. * resolve.cc (Symbol_table::resolve): Record when symbol is referenced from a real object file; force override when processing replacement files. * symtab.cc (Symbol::init_fields): Initialize in_real_elf_ field. (Symbol::init_base_object): Likewise. (Symbol::init_base_output_data): Likewise. (Symbol::init_base_output_segment): Likewise. (Symbol::init_base_constant): Likewise. (Symbol::init_base_undefined): Likewise. (Symbol::output_section): Assert that object is not a plugin. (Symbol_table::add_from_pluginobj): New function. (Symbol_table::sized_finalize_symbol): Treat symbols from plugins as undefined. (Symbol_table::sized_write_globals): Likewise. (Symbol_table::add_from_pluginobj): Instantiate template. * symtab.h (Sized_pluginobj): Declare. (Symbol::in_real_elf): New function. (Symbol::set_in_real_elf): New function. (Symbol::in_real_elf_): New field. (Symbol_table::add_from_pluginobj): New function. * testsuite/Makefile.am (AM_CFLAGS): New variable. (LIBDL): New variable. (LDADD): Add LIBDL. (check_PROGRAMS): Add plugin_test_1 and plugin_test_2. (check_SCRIPTS): Add plugin_test_1.sh and plugin_test_2.sh. (check_DATA): Add plugin_test_1.err and plugin_test_2.err. (MOSTLYCLEANFILES): Likewise. * testsuite/Makefile.in: Regenerate. * testsuite/plugin_test.c: New file. * testsuite/plugin_test_1.sh: New file. * testsuite/plugin_test_2.sh: New file.	18 years ago
DJ Delorie	ba8cb4bac5	merge from gcc	18 years ago
Tristan Gingold	af11f592a8	2008-08-28 Tristan Gingold <gingold@adacore.com> * stab.def: Add BNSYM, ENSYM, OSO for darwin.	18 years ago
H.J. Lu	1ca35711f4	gas/ 2008-08-28 H.J. Lu <hongjiu.lu@intel.com> * config/tc-ia64.c (CR_IIB0): New. (CR_IIB1): Likewise. (cr): Add cr.iib0 and cr.iib1. (specify_resource): Handle IA64_RS_CR_IIB and CR_IIB0/CR_IIB1. gas/testsuite/ 2008-08-28 H.J. Lu <hongjiu.lu@intel.com> * gas/ia64/dv-raw-err.s: Add tests for cr.iib0 and cr.iib1. * gas/ia64/dv-waw-err.s: Likewise. * gas/ia64/regs.s: Likewise. * gas/ia64/dv-raw-err.l: Updated. * gas/ia64/dv-waw-err.l: Likewise. * gas/ia64/regs.d: Likewise. include/opcode/ 2008-08-28 H.J. Lu <hongjiu.lu@intel.com> * ia64.h (ia64_resource_specifier): Add IA64_RS_CR_IIB. Update IA64_RS_CR. opcodes/ 2008-08-28 H.J. Lu <hongjiu.lu@intel.com> * ia64-dis.c (print_insn_ia64): Handle cr.iib0 and cr.iib1. * ia64-gen.c (lookup_specifier): Likewise. * ia64-ic.tbl: Add support for cr.iib0 and cr.iib1. * ia64-raw.tbl: Likewise. * ia64-waw.tbl: Likewise. * ia64-asmtab.c: Regenerated.	18 years ago
Alan Modra	67efbf453f	* binary-io.h: New file, imported from gnulib, but don't #include <fcntl.h> or <stdio.h>.	18 years ago
Bob Wilson	28dbbc0203	2008-08-20 Bob Wilson <bob.wilson@acm.org> bfd/ * elf-bfd.h (elf_object_id): Add XTENSA_ELF_TDATA. * elf32-xtensa.c (elf_howto_table): Add TLS relocations. (elf_xtensa_reloc_type_lookup): Likewise. (TCB_SIZE): Define. (elf_xtensa_link_hash_entry): New. (GOT_UNKNOWN, GOT_NORMAL, GOT_TLS_GD, GOT_TLS_IE, GOT_TLS_ANY): Define. (elf_xtensa_hash_entry): Define. (elf_xtensa_obj_tdata): New. (elf_xtensa_tdata): Define. (elf_xtensa_local_got_tls_type): Define. (elf_xtensa_local_tlsfunc_refcounts): Define. (is_xtensa_elf): Define. (elf_xtensa_mkobject): New. (elf_xtensa_link_hash_table): Add tlsbase field. (elf_xtensa_link_hash_newfunc): New. (elf_xtensa_link_hash_table_create): Use elf_xtensa_link_hash_newfunc. Create an entry for "_TLS_MODULE_BASE_" and save it in tlsbase field. (elf_xtensa_copy_indirect_symbol): New. (elf_xtensa_check_relocs): Rewrite to handle TLS relocations. (elf_xtensa_gc_sweep_hook): Likewise. (elf_xtensa_allocate_dynrelocs): Optimize away GOT entries for TLSDESC_FN relocations when an IE reference is seen. (elf_xtensa_allocate_local_got_size): Likewise. (elf_xtensa_always_size_sections): New. (dtpoff_base, tpoff): New. (elf_xtensa_do_reloc): Handle TLS relocations. (replace_tls_insn): New. (IS_XTENSA_TLS_RELOC): Define. (elf_xtensa_relocate_section): Handle TLS relocations. (get_indirect_call_dest_reg): New. (bfd_elf32_mkobject): Define. (elf_backend_always_size_sections): New. (elf_backend_copy_indirect_symbol): New. * reloc.c (BFD_RELOC_XTENSA_TLSDESC_FN, BFD_RELOC_XTENSA_TLSDESC_ARG) (BFD_RELOC_XTENSA_TLS_DTPOFF, BFD_RELOC_XTENSA_TLS_TPOFF) (BFD_RELOC_XTENSA_TLS_FUNC, BFD_RELOC_XTENSA_TLS_ARG) (BFD_RELOC_XTENSA_TLS_CALL): New. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. gas/ * config/tc-xtensa.c (O_tlsfunc, O_tlsarg, O_tlscall): Define. (O_tpoff, O_dtpoff): Define. (suffix_relocs): Add entries for TLS suffixes. (xtensa_elf_cons): Check for invalid use of TLS relocations. (map_operator_to_reloc): Add is_literal parameter and use it to control translating TLS instruction relocations to the corresponding literal relocations. (xg_valid_literal_expression): Allow TLS operators. (xg_build_to_insn): Copy TLS operators from pseudo-instruction operands to generated literals. (xg_assemble_literal): Handle TLS operators. Update call to map_operator_to_reloc. (md_assemble): Handle CALLXn.TLS pseudo-instruction. (md_apply_fix): Handle TLS relocations. (emit_single_op): Handle TLS operators. (convert_frag_immed): Update call to map_operator_to_reloc. (vinsn_to_insnbuf): Emit relocations for TLS-related instructions. * config/xtensa-istack.h (tinsn_struct): Add tls_reloc field. * config/xtensa-relax.c (append_literal_op): Add src_op parameter to initialize the op_data field of the BuildOp. (build_transition): Use it here to record the source operand corresponding to a generated literal. * config/xtensa-relax.h (build_op): Comment op_data use for literals. include/elf/ * xtensa.h (R_XTENSA_TLSDESC_FN, R_XTENSA_TLSDESC_ARG) (R_XTENSA_TLS_DTPOFF, R_XTENSA_TLS_TPOFF, R_XTENSA_TLS_FUNC) (R_XTENSA_TLS_ARG, R_XTENSA_TLS_CALL): New. ld/testsuite/ * ld-xtensa/tlsbin.dd, ld-xtensa/tlsbin.rd, ld-xtensa/tlsbin.s, ld-xtensa/tlsbin.sd, ld-xtensa/tlsbin.td, ld-xtensa/tlslib.s, ld-xtensa/tlspic.dd, ld-xtensa/tlspic.rd, ld-xtensa/tlspic.sd, ld-xtensa/tlspic.td, ld-xtensa/tlspic1.s, ld-xtensa/tlspic2.s: New. * ld-xtensa/xtensa.exp: Run them.	18 years ago
Alan Modra	5c1d2f5f4c	bfd/ * bfd.c (struct _bfd): Correct outsymbols comment. * bfd-in2.h: Regenerate. * linker.c (bfd_generic_link_read_symbols): Renamed from.. (generic_link_read_symbols): ..this, and made global. include/ * bfdlink.h (bfd_generic_link_read_symbols): Declare. ld/ PR 6478 * ldcref.c (check_local_sym_xref): Use bfd_generic_link_read_symbols. Don't free symbol pointer array. (check_refs): Likewise. * ldmain.c (warning_callback): Likewise. * ldmisc.c (vfinfo): Likewise. * pe-dll.c (process_def_file): Likewise. (pe_walk_relocs_of_symbol, generate_reloc): Likewise. * emultempl/pe.em (pe_find_data_imports): Likewise. (gld_${EMULATION_NAME}_after_open): Likewise. * emultempl/pep.em (pep_find_data_imports): Likewise. (gld_${EMULATION_NAME}_after_open): Likewise. * ldlang.h (lang_input_statement_type): Delete asymbols, symbol_count, passive_position, closed. * ldlang.c (new_afile): Don't set asymbols and symbol_count. * ldmain.c (add_archive_element): xcalloc lang_input_statement_type.	18 years ago
Eric B. Weddington	7b21ac3f45	Add AVR architectures avr25, avr31, avr35, and avr51 to match GCC. bfd/ * archures.c (bfd_mach_avr25, bfd_mach_avr31, bfd_mach_avr35, bfd_mach_avr51): New. * bfd-in2.h: Regenerate. * cpu-avr.c (arch_info_struct): Add avr25, avr31, avr35, and avr51 architectures. Change comments to match architecture comments in GCC. (compatible): Add test for new AVR architectures. * elf32-avr.c (bfd_elf_avr_final_write_processing): Recognize bfd_mach_avr25, bfd_mach_avr31, bfd_mach_avr35 and bfd_mach_avr51. (elf32_avr_object_p): Recognize E_AVR_MACH_AVR25, E_AVR_MACH_AVR31, E_AVR_MACH_AVR35 and E_AVR_MACH_AVR51. gas/ * config/tc-avr.c (mcu_types): Add avr25, avr31, avr35, and avr51 architectures. Reorganize list to put mcu types in correct architectures and to order list same as in GCC. Use new ISA definitions in include/opcode/avr.h. * doc/c-avr.texi: Add avr25, avr31, avr35, and avr51 architecture descriptions. Reorganize descriptions to put mcu types in correct architectures and to order lists same as in GCC. include/ * elf/avr.h (E_AVR_MACH_AVR25, E_AVR_MACH_AVR31, E_AVR_MACH_AVR35, E_AVR_MACH_AVR51): Define. (EF_AVR_MACH): Redefine to 0x7F. * opcode/avr.h (AVR_ISA_TINY3, AVR_ISA_ALL, AVR_ISA_USB162): Remove. (AVR_ISA_AVR3): Redefine. (AVR_ISA_AVR1, AVR_ISA_AVR2, AVR_ISA_AVR31, AVR_ISA_AVR35, AVR_ISA_AVR3_ALL, AVR_ISA_AVR4, AVR_ISA_AVR5, AVR_ISA_AVR51, AVR_ISA_AVR6): Define. ld/ * Makefile.am (ALL_EMULATIONS): Add eavr25.o, eavr31.o, eavr35.o, and eavr51.o. Add rules for eavr25.c, eavr31.c, eavr35.c, eavr51.c. * Makefile.in: Regenerate. * configure.tgt (avr--, targ_extra_emuls): Add avr25, avr31, avr35 and avr51. * emulparams/avr25.sh: New file. * emulparams/avr31.sh: New file. * emulparams/avr35.sh: New file. * emulparams/avr51.sh: New file.	18 years ago
Daniel Jacobowitz	861fb55ab5	2008-08-08 Richard Sandiford <rdsandiford@googlemail.com> Daniel Jacobowitz <dan@codesourcery.com> Catherine Moore <clm@codesourcery.com> Mark Shinwell <shinwell@codesourcery.com> Maxim Kuvyrkov <maxim@codesourcery.com> * elf32-mips.c (mips_vxworks_copy_howto_rela): Replace with... (elf_mips_copy_howto): ...this howto. Clear the size fields. (mips_vxworks_jump_slot_howto_rela): Replace with... (elf_mips_jump_slot_howto): ...this howto. (bfd_elf32_bfd_reloc_type_lookup): Handle BFD_RELOC_MIPS_COPY and BFD_RELOC_MIPS_JUMP_SLOT. (bfd_elf32_bfd_reloc_name_lookup): Handle "R_MIPS_COPY" and "R_MIPS_JUMP_SLOT". (mips_elf32_rtype_to_howto): Handle R_MIPS_COPY and R_MIPS_JUMP_SLOT. (elf_backend_plt_readonly): Define. (elf_backend_plt_sym_val): Define for non-VxWorks targets. (mips_vxworks_bfd_reloc_type_lookup): Delete. (mips_vxworks_bfd_reloc_name_lookup): Likewise. (mips_vxworks_rtype_to_howto): Likewise. (elf_backend_want_dynbss): Don't define for VxWorks. (elf_backend_plt_readonly): Likewise. (bfd_elf32_bfd_reloc_type_lookup): Likewise. (bfd_elf32_bfd_reloc_name_lookup): Likewise. (elf_backend_mips_rtype_to_howto): Likewise. (elf_backend_adjust_dynamic_symbol): Likewise. (elf_backend_got_symbol_offset): Don't define. * elfn32-mips.c (elf_mips_copy_howto, elf_mips_jump_slot_howto): New. (bfd_elf32_bfd_reloc_type_lookup): Handle BFD_RELOC_MIPS_COPY and BFD_RELOC_MIPS_JUMP_SLOT. (bfd_elf32_bfd_reloc_name_lookup): Handle "R_MIPS_COPY" and "R_MIPS_JUMP_SLOT". (mips_elf32_n32_rtype_to_howto): Handle R_MIPS_COPY and R_MIPS_JUMP_SLOT. (elf_backend_rela_plts_and_copies_p, elf_backend_plt_readonly) (elf_backend_plt_sym_val): Define. * elf64-mips.c (elf_mips_copy_howto, elf_mips_jump_slot_howto): New. (bfd_elf64_bfd_reloc_type_lookup): Handle BFD_RELOC_MIPS_COPY and BFD_RELOC_MIPS_JUMP_SLOT. (bfd_elf64_bfd_reloc_name_lookup): Handle "R_MIPS_COPY" and "R_MIPS_JUMP_SLOT". (mips_elf64_rtype_to_howto): Handle R_MIPS_COPY and R_MIPS_JUMP_SLOT. (elf_backend_rela_plts_and_copies_p, elf_backend_plt_readonly) (elf_backend_plt_sym_val): Define. * elfxx-mips.h (_bfd_mips_vxworks_adjust_dynamic_symbol): Delete. (_bfd_mips_elf_use_plts_and_copy_relocs, _bfd_mips_elf_init_stubs) (_bfd_mips_elf_plt_sym_val, _bfd_mips_post_process_headers): Declare. * elfxx-mips.c (mips_elf_la25_stub): New structure. (LA25_LUI, LA25_J, LA25_ADDIU): New macros. (mips_elf_link_hash_entry): Add "la25_stubs", "has_static_relocs" and "has_nonpic_branches" fields. Remove "is_relocation_target" and "is_branch_target". (mips_elf_link_hash_table): Add blank lines. Add "use_plts_and_copy_relocs", "reserved_gotno", "strampoline", "la25_stubs" and "add_stub_section" fields. (mips_htab_traverse_info): New structure. (PIC_OBJECT_P, MIPS_ELF_LOAD_WORD): New macros. (MIPS_RESERVED_GOTNO): Delete. (mips_o32_exec_plt0_entry, mips_n32_exec_plt0_entry) (mips_n64_exec_plt0_entry, mips_exec_plt_entry): New tables. (mips_elf_link_hash_newfunc): Update after the changes to mips_elf_link_hash_entry. (mips_elf_check_mips16_stubs): Replace the DATA parameter with an INFO parameter. Don't look through warnings symbols here; do it in mips_elf_check_symbols instead. (mips_elf_create_stub_symbol): New function. (mips_elf_la25_stub_hash, mips_elf_la25_stub_eq): New functions. (_bfd_mips_elf_init_stubs, mips_elf_local_pic_function_p): Likewise. (mips_elf_add_la25_intro, mips_elf_add_la25_trampoline): Likewise. (mips_elf_add_la25_stub, mips_elf_check_symbols): New functions. (mips_elf_gotplt_index): Check for VxWorks. (mips_elf_output_dynamic_relocation): Take the relocation index as an extra parameter. Do not increment reloc_count here. (mips_elf_initialize_tls_slots): Update the calls to mips_elf_output_dynamic_relocation accordingly. (mips_elf_multi_got): Use htab->reserved_gotno instead of MIPS_RESERVED_GOTNO. (mips_elf_create_got_section): Don't allocate reserved GOT entries here. Unconditionally create .got.plt, but don't set its alignment here. (mips_elf_relocation_needs_la25_stub): New function. (mips_elf_calculate_relocation): Redirect branches and jumps to a non-PIC stub if one exists. Check !h->has_static_relocs instead of !htab->is_vxworks when deciding whether to create dynamic relocations for R_MIPS_32, R_MIPS_REL32 and R_MIPS_64. (_bfd_mips_elf_create_dynamic_sections): Unconditionally call _bfd_elf_create_dynamic_sections. Unconditionally set up htab->splt and htab->sdynbss. Set htab->srelplt to ".rel.plt" if !htab->is_vxworks. Add non-VxWorks values of htab->plt_header_size and htab->plt_entry_size. (_bfd_mips_elf_check_relocs): Set pointer_equality_needed for non-branch static relocations. Set has_nonpic_branches when an la25 stub might be required. Set can_make_dynamic_p to TRUE if R_MIPS_32, R_MIPS_REL32 and R_MIPS_64 relocations can be made dynamic, rather than duplicating the condition. Do not make them dynamic for read-only sections in non-PIC executable objects. Do not protect this code with dynobj == NULL \|\| htab->sgot == NULL; handle each group of cases separately. Add a default case that sets has_static_relocs for non-GOT relocations that cannot be made dynamic. Don't set is_relocation_target and is_branch_target. Reject non-PIC static relocations in shared objects. (_bfd_mips_vxworks_adjust_dynamic_symbol): Fold into... (_bfd_mips_elf_adjust_dynamic_symbol): ...here, using htab->use_plts_and_copy_relocs instead of htab->is_vxworks to select PLT and copy-reloc handling. Set the alignment of .plt and .got.plt when allocating the first entry. Generalize code to handle REL as well as RELA sections and 64-bit as well as 32-bit GOT entries. Complain if we find a static-only reloc against an externally-defined symbol and if we cannot create dynamic relocations for it. Allocate copy relocs using mips_elf_allocate_dynamic_relocations on non-VxWorks targets. Set possibly_dynamic_relocs to 0 when using PLTs or copy relocs. Skip reserved .got.plt entries. (_bfd_mips_elf_always_size_sections): Use mips_elf_check_symbols instead of mips_elf_check_mips16_stubs to process each symbol. Do the traversal for relocatable objects too. (mips_elf_lay_out_got): Use htab->reserved_gotno instead of MIPS_RESERVED_GOTNO. (_bfd_mips_elf_size_dynamic_sections): Exclude sdynbss if it is empty. Extend the DT_PLTREL, DT_JMPREL and DT_PLTRELSZ handling to non-VxWorks targets. Only add DT_REL{,A}, DT_REL{,A}SZ and DT_REL{,A}ENT if .rel.dyn is nonempty. Create a symbol for the PLT. Allocate a nop at the end of the PLT. Allocate DT_MIPS_PLTGOT. (mips_elf_create_la25_stub_info): New function. (_bfd_mips_elf_finish_dynamic_symbol): Write out PLT entries and copy relocs where necessary. Check pointer_equality_needed. (mips_finish_exec_plt): New function. (_bfd_mips_elf_finish_dynamic_sections): Always set DT_PLTGOT to the beginning of htab->sgot. Use htab->reserved_gotno instead of MIPS_RESERVED_GOTNO. Assert htab->use_plts_and_copy_relocs instead of htab->is_vxworks for DT_PLTREL, DT_PLTRELSZ and DT_JMPREL. Set DT_PLTREL to DT_REL instead of DT_RELA on non-VxWorks targets. Use mips_finish_exec_plt to create non-VxWorks PLT headers. Set DT_MIPS_PLTGOT. (_bfd_mips_elf_copy_indirect_symbol): Copy has_static_relocs from the indirect symbol to the direct symbol. Also copy has_nonpic_branches for indirect symbols. (_bfd_mips_elf_get_target_dtag): Handle DT_MIPS_PLTGOT and DT_MIPS_RWPLT. (_bfd_mips_elf_link_hash_table_create): Initialize the new mips_elf_link_hash_table fields. (_bfd_mips_vxworks_link_hash_table_create): Set use_plts_and_copy_relocs to TRUE. Use TRUE rather than 1 when setting is_vxworks. (_bfd_mips_elf_use_plts_and_copy_relocs): New function. (_bfd_mips_elf_final_link): Call mips_elf_create_la25_stub for each la25_stub. (_bfd_mips_elf_merge_private_bfd_data): Treat dynamic objects as PIC. Generalize message about linking PIC and non-PIC. (_bfd_mips_elf_plt_sym_val, _bfd_mips_post_process_headers): New functions. * reloc.c: Update comment near BFD_RELOC_MIPS_JUMP_SLOT. * bfd-in2.h: Regenerated. 2008-08-08 Richard Sandiford <rdsandiford@googlemail.com> Daniel Jacobowitz <dan@codesourcery.com> Catherine Moore <clm@codesourcery.com> Mark Shinwell <shinwell@codesourcery.com> * readelf.c (get_mips_symbol_other): Handle STO_MIPS_PLT and STO_MIPS_PIC. (slurp_rela_relocs, slurp_rel_relocs): Handle MIPS ELF64 here. (dump_relocations, debug_apply_relocations): Don't handle it here. (get_mips_dynamic_type): Handle DT_MIPS_PLTGOT and DT_MIPS_RWPLT. (print_mips_pltgot_entry): New function. (process_mips_specific): Dump the PLT GOT. 2008-08-08 Richard Sandiford <rdsandiford@googlemail.com> Daniel Jacobowitz <dan@codesourcery.com> * config/tc-mips.c (OPTION_CALL_NONPIC): New macro. (OPTION_NON_SHARED, OPTION_XGOT, OPTION_MABI, OPTION_32) (OPTION_N32, OPTION_64, OPTION_MDEBUG, OPTION_NO_MDEBUG) (OPTION_PDR, OPTION_NO_PDR, OPTION_MVXWORKS_PIC): Bump by 1. (md_longopts): Add -call_nonpic. (md_parse_option): Handle OPTION_CALL_NONPIC. (md_show_usage): Add -call_nonpic. 2008-08-08 Richard Sandiford <rdsandiford@googlemail.com> * gas/mips/call-nonpic-1.s, gas/mips/call-nonpic-1.d: New test. * gas/mips/mips.exp: Run it. 2008-08-08 Richard Sandiford <rdsandiford@googlemail.com> Daniel Jacobowitz <dan@codesourcery.com> Catherine Moore <clm@codesourcery.com> Mark Shinwell <shinwell@codesourcery.com> * mips.h (STO_MIPS_PLT, ELF_ST_IS_MIPS_PLT, ELF_ST_SET_MIPS_PLT) (STO_MIPS_PIC, DT_MIPS_PLTGOT, DT_MIPS_RWPLT): New macros. 2008-08-08 Richard Sandiford <rdsandiford@googlemail.com> Daniel Jacobowitz <dan@codesourcery.com> * emulparams/elf32bmip.sh (GOT): Define, moving .got.plt to... (OTHER_RELRO_SECTIONS, OTHER_READWRITE_SECTIONS): ...one of these two variables. * emulparams/elf32bmipn32-defs.sh: Likewise. * emultempl/mipself.em: Include ldctor.h, elf/mips.h and elfxx-mips.h. (is_mips_elf): New macro. (stub_file, stub_bfd): New variables. (hook_stub_info): New structure. (hook_in_stub): New function. (mips_add_stub_section): Likewise. (mips_create_output_section_statements): Likewise. (mips_before_allocation): Likewise. (real_func): New variable. (mips_for_each_input_file_wrapper): New function. (mips_lang_for_each_input_file): Likewise. (lang_for_each_input_file): Define. (LDEMUL_BEFORE_ALLOCATION): Likewise. (LDEMUL_CREATE_OUTPUT_SECTION_STATEMENTS): Likewise. 2008-08-08 Richard Sandiford <rdsandiford@googlemail.com> Daniel Jacobowitz <dan@codesourcery.com> * ld-mips-elf/mips16-pic-3a.s, ld-mips-elf/mips16-pic-3b.s, ld-mips-elf/mips16-pic-3.dd, ld-mips-elf/mips16-pic-3.gd, ld-mips-elf/mips16-pic-3.rd, ld-mips-elf/mips16-pic-3.inc, ld-mips-elf/pic-and-nonpic-1a.s, ld-mips-elf/pic-and-nonpic-1b.s, ld-mips-elf/pic-and-nonpic-1.ld, ld-mips-elf/pic-and-nonpic-1.dd, ld-mips-elf/pic-and-nonpic-1.nd, ld-mips-elf/pic-and-nonpic-1-rel.dd, ld-mips-elf/pic-and-nonpic-1-rel.nd, ld-mips-elf/pic-and-nonpic-2a.s, ld-mips-elf/pic-and-nonpic-2b.s, ld-mips-elf/pic-and-nonpic-2.d, ld-mips-elf/pic-and-nonpic-3a.s, ld-mips-elf/pic-and-nonpic-3a.ld, ld-mips-elf/pic-and-nonpic-3a.dd, ld-mips-elf/pic-and-nonpic-3a.gd, ld-mips-elf/pic-and-nonpic-3a.sd, ld-mips-elf/pic-and-nonpic-3b.s, ld-mips-elf/pic-and-nonpic-3b.ld, ld-mips-elf/pic-and-nonpic-3b.ad, ld-mips-elf/pic-and-nonpic-3b.dd, ld-mips-elf/pic-and-nonpic-3b.gd, ld-mips-elf/pic-and-nonpic-3b.nd, ld-mips-elf/pic-and-nonpic-3b.pd, ld-mips-elf/pic-and-nonpic-3b.rd, ld-mips-elf/pic-and-nonpic-3b.sd, ld-mips-elf/pic-and-nonpic-3-error.d, ld-mips-elf/pic-and-nonpic-4a.s, ld-mips-elf/pic-and-nonpic-4b.s, ld-mips-elf/pic-and-nonpic-4b.ld, ld-mips-elf/pic-and-nonpic-4b.ad, ld-mips-elf/pic-and-nonpic-4b.dd, ld-mips-elf/pic-and-nonpic-4b.gd, ld-mips-elf/pic-and-nonpic-4b.nd, ld-mips-elf/pic-and-nonpic-4b.rd, ld-mips-elf/pic-and-nonpic-4b.sd, ld-mips-elf/pic-and-nonpic-4-error.d, ld-mips-elf/pic-and-nonpic-5a.s, ld-mips-elf/pic-and-nonpic-5b.s, ld-mips-elf/pic-and-nonpic-5b.ld, ld-mips-elf/pic-and-nonpic-5b.ad, ld-mips-elf/pic-and-nonpic-5b.dd, ld-mips-elf/pic-and-nonpic-5b.gd, ld-mips-elf/pic-and-nonpic-5b.nd, ld-mips-elf/pic-and-nonpic-5b.rd, ld-mips-elf/pic-and-nonpic-5b.sd, ld-mips-elf/pic-and-nonpic-5b.pd, ld-mips-elf/pic-and-nonpic-6.ld, ld-mips-elf/pic-and-nonpic-6-o32a.s, ld-mips-elf/pic-and-nonpic-6-o32b.s, ld-mips-elf/pic-and-nonpic-6-o32c.s, ld-mips-elf/pic-and-nonpic-6-o32.ad, ld-mips-elf/pic-and-nonpic-6-o32.dd, ld-mips-elf/pic-and-nonpic-6-o32.gd, ld-mips-elf/pic-and-nonpic-6-o32.nd, ld-mips-elf/pic-and-nonpic-6-o32.pd, ld-mips-elf/pic-and-nonpic-6-o32.rd, ld-mips-elf/pic-and-nonpic-6-o32.sd, ld-mips-elf/pic-and-nonpic-6-n32a.s, ld-mips-elf/pic-and-nonpic-6-n32b.s, ld-mips-elf/pic-and-nonpic-6-n32c.s, ld-mips-elf/pic-and-nonpic-6-n32.ad, ld-mips-elf/pic-and-nonpic-6-n32.dd, ld-mips-elf/pic-and-nonpic-6-n32.gd, ld-mips-elf/pic-and-nonpic-6-n32.nd, ld-mips-elf/pic-and-nonpic-6-n32.pd, ld-mips-elf/pic-and-nonpic-6-n32.rd, ld-mips-elf/pic-and-nonpic-6-n32.sd, ld-mips-elf/pic-and-nonpic-6-n64a.s, ld-mips-elf/pic-and-nonpic-6-n64b.s, ld-mips-elf/pic-and-nonpic-6-n64c.s, ld-mips-elf/pic-and-nonpic-6-n64.ad, ld-mips-elf/pic-and-nonpic-6-n64.dd, ld-mips-elf/pic-and-nonpic-6-n64.gd, ld-mips-elf/pic-and-nonpic-6-n64.nd, ld-mips-elf/pic-and-nonpic-6-n64.pd, ld-mips-elf/pic-and-nonpic-6-n64.rd, ld-mips-elf/pic-and-nonpic-6-n64.sd: New tests. * ld-mips-elf/mips-elf.exp: Run them.	18 years ago
Alan Modra	0deb8eeef3	* common.h (ELFOSABI_AROS): Update comment.	18 years ago
Peter Bergner	9b4e57660d	gas/ * config/tc-ppc.c (parse_cpu): Rename altivec_or_spe to retain_flags. Handle -mvsx and -mpower7. (md_show_usage): Document -mpower7 and -mvsx. * doc/as.texinfo (Target PowerPC): Document -mvsx. * doc/c-ppc.texi (PowerPC-Opts): Document -mvsx and -mpower7. gas/testsuite/ * gas/ppc/power7.d: New. * gas/ppc/power7.s: Likewise. * gas/ppc/ppc.exp: Run power7 test. include/opcode/ * ppc.h (PPC_OPCODE_VSX, PPC_OPERAND_VSR): New. opcodes/ * ppc-dis.c (powerpc_init_dialect): Handle power7 and vsx options. (print_insn_powerpc): Prepend 'vs' when printing VSX registers. (print_ppc_disassembler_options): Document -Mpower7 and -Mvsx. * ppc-opc.c (insert_xt6): New static function. (extract_xt6): Likewise. (insert_xa6): Likewise. (extract_xa6: Likewise. (insert_xb6): Likewise. (extract_xb6): Likewise. (insert_xb6s): Likewise. (extract_xb6s): Likewise. (XS6, XT6, XA6, XB6, XB6S, DM, XX3, XX3DM, XX1_MASK, XX3_MASK, XX3DM_MASK, PPCVSX): New. (powerpc_opcodes): Add opcodes "lxvd2x", "lxvd2ux", "stxvd2x", "stxvd2ux", "xxmrghd", "xxmrgld", "xxpermdi", "xvmovdp", "xvcpsgndp".	18 years ago
Alan Modra	081ba1b3c0	include/opcode/ * ppc.h (PPC_OPCODE_405): Define. (PPC_OPERAND_FSL, PPC_OPERAND_FCR, PPC_OPERAND_UDI): Define. gas/ * config/tc-ppc.c (parse_cpu): Separate handling of -m403/405. (md_show_usage): Likewise. opcodes/ * ppc-dis.c (print_insn_powerpc): Disassemble FSL/FCR/UDI fields. * ppc-opc.c (powerpc_operands): Add Xilinx APU related operands. (insert_sprg, PPC405): Use PPC_OPCODE_405. (powerpc_opcodes): Add Xilinx APU related opcodes.	18 years ago
Alan Modra	3c7b98977c	Support PowerPC single-precision float.	18 years ago
Luis Machado	89eeb0bc23	* bfd/elf-bfd.h: Declare elfcore_write_ppc_vsx. * bfd/elf.c (elfcore_grok_ppc_vsx): New function. (elfcore_write_ppc_vsx): New function (elfcore_grok_note): Handle VSX notes. (elfcore_write_register_note): Handle VSX notes. * include/elf/common.h: Define NT_PPC_VSX. * binutils/readelf.c (get_note_type): Handle VSX notes.	18 years ago
Jie Zhang	1bac266e85	Revert my last change since it has not been approved.	18 years ago
Jie Zhang	8c68457827	bfd/ * elf.c (_bfd_elf_map_sections_to_segments): Don't put executable sections into the same segment with other read only sections if --sep-code. * elf32-bfin.c (elf32_bfin_code_in_l1): New variable. (elf32_bfin_data_in_l1): New variable. (elf32_bfin_final_write_processing): New. (elf32_bfin_special_sections[]): New. (elf_backend_final_write_processing): Define. (elf_backend_special_sections): Define. binutils/ * readelf.c (get_machine_flags): Deal with Blackfin specific flags. include/ * bfdlink.h (struct bfd_link_info): Add sep_code member variable. * elf/bfin.h (EF_BFIN_CODE_IN_L1): Define. (EF_BFIN_DATA_IN_L1): Define. ld/ * Makefile.am (eelf32bfin.c): Depend on bfin.em. (eelf32bfinfd.c): Likewise. * Makefile.in: Regenerate. * gen-doc.texi: Set Blackfin. * ld.texinfo: Document --sep-code and Blackfin specific options. * ldmain.c (main): Initialize link_info.sep_code. * lexsup.c (enum option_values): Add OPTION_SEP_CODE. (ld_options[]): Add --sep-code. (parse_args): Deal with --sep-code. * emulparams/bfin.sh (EXTRA_EM_FILE): Define. * emulparams/elf32bfinfd.sh (OTHER_SECTIONS): Define. * emultempl/bfin.em: New file.	18 years ago
Richard Sandiford	30c0909079	include/elf/ * mips.h (ELF_ST_IS_MIPS16, ELF_ST_SET_MIPS16): New macros. bfd/ * elfxx-mips.c (mips_elf_check_mips16_stubs): Use ELF_ST_IS_MIPS16. (mips_elf_calculate_relocation): Likewise. (_bfd_mips_elf_add_symbol_hook): Likewise. (_bfd_mips_elf_finish_dynamic_symbol): Likewise. (_bfd_mips_vxworks_finish_dynamic_symbol): Likewise. opcodes/ * mips-dis.c (_print_insn_mips): Use ELF_ST_IS_MIPS16. gas/ * config/tc-mips.c (mips16_mark_labels): Use ELF_ST_SET_MIPS16. (mips_fix_adjustable): Likewise. (mips_frob_file_after_relocs): Likewise. gas/testsuite/ * gas/mips/mips16-vis-1.d, gas/mips/mips16-vis-1.s: New tests. * gas/mips/mips.exp: Run them.	18 years ago
Stan Shebs	6a4fe770bc	2008-07-07 Stan Shebs <stan@codesourcery.com> * dis-asm.h (struct disassemble_info): Add endian_code field.	18 years ago
Joel Brobecker	0f963b2442	* safe-ctype.h: Add #include of ctype.h before redefining the ctype.h macros.	18 years ago
Joel Brobecker	d5721fa7de	* safe-ctype.h: Remove #error when detecting that ctype.h has been included. Redefine the various macros provided by ctype.h as undefined variables.	18 years ago
DJ Delorie	1e5d08323a	merge from gcc	18 years ago
M R Swami Reddy	b8a39af827	common.h (EM_CR16): Correct value.	18 years ago
M R Swami Reddy	f96e4c7fd5	common.h (EM_CR16): Correct value.	18 years ago
Nick Clifton	0146fc9d1e	* app.c (do_scrub_chars): Do not UNGET an EOF value. * ti.h (GET_SCNHDR_NLNNO): Provide an alternative version of this macro which does not trigger an array bounds warning in gcc. (PUT_SCNHDR_NLNNO): Likewise. (GET_SCNHDR_FLAGS): Likewise. (PUT_SCNHDR_FLAGS): Likewise. (GET_SCNHDR_PAGE): Likewise. (PUT_SCNHDR_PAGE): Likewise.	18 years ago
Peter Bergner	fa452fa683	include/opcode/ * ppc.h (ppc_cpu_t): New typedef. (struct powerpc_opcode <flags>): Use it. (struct powerpc_operand <insert, extract>): Likewise. (struct powerpc_macro <flags>): Likewise. gas/ * config/tc-ppc.c (ppc_cpu): Use ppc_cpu_t typedef. (ppc_insert_operand): Likewise. (ppc_machine): Likewise. * config/tc-ppc.h: #include "opcode/ppc.h" (struct _ppc_fix_extra <ppc_cpu>): Use ppc_cpu_t typedef. (ppc_cpu): Update extern decl. opcodes/ * ppc-dis.c (print_insn_powerpc): Update prototye to use new ppc_cpu_t typedef. (struct dis_private): New. (POWERPC_DIALECT): New define. (powerpc_dialect): Renamed to... (powerpc_init_dialect): This. Update to use ppc_cpu_t and struct dis_private. (print_insn_big_powerpc): Update for using structure in info->private_data. (print_insn_little_powerpc): Likewise. (operand_value_powerpc): Change type of dialect param to ppc_cpu_t. (skip_optional_operands): Likewise. (print_insn_powerpc): Likewise. Remove initialization of dialect. * ppc-opc.c (extract_bat, extract_bba, extract_bdm, extract_bdp, extract_bo, extract_boe, extract_fxm, extract_mb6, extract_mbe, extract_nb, extract_nsi, extract_rbs, extract_sh6, extract_spr, extract_sprg, extract_tbr insert_bat, insert_bba, insert_bdm, insert_bdp, insert_bo, insert_boe, insert_fxm, insert_mb6, insert_mbe, insert_nsi, insert_ral, insert_ram, insert_raq, insert_ras, insert_rbs, insert_sh6, insert_spr, insert_sprg, insert_tbr): Change the dialect param to be of type ppc_cpu_t. Update prototype.	18 years ago
Nick Clifton	dd3cbb7ef7	* mips.h: Document new field descriptors +Q. (OP_SH_SEQI, OP_MASK_SEQI): New bit mask and shift count for SEQI. opcodes/ * mips-dis.c (print_insn_args): Handle field descriptor +Q. * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions seq, seqi, sne and snei. gas/ * config/tc-mips.c (validate_mips_insn): Handle field descriptor +Q. (mips_ip): Likewise. (macro_build): Likewise. (CPU_HAS_SEQ): New macro. (macro2) <M_SEQ_I, M_SNE_I>: Use it. Emit seq/sne and seqi/snei. gas/testsuite/ * gas/mips/octeon.s, gas/mips/octeon.d: Add tests for seq* and sne. gas/mips/octeon-ill.s, gas/mips/octeon-ill.s: Add tests for seqi and snei.	18 years ago
DJ Delorie	ff7eeb894e	* common.h (EM_M32C_NEW): Rename to EM_M32C. (EM_M32C): Rename to EM_M32C_OLD. * elf32-m32c.c (ELF_MACHINE_ALT1): Define as EM_M32C_OLD. * readelf.c (guess_is_rela): Add EM_M32C_OLD. (dump_relocations): Likewise. (process_section_headers): Likewise. (is_32bit_abs_reloc): Likewise. (is_16bit_abs_reloc): Likewise.	18 years ago
Nick Clifton	bb35fb24c1	include/opcode/ * mips.h: Document new field descriptors +x, +X, +p, +P, +s, +S. Update comment before MIPS16 field descriptors to mention MIPS16. (OP_SH_BBITIND, OP_MASK_BBITIND): New bit mask and shift count for BBIT. (OP_SH_CINSPOS, OP_MASK_CINSPOS, OP_SH_CINSLM1, OP_MASK_CINSLM1): New bit masks and shift counts for cins and exts. gas/ * config/tc-mips.c (validate_mips_insn): Handle field descriptors +x, +X, +p, +P, +s, +S. (mips_ip): Likewise. opcodes/ * mips-dis.c (print_insn_args): Handle field descriptors +x, +p, +s, +S. * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions baddu, bbit, cins, dmul, pop, dpop, exts, mtm, mtp, syncs, syncw, syncws, vm3mulu, vm0 and vmulu. gas/testsuite/ gas/mips/octeon.s, gas/mips/octeon.d: Add tests for baddu, bbit, cins, dmul, pop, dpop, exts, mtm, mtp, syncs, syncw, syncws, vm3mulu, vm0 and vmulu. gas/mips/octeon-ill.s, gas/mips/octeon-ill.s: New test. * gas/mips/mips.exp: Run it. Run octeon test with run_dump_test_arches.	18 years ago
Joseph Myers	3c9a78e063	* common.h: Update e_machine table.	18 years ago
Kaz Kojima	a23ede3d59	* sh.h (EF_SH_BFD_TABLE): Set bfd_mach_sh for EF_SH_UNKNOWN.	18 years ago
Joseph Myers	2424f30373	* common.h: Change registry@caldera.com to registry@sco.com.	18 years ago
Alan Modra	97407faf3d	include/ * bfdlink.h (struct bfd_link_info): Add "path_separator". bfd/ * elf32-spu.c (spu_elf_auto_overlay): Relax requirement that file names be unique. Specify archive:path in overlay script. ld/ * ldlang.c (name_match): New function. (unique_section_p, walk_wild_consider_section): Use it here. (walk_wild_section_general): And here. (archive_path): New function. (walk_wild): Match archive:path filespecs. (open_input_bfds): Don't load archive:path files. * emultempl/spuelf.em (choose_target): Set path_separator. * emulparams/elf32_spu.sh: Add ._ea.* sections to ._ea output.	18 years ago
Nick Clifton	7c90103bb7	* reloc-macros.h: Add a comment about the use of the END_RELOC_NUMBERS symbol as a sentinel value. * arm.h (END_RELOC_NUMBERS): Provide a maximum value.	19 years ago
Adam Nemet	d079967181	* mips.h (INSN_MACRO): Move it up to the the pinfo macros. (INSN2_M_FP_S, INSN2_M_FP_D): New pinfo2 macros.	19 years ago
David S. Miller	14a6d8e0df	* elf/sparc.h (R_SPARC_GOTDATA_HIX22, R_SPARC_GOTDATA_LOX10, R_SPARC_GOTDATA_OP_HIX22, R_SPARC_GOTDATA_OP_LOX10, R_SPARC_GOTDATA_OP, R_SPARC_H34, R_SPARC_SIZE32, R_SPARC_SIZE64): New relocs.	19 years ago
Nick Clifton	e210c36bb1	Move entries for changes in sub-directories into the changelogs in those sub- directories.	19 years ago
Alan Modra	19a6653ce8	ppc e500mc support	19 years ago
Andreas Krebbel	112b7c5071	2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com> * s390-dis.c (init_disasm): Evaluate disassembler_options. (print_s390_disassembler_options): New function. * disassemble.c (disassembler_usage): Invoke print_s390_disassembler_options. 2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com> * dis-asm.h (print_s390_disassembler_options): Prototype added.	19 years ago
M R Swami Reddy	ae8aafe1c2	sim-cr16.h: New file. Added for cr16 target.	19 years ago
H.J. Lu	c0f3af977b	binutils/ 2008-04-03 H.J. Lu <hongjiu.lu@intel.com> * dwarf.c (dwarf_regnames_i386): Add AVX registers. (dwarf_regnames_x86_64): Likewise. gas/ 2008-04-03 H.J. Lu <hongjiu.lu@intel.com> * NEWS: Mention AES, CLMUL, AVX/FMA and -msse2avx. * doc/c-i386.texi: Add avx, aes, clmul and fma to -march=. Document -msse2avx, .avx, .aes, .clmul and .fma. * config/tc-i386.c (YMMWORD_MNEM_SUFFIX): New. (vex_prefix): Likewise. (sse2avx): Likewise. (CPU_FLAGS_ARCH_MATCH): Likewise. (CPU_FLAGS_64BIT_MATCH): Likewise. (CPU_FLAGS_32BIT_MATCH): Likewise. (CPU_FLAGS_PERFECT_MATCH): Likewise. (regymm): Likewise. (vex_imm4): Likewise. (fits_in_imm4): Likewise. (build_vex_prefix): Likewise. (VEX_check_operands): Likewise. (bad_implicit_operand): Likewise. (OPTION_MSSE2AVX): Likewise. (T_YMMWORD): Likewise. (_i386_insn): Add vex. (cpu_arch): Add .avx, .aes, .clmul and .fma. (cpu_flags_match): Changed to take a pointer to const template. Enable encoding SSE instructions with VEX prefix for -msse2avx. (match_mem_size): Also check ymmword. (operand_type_match): Clear ymmword. (md_begin): Allow '_' in mnemonic. (type_names): Add OPERAND_TYPE_VEX_IMM4. (process_immext): Update assert. (md_assemble): Don't call process_immext if sse2avx and immext are true. Call build_vex_prefix if vex is true. (parse_insn): Updated for cpu_flags_match. (swap_operands): Handle 5 operands. (match_template): Handle 5 operands. Updated for cpu_flags_match. Check regymm. Call VEX_check_operands. Handle YMMWORD_MNEM_SUFFIX. (process_suffix): Handle YMMWORD_MNEM_SUFFIX. (check_byte_reg): Check regymm. (process_operands): Duplicate the destination register for -msse2avx if needed. (build_modrm_byte): Updated for instructions with VEX encoding. (output_insn): Output VEX prefix if needed. (md_longopts): Add msse2avx. (md_parse_option): Handle OPTION_MSSE2AVX. (md_show_usage): Add avx, aes, clmul, fma and -msse2avx. (intel_e09): Support YMMWORD. (intel_e11): Likewise. (intel_get_token): Likewise. gas/testsuite/ 2008-04-03 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.exp: Run aes, aes-intel, x86-64-aes, x86-64-aes-intel, avx, avx-intel, inval-avx, x86-64-avx, x86-64-avx-intel and x86-64-inval-avx. * gas/cfi/cfi-i386.s: Add tests for AVX register maps. * gas/cfi/cfi-x86_64.s: Likewise. * gas/i386/aes.d: New. * gas/i386/aes.s: Likewise. * gas/i386/aes-intel.d: Likewise. * gas/i386/avx.d: Likewise. * gas/i386/avx.s: Likewise. * gas/i386/avx-intel.d: Likewise. * gas/i386/clmul.d: Likewise. * gas/i386/clmul-intel.d: Likewise. * gas/i386/clmul.s: Likewise. * gas/i386/i386.exp: Likewise. * gas/i386/inval-avx.l: Likewise. * gas/i386/inval-avx.s: Likewise. * gas/i386/sse2avx.d: Likewise. * gas/i386/sse2avx.s: Likewise. * gas/i386/x86-64-aes.d: Likewise. * gas/i386/x86-64-aes.s: Likewise. * gas/i386/x86-64-aes-intel.d: Likewise. * gas/i386/x86-64-avx.d: Likewise. * gas/i386/x86-64-avx.s: Likewise. * gas/i386/x86-64-avx-intel.d: Likewise. * gas/i386/x86-64-clmul.d: Likewise. * gas/i386/x86-64-clmul-intel.d: Likewise. * gas/i386/x86-64-clmul.s: Likewise. * gas/i386/x86-64-inval-avx.l: Likewise. * gas/i386/x86-64-inval-avx.s: Likewise. * gas/i386/x86-64-sse2avx.d: Likewise. * gas/i386/x86-64-sse2avx.s: Likewise. * gas/i386/arch-10.s: Add tests for AVX, AES, CLMUL and FMA. * gas/i386/x86-64-arch-2.s: Likewise. * gas/i386/rexw.s: Add AVX tests. * gas/i386/x86-64-opcode-inval.s: Remove lds/les test. * gas/cfi/cfi-i386.d: Updated. * gas/cfi/cfi-x86_64.d: Likewise. * gas/i386/arch-10.d: Likewise. * gas/i386/arch-10-1.l: Likewise. * gas/i386/arch-10-2.l: Likewise. * gas/i386/arch-10-3.l: Likewise. * gas/i386/arch-10-4.l: Likewise. * gas/i386/rexw.d: Likewise. * gas/i386/x86-64-arch-2.d: Likewise. * gas/i386/x86-64-opcode-inval.d: Likewise. * gas/i386/x86-64-opcode-inval-intel.d: Likewise. include/opcode/ 2008-04-03 H.J. Lu <hongjiu.lu@intel.com> * i386.h (MAX_OPERANDS): Set to 5. (MAX_MNEM_SIZE): Changed to 20. opcodes/ 2008-04-03 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (OP_E_register): New. (OP_E_memory): Likewise. (OP_VEX): Likewise. (OP_EX_Vex): Likewise. (OP_EX_VexW): Likewise. (OP_XMM_Vex): Likewise. (OP_XMM_VexW): Likewise. (OP_REG_VexI4): Likewise. (PCLMUL_Fixup): Likewise. (VEXI4_Fixup): Likewise. (VZERO_Fixup): Likewise. (VCMP_Fixup): Likewise. (VPERMIL2_Fixup): Likewise. (rex_original): Likewise. (rex_ignored): Likewise. (Mxmm): Likewise. (XMM): Likewise. (EXxmm): Likewise. (EXxmmq): Likewise. (EXymmq): Likewise. (Vex): Likewise. (Vex128): Likewise. (Vex256): Likewise. (VexI4): Likewise. (EXdVex): Likewise. (EXqVex): Likewise. (EXVexW): Likewise. (EXdVexW): Likewise. (EXqVexW): Likewise. (XMVex): Likewise. (XMVexW): Likewise. (XMVexI4): Likewise. (PCLMUL): Likewise. (VZERO): Likewise. (VCMP): Likewise. (VPERMIL2): Likewise. (xmm_mode): Likewise. (xmmq_mode): Likewise. (ymmq_mode): Likewise. (vex_mode): Likewise. (vex128_mode): Likewise. (vex256_mode): Likewise. (USE_VEX_C4_TABLE): Likewise. (USE_VEX_C5_TABLE): Likewise. (USE_VEX_LEN_TABLE): Likewise. (VEX_C4_TABLE): Likewise. (VEX_C5_TABLE): Likewise. (VEX_LEN_TABLE): Likewise. (REG_VEX_XX): Likewise. (MOD_VEX_XXX): Likewise. (PREFIX_0F38DB..PREFIX_0F38DF): Likewise. (PREFIX_0F3A44): Likewise. (PREFIX_0F3ADF): Likewise. (PREFIX_VEX_XXX): Likewise. (VEX_OF): Likewise. (VEX_OF38): Likewise. (VEX_OF3A): Likewise. (VEX_LEN_XXX): Likewise. (vex): Likewise. (need_vex): Likewise. (need_vex_reg): Likewise. (vex_i4_done): Likewise. (vex_table): Likewise. (vex_len_table): Likewise. (OP_REG_VexI4): Likewise. (vex_cmp_op): Likewise. (pclmul_op): Likewise. (vpermil2_op): Likewise. (m_mode): Updated. (es_reg): Likewise. (PREFIX_0F38F0): Likewise. (PREFIX_0F3A60): Likewise. (reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE. (prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF and PREFIX_VEX_XXX entries. (x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE. (three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and PREFIX_0F3ADF. (mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE. Add MOD_VEX_XXX entries. (ckprefix): Initialize rex_original and rex_ignored. Store the REX byte in rex_original. (get_valid_dis386): Handle the implicit prefix in VEX prefix bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE. (print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before calling get_valid_dis386. Use rex_original and rex_ignored when printing out REX. (putop): Handle "XY". (intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and ymmq_mode. (OP_E_extended): Updated to use OP_E_register and OP_E_memory. (OP_XMM): Handle VEX. (OP_EX): Likewise. (XMM_Fixup): Likewise. (CMP_Fixup): Use ARRAY_SIZE. * i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS, CPU_FMA_FLAGS and CPU_AVX_FLAGS. (operand_type_init): Add OPERAND_TYPE_REGYMM and OPERAND_TYPE_VEX_IMM4. (cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA. (opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD, VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources, VexImmExt and SSE2AVX. (operand_types): Add RegYMM, Ymmword and Vex_Imm4. * i386-opc.h (CpuAVX): New. (CpuAES): Likewise. (CpuCLMUL): Likewise. (CpuFMA): Likewise. (Vex): Likewise. (Vex256): Likewise. (VexNDS): Likewise. (VexNDD): Likewise. (VexW0): Likewise. (VexW1): Likewise. (Vex0F): Likewise. (Vex0F38): Likewise. (Vex0F3A): Likewise. (Vex3Sources): Likewise. (VexImmExt): Likewise. (SSE2AVX): Likewise. (RegYMM): Likewise. (Ymmword): Likewise. (Vex_Imm4): Likewise. (Implicit1stXmm0): Likewise. (CpuXsave): Updated. (CpuLM): Likewise. (ByteOkIntel): Likewise. (OldGcc): Likewise. (Control): Likewise. (Unspecified): Likewise. (OTMax): Likewise. (i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma. (i386_opcode_modifier): Add implicit1stxmm0, vex, vex256, vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a, vex3sources, veximmext and sse2avx. (i386_operand_type): Add regymm, ymmword and vex_imm4. * i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions. * i386-reg.tbl: Add AVX registers, ymm0..ymm15. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.	19 years ago
Eric B. Weddington	2460c166ae	/gas: 2008-03-28 Eric B. Weddington <eric.weddington@atmel.com> * config/tc-avr.c (mcu_types): Add attiny167. * doc/c-avr.texi: Likewise. /include: 2008-03-28 Eric B. Weddington <eric.weddington@atmel.com> * opcode/avr.h (AVR_ISA_TINY3): Define new opcode set for attiny167.	19 years ago
Nick Clifton	a8da640382	Add support for thin archives. * bfd/archive.c (_bfd_find_nested_archive): New function. (get_extended_arelt_filename): Add origin parameter. (_bfd_generic_read_ar_hdr_mag): Deal with extended name combined with a file offset. (append_relative_path): New function. (_bfd_get_elt_at_filepos): Deal with external members and nested archives. (bfd_generic_openr_next_archived_file): Thin archives. (bfd_generic_archive_p): Recognize new magic string. (adjust_relative_path): New function. (_bfd_construct_extended_name_table): Construct extended names for thin archive members. (_bfd_write_archive_contents): Emit new magic string, skip copying files for thin archives. * bfd/bfd-in.h (bfd_is_thin_archive): New macro. * bfd/bfd.c (struct bfd): New fields for thin archives. * bfd/libbfd-in.h (struct areltdata): New field for thin archives. * bfd/opncls.c (bfd_close): Delete BFDs for nested archives. * binutils/ar.c (make_thin_archive): New global flag. (map_over_members): Deal with full pathnames in thin archives. (usage, main): Add 'T' option for building thin archives. (replace_members): Pass thin archive flag to ar_emul_append. * binutils/arsup.c (ar_open): Initialize new flag. * binutils/binemul.c (ar_emul_append): Add new parameter for flattening nested archives. (do_ar_emul_default_append): New function. (ar_emul_default_append): Factored out recursive code. * binutils/binemul.h (ar_emul_default_append): Add new parameter. (struct bin_emulation_xfer_struct): New parameter for ar_append. * binutils/dlltool.c (gen_lib_file): Initialize thin archive flag. * binutils/emul_aix.c (ar_emul_aix_internal): Add new flatten parameter, currently unimplemented. All callers changed. * binutils/objcopy.c (copy_archive): Preserve thin archive flag. * binutils/doc/binutils.texi: Update ar documentation. * binutils/testsuite/binutils-all/ar.exp: Add thin archive tests. * include/aout/ar.h (ARMAGT): New magic string for thin archives.	19 years ago

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