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This patch better supports mixing of power10 and non-power10 code, as might be seen in a cpu-optimized library using ifuncs to select functions optimized for a given cpu. Using -Wl,--no-power10-stubs isn't that good in this situation since non-power10 notoc stubs are slower and larger than the power10 variants, which you'd like to use on power10 code paths. With this change, power10 pc-relative code that makes calls marked @notoc uses power10 stubs if stubs are necessary, and other calls use non-power10 instructions in stubs. This will mean that if gcc is generating code for -mcpu=power10 but with pc-rel disabled then you'll get the older stubs even on power10 (unless you force with -Wl,--power10-stubs). That shouldn't be too big a problem: stubs that use r2 are reasonable. It's just the ones that set up addressing using "mflr 12; bcl 20,31,.+4; mflr 11; mtlr 12" that should be avoided if possible. bfd/ * elf64-ppc.c (struct ppc_link_hash_table): Add has_power10_relocs. (select_alt_stub): New function. (ppc_get_stub_entry): Use it here. (ppc64_elf_check_relocs): Set had_power10_relocs rather than power10_stubs. (ppc64_elf_size_stubs): Clear power10_stubs here instead. Don't merge notoc stubs with other varieties when power10_stubs is "auto". Instead dup the stub hash table entry. (plt_stub_size, ppc_build_one_stub, ppc_size_one_stub): Adjust tests of power10_stubs. ld/ * emultempl/ppc64elf.em (power10-stubs): Accept optional "auto" arg. * ld.texi (power10-stubs): Update. * testsuite/ld-powerpc/callstub-1.d: Force --power10-stubs. * testsuite/ld-powerpc/callstub-2.d: Relax branch offset comparison. * testsuite/ld-powerpc/callstub-4.d: New test. * testsuite/ld-powerpc/notoc.d: Force --no-power10-stubs. * testsuite/ld-powerpc/notoc3.d, * testsuite/ld-powerpc/notoc3.s, * testsuite/ld-powerpc/notoc3.wf: New test. * testsuite/ld-powerpc/powerpc.exp: Run new tests. Pass --no-power10-stubs for notoc link.gdb-10-branch
13 changed files with 359 additions and 34 deletions
@ -0,0 +1,32 @@ |
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#source: callstub-1.s |
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#as: -a64 -mpower10 |
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#ld: -melf64ppc -shared --plt-align=0 --hash-style=gnu |
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#objdump: -dr -Mpower10 |
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.* |
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Disassembly of section \.text: |
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.*\.plt_call\.f1>: |
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.*: (04 10 00 01|01 00 10 04) pld r12,.* |
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.*: (e5 80 .. ..|.. .. 80 e5) |
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.*: (7d 89 03 a6|a6 03 89 7d) mtctr r12 |
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.*: (4e 80 04 20|20 04 80 4e) bctr |
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.*: (f8 41 00 18|18 00 41 f8) std r2,24\(r1\) |
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.*: (e9 82 80 28|28 80 82 e9) ld r12,-32728\(r2\) |
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.*: (7d 89 03 a6|a6 03 89 7d) mtctr r12 |
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.*: (4e 80 04 20|20 04 80 4e) bctr |
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.*\.plt_call\.f2>: |
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.*: (04 10 00 01|01 00 10 04) pld r12,.* |
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.*: (e5 80 .. ..|.. .. 80 e5) |
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.*: (7d 89 03 a6|a6 03 89 7d) mtctr r12 |
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.*: (4e 80 04 20|20 04 80 4e) bctr |
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#... |
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.*<_start>: |
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.*: (4b ff .. ..|.. .. ff 4b) bl .*\.plt_call\.f1\+0x10> |
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.*: (e8 41 00 18|18 00 41 e8) ld r2,24\(r1\) |
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.*: (4b ff .. ..|.. .. ff 4b) bl .*\.plt_call\.f1> |
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.*: (4b ff .. ..|.. .. ff 4b) bl .*\.plt_call\.f2> |
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#pass |
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#as: -a64 -mpower10 |
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#ld: --no-plt-localentry -T ext.lnk |
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#objdump: -d |
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#target: powerpc64*-*-* |
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.* |
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Disassembly of section \.text: |
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.* <.*\.long_branch\.f1>: |
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.*: (18 00 41 f8|f8 41 00 18) std r2,24\(r1\) |
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.*: (.. .. 00 48|48 00 .. ..) b .* <f1> |
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.* <.*\.long_branch\.g1>: |
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.*: (18 00 41 f8|f8 41 00 18) std r2,24\(r1\) |
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.*: (.. .. 00 48|48 00 .. ..) b .* <g1> |
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.* <.*\.plt_branch\.ext>: |
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.*: (00 20 60 3d|3d 60 20 00) lis r11,8192 |
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.*: (00 00 6b 61|61 6b 00 00) ori r11,r11,0 |
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.*: (ff ef 13 06|06 13 ef ff) pla r12,-268435736 |
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.*: (e8 fe 80 39|39 80 fe e8) |
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.*: (46 17 6b 79|79 6b 17 46) rldicr r11,r11,34,29 |
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.*: (14 62 8b 7d|7d 8b 62 14) add r12,r11,r12 |
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.*: (a6 03 89 7d|7d 89 03 a6) mtctr r12 |
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.*: (20 04 80 4e|4e 80 04 20) bctr |
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.*: (00 80 82 e9|e9 82 80 00) ld r12,-32768\(r2\) |
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.*: (a6 03 89 7d|7d 89 03 a6) mtctr r12 |
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.*: (20 04 80 4e|4e 80 04 20) bctr |
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.* <.*\.long_branch\.f2>: |
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.*: (00 00 00 60|60 00 00 00) nop |
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.*: (00 00 10 06|06 10 00 00) pla r12,108 |
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.*: (6c 00 80 39|39 80 00 6c) |
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.*: (.. .. 00 48|48 00 .. ..) b .* <f2> |
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.* <.*\.long_branch\.g2>: |
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.*: (00 00 00 60|60 00 00 00) nop |
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.*: (00 00 10 06|06 10 00 00) pla r12,144 |
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.*: (90 00 80 39|39 80 00 90) |
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.*: (.. .. 00 48|48 00 .. ..) b .* <g2> |
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#... |
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.* <f1>: |
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.*: (01 00 00 48|48 00 00 01) bl .* <f1> |
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.*: (.. .. ff 4b|4b ff .. ..) bl .* <.*\.long_branch\.f2> |
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.*: (.. .. 00 48|48 00 .. ..) bl .* <g1> |
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.*: (.. .. ff 4b|4b ff .. ..) bl .* <.*\.long_branch\.g2> |
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.*: (.. .. ff 4b|4b ff .. ..) bl .* <.*\.plt_branch\.ext> |
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.*: (20 00 80 4e|4e 80 00 20) blr |
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|
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.* <g1>: |
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.*: (.. .. ff 4b|4b ff .. ..) bl .* <.*\.long_branch\.f2> |
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.*: (.. .. ff 4b|4b ff .. ..) bl .* <f1> |
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.*: (.. .. ff 4b|4b ff .. ..) bl .* <.*\.long_branch\.g2> |
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.*: (.. .. ff 4b|4b ff .. ..) bl .* <g1> |
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.*: (20 00 80 4e|4e 80 00 20) blr |
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.* <f2>: |
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.*: (02 10 40 3c|3c 40 10 02) lis r2,4098 |
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.*: (00 90 42 38|38 42 90 00) addi r2,r2,-28672 |
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.*: (.. .. ff 4b|4b ff .. ..) bl .* <.*\.long_branch\.f1> |
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.*: (18 00 41 e8|e8 41 00 18) ld r2,24\(r1\) |
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.*: (.. .. ff 4b|4b ff .. ..) bl .* <f2\+0x8> |
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.*: (00 00 00 60|60 00 00 00) nop |
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.*: (.. .. ff 4b|4b ff .. ..) bl .* <.*\.long_branch\.g1> |
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.*: (18 00 41 e8|e8 41 00 18) ld r2,24\(r1\) |
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.*: (.. .. 00 48|48 00 .. ..) bl .* <g2\+0x8> |
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.*: (00 00 00 60|60 00 00 00) nop |
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.*: (.. .. ff 4b|4b ff .. ..) bl .* <.*\.plt_branch\.ext\+0x20> |
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.*: (00 00 00 60|60 00 00 00) nop |
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.*: (20 00 80 4e|4e 80 00 20) blr |
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.* <g2>: |
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.*: (02 10 40 3c|3c 40 10 02) lis r2,4098 |
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.*: (00 90 42 38|38 42 90 00) addi r2,r2,-28672 |
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.*: (.. .. ff 4b|4b ff .. ..) bl .* <f2\+0x8> |
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.*: (00 00 00 60|60 00 00 00) nop |
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.*: (.. .. ff 4b|4b ff .. ..) bl .* <.*\.long_branch\.f1> |
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.*: (18 00 41 e8|e8 41 00 18) ld r2,24\(r1\) |
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.*: (.. .. ff 4b|4b ff .. ..) bl .* <g2\+0x8> |
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.*: (00 00 00 60|60 00 00 00) nop |
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.*: (.. .. ff 4b|4b ff .. ..) bl .* <.*\.long_branch\.g1> |
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.*: (18 00 41 e8|e8 41 00 18) ld r2,24\(r1\) |
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.*: (20 00 80 4e|4e 80 00 20) blr |
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.* <_start>: |
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.*: (00 00 00 48|48 00 00 00) b .* <_start> |
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#... |
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Disassembly of section \.text\.ext: |
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8000000000000000 <ext>: |
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8000000000000000: (02 10 40 3c|3c 40 10 02) lis r2,4098 |
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8000000000000004: (00 90 42 38|38 42 90 00) addi r2,r2,-28672 |
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8000000000000008: (00 00 00 60|60 00 00 00) nop |
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800000000000000c: (20 00 80 4e|4e 80 00 20) blr |
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@ -0,0 +1,59 @@ |
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.text |
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.globl f1, f2, g1, g2, _start |
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.weak ext |
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.abiversion 2 |
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f1: |
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.localentry f1,1 |
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bl f1@notoc |
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bl f2@notoc |
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bl g1@notoc |
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bl g2@notoc |
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bl ext@notoc |
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blr |
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g1: |
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.localentry g1,1 |
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bl f2@notoc |
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bl f1@notoc |
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bl g2@notoc |
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bl g1@notoc |
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blr |
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f2: |
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0: |
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addis 2,12,.TOC.-0b@ha |
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addi 2,2,.TOC.-0b@l |
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.localentry f2,.-0b |
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bl f1 |
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nop |
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bl f2 |
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nop |
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bl g1 |
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nop |
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bl g2 |
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nop |
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bl ext |
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nop |
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blr |
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g2: |
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0: |
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addis 2,12,.TOC.-0b@ha |
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addi 2,2,.TOC.-0b@l |
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.localentry g2,.-0b |
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bl f2 |
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nop |
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bl f1 |
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nop |
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bl g2 |
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nop |
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bl g1 |
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nop |
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blr |
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_start: |
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.cfi_startproc |
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b _start |
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pld 3,_start |
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.cfi_endproc |
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@ -0,0 +1,17 @@ |
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Contents of the \.eh_frame section: |
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00000000 0000000000000010 00000000 CIE |
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Version: 1 |
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Augmentation: "zR" |
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Code alignment factor: 4 |
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Data alignment factor: -8 |
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Return address column: 65 |
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Augmentation data: 1b |
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DW_CFA_def_cfa: r1 ofs 0 |
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00000014 0000000000000010 00000018 FDE cie=00000000 pc=000000001000020c\.\.0000000010000218 |
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DW_CFA_nop |
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DW_CFA_nop |
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DW_CFA_nop |
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Reference in new issue