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This patch is part of the patch series to add support for ARMv8.5-A extensions. (https://developer.arm.com/products/architecture/cpu-architecture/a-profile/exploration-tools) This patch adds the Execution and Data Prediction Restriction instructions (that is, cfprctx, dvprxtc, cpprctx). These are all aliases to MCR and are disassembled as such. This instruction is retrospectively made optional for all versions of the architecture from ARMv8.0 to ARMv8.4 and is mandatory from ARMv8.5. Hence adding a new +predres for older versions of the architecture. *** include/ChangeLog *** 2018-10-05 Sudakshina Das <sudi.das@arm.com> * opcode/arm.h (ARM_EXT2_PREDRES): New. (ARM_ARCH_V8_5A): Add ARM_EXT2_PREDRES by default. *** gas/ChangeLog *** 2018-10-05 Sudakshina Das <sudi.das@arm.com> * config/tc-arm.c (arm_ext_predres): New. (insns): Add new cfprctx, dvprctx and cpprctx instructions. (arm_extensions): Add "predres". * doc/c-arm.texi: Document the above. * testsuite/gas/arm/predres-bad.d: New test. * testsuite/gas/arm/predres-bad.l: New test. * testsuite/gas/arm/predres.s: New test. * testsuite/gas/arm/predres1.d: New test. * testsuite/gas/arm/predres2.d: New test.users/ahayward/variable_sve2
committed by
Richard Earnshaw
10 changed files with 71 additions and 1 deletions
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#name: Error for Prediction Restriction instructions without +predres |
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#source: predres.s |
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#as: -march=armv8-a |
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#error_output: predres-bad.l |
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[^:]*: Assembler messages: |
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[^:]*:4: Error: selected processor does not support `cfprctx r1' in ARM mode |
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[^:]*:5: Error: selected processor does not support `dvprctx r2' in ARM mode |
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[^:]*:6: Error: selected processor does not support `cpprctx r3' in ARM mode |
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@ Test case to validate Prediction Restriction Instructions |
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.section .text |
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.syntax unified |
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cfprctx r1 |
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dvprctx r2 |
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cpprctx r3 |
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#name: Execution and Data Prediction Restriction instructions |
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#source: predres.s |
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#as: -march=armv8.5-a |
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#objdump: -dr --prefix-addresses --show-raw-insn |
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.*: *file format .*arm.* |
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Disassembly of section .text: |
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.*> ee071f93 mcr 15, 0, r1, cr7, cr3, \{4\} |
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.*> ee072fb3 mcr 15, 0, r2, cr7, cr3, \{5\} |
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.*> ee073ff3 mcr 15, 0, r3, cr7, cr3, \{7\} |
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#name: Execution and Data Prediction Restriction instructions with +predres |
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#source: predres.s |
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#as: -march=armv8-a+predres |
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#objdump: -dr --prefix-addresses --show-raw-insn |
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.*: *file format .*arm.* |
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Disassembly of section .text: |
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.*> ee071f93 mcr 15, 0, r1, cr7, cr3, \{4\} |
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.*> ee072fb3 mcr 15, 0, r2, cr7, cr3, \{5\} |
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.*> ee073ff3 mcr 15, 0, r3, cr7, cr3, \{7\} |
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