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ld/x86-64: Add PR gold/26939 tests

GOTPCRELX relocations can be transformed only when addend == -4.  Add
tests for GOTPCRELX relocations with addend != -4.

	PR gold/26939
	* testsuite/ld-x86-64/pr26939-x32.d: New file.
	* testsuite/ld-x86-64/pr26939.d: Likewise.
	* testsuite/ld-x86-64/pr26939.s: Likewise.
	* testsuite/ld-x86-64/x86-64.exp: Run PR gold/26939 tests.
binutils-2_36-branch
H.J. Lu 6 years ago
parent
commit
d0089f12f6
  1. 8
      ld/ChangeLog
  2. 13
      ld/testsuite/ld-x86-64/pr26939-x32.d
  3. 12
      ld/testsuite/ld-x86-64/pr26939.d
  4. 5
      ld/testsuite/ld-x86-64/pr26939.s
  5. 2
      ld/testsuite/ld-x86-64/x86-64.exp

8
ld/ChangeLog

@ -1,3 +1,11 @@
2020-11-24 H.J. Lu <hongjiu.lu@intel.com>
PR gold/26939
* testsuite/ld-x86-64/pr26939-x32.d: New file.
* testsuite/ld-x86-64/pr26939.d: Likewise.
* testsuite/ld-x86-64/pr26939.s: Likewise.
* testsuite/ld-x86-64/x86-64.exp: Run PR gold/26939 tests.
2020-11-23 H.J. Lu <hongjiu.lu@intel.com>
PR ld/26918

13
ld/testsuite/ld-x86-64/pr26939-x32.d

@ -0,0 +1,13 @@
#source: pr26939.s
#as: --x32
#ld: -pie -melf32_x86_64
#objdump: -dw
.*: +file format .*
Disassembly of section .text:
#...
[ ]*[a-f0-9]+: 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%eax # [a-f0-9]+ <.*>
#pass

12
ld/testsuite/ld-x86-64/pr26939.d

@ -0,0 +1,12 @@
#as: --64
#ld: -pie -melf_x86_64
#objdump: -dw
.*: +file format .*
Disassembly of section .text:
#...
[ ]*[a-f0-9]+: 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%eax # [a-f0-9]+ <.*>
#pass

5
ld/testsuite/ld-x86-64/pr26939.s

@ -0,0 +1,5 @@
.text
.globl _start
.type _start,@function
_start:
movl _start@GOTPCREL+4(%rip), %eax

2
ld/testsuite/ld-x86-64/x86-64.exp

@ -659,6 +659,8 @@ run_dump_test "pr20253-5b"
run_dump_test "tlsdesc2"
run_dump_test "pr22048"
run_dump_test "pr22929"
run_dump_test "pr26939"
run_dump_test "pr26939-x32"
proc undefined_weak {cflags ldflags} {
set testname "Undefined weak symbol"

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