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@ -108,16 +108,19 @@ sim_core_signal (SIM_DESC sd, |
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sim_core_signals sig) |
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sim_core_signals sig) |
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{ |
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{ |
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const char *copy = (transfer == read_transfer ? "read" : "write"); |
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const char *copy = (transfer == read_transfer ? "read" : "write"); |
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/* The CIA could either be a struct or a simple type. Regardless,
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the address of the instruction is found in the first word. */ |
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address_word ip = *(address_word*)&cia; |
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switch (sig) |
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switch (sig) |
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{ |
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{ |
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case sim_core_unmapped_signal: |
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case sim_core_unmapped_signal: |
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sim_io_eprintf (sd, "core: %d byte %s to unmaped address 0x%lx\n", |
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sim_io_eprintf (sd, "core: %d byte %s to unmaped address 0x%lx at 0x%lx\n", |
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nr_bytes, copy, (unsigned long) addr); |
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nr_bytes, copy, (unsigned long) addr, (unsigned long) ip); |
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sim_engine_halt (sd, cpu, NULL, cia, sim_signalled, SIGSEGV); |
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sim_engine_halt (sd, cpu, NULL, cia, sim_signalled, SIGSEGV); |
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break; |
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break; |
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case sim_core_unaligned_signal: |
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case sim_core_unaligned_signal: |
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sim_io_eprintf (sd, "core: %d byte misaligned %s to address 0x%lx", |
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sim_io_eprintf (sd, "core: %d byte misaligned %s to address 0x%lx at 0x%lx\n", |
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nr_bytes, copy, (unsigned long) addr); |
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nr_bytes, copy, (unsigned long) addr, (unsigned long) ip); |
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sim_engine_halt (sd, cpu, NULL, cia, sim_signalled, SIGBUS); |
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sim_engine_halt (sd, cpu, NULL, cia, sim_signalled, SIGBUS); |
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break; |
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break; |
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default: |
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default: |
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