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@ -2886,7 +2886,7 @@ macro_build (place, counter, ep, name, fmt, va_alist) |
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case 'j': |
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case 'o': |
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*r = (bfd_reloc_code_real_type) va_arg (args, int); |
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assert (*r == BFD_RELOC_MIPS_GPREL |
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assert (*r == BFD_RELOC_GPREL16 |
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|| *r == BFD_RELOC_MIPS_LITERAL |
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|| *r == BFD_RELOC_MIPS_HIGHER |
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|| *r == BFD_RELOC_HI16_S |
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@ -3561,7 +3561,7 @@ load_address (counter, reg, ep, dbl, used_at) |
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if (mips_pic == NO_PIC) |
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{ |
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/* If this is a reference to a GP relative symbol, we want
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addiu $reg,$gp,<sym> (BFD_RELOC_MIPS_GPREL) |
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addiu $reg,$gp,<sym> (BFD_RELOC_GPREL16) |
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Otherwise we want |
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lui $reg,<sym> (BFD_RELOC_HI16_S) |
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addiu $reg,$reg,<sym> (BFD_RELOC_LO16) |
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@ -3631,8 +3631,8 @@ load_address (counter, reg, ep, dbl, used_at) |
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{ |
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frag_grow (20); |
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macro_build ((char *) NULL, counter, ep, |
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HAVE_32BIT_ADDRESSES ? "addiu" : "daddiu", |
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"t,r,j", reg, GP, (int) BFD_RELOC_MIPS_GPREL); |
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dbl ? "daddiu" : "addiu", "t,r,j", reg, GP, |
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(int) BFD_RELOC_GPREL16); |
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p = frag_var (rs_machine_dependent, 8, 0, |
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RELAX_ENCODE (4, 8, 0, 4, 0, |
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mips_opts.warn_about_macros), |
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@ -3743,11 +3743,10 @@ load_address (counter, reg, ep, dbl, used_at) |
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else if (mips_pic == EMBEDDED_PIC) |
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{ |
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/* We always do
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addiu $reg,$gp,<sym> (BFD_RELOC_MIPS_GPREL) |
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addiu $reg,$gp,<sym> (BFD_RELOC_GPREL16) |
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*/ |
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macro_build ((char *) NULL, counter, ep, |
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HAVE_32BIT_ADDRESSES ? "addiu" : "daddiu", |
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"t,r,j", reg, GP, (int) BFD_RELOC_MIPS_GPREL); |
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macro_build ((char *) NULL, counter, ep, dbl ? "daddiu" : "addiu", |
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"t,r,j", reg, GP, (int) BFD_RELOC_GPREL16); |
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} |
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else |
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abort (); |
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@ -4551,7 +4550,7 @@ macro (ip) |
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else if (mips_pic == NO_PIC) |
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{ |
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/* If this is a reference to a GP relative symbol, we want
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addiu $tempreg,$gp,<sym> (BFD_RELOC_MIPS_GPREL) |
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addiu $tempreg,$gp,<sym> (BFD_RELOC_GPREL16) |
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Otherwise we want |
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lui $tempreg,<sym> (BFD_RELOC_HI16_S) |
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addiu $tempreg,$tempreg,<sym> (BFD_RELOC_LO16) |
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@ -4621,7 +4620,7 @@ macro (ip) |
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frag_grow (20); |
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macro_build ((char *) NULL, &icnt, &offset_expr, |
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HAVE_32BIT_ADDRESSES ? "addiu" : "daddiu", |
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"t,r,j", tempreg, GP, (int) BFD_RELOC_MIPS_GPREL); |
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"t,r,j", tempreg, GP, (int) BFD_RELOC_GPREL16); |
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p = frag_var (rs_machine_dependent, 8, 0, |
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RELAX_ENCODE (4, 8, 0, 4, 0, |
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mips_opts.warn_about_macros), |
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@ -4982,11 +4981,11 @@ macro (ip) |
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else if (mips_pic == EMBEDDED_PIC) |
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{ |
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/* We use
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addiu $tempreg,$gp,<sym> (BFD_RELOC_MIPS_GPREL) |
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addiu $tempreg,$gp,<sym> (BFD_RELOC_GPREL16) |
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*/ |
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macro_build ((char *) NULL, &icnt, &offset_expr, |
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HAVE_32BIT_ADDRESSES ? "addiu" : "daddiu", |
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"t,r,j", tempreg, GP, (int) BFD_RELOC_MIPS_GPREL); |
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"t,r,j", tempreg, GP, (int) BFD_RELOC_GPREL16); |
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} |
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else |
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abort (); |
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@ -5386,7 +5385,7 @@ macro (ip) |
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{ |
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/* If this is a reference to a GP relative symbol, and there
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is no base register, we want |
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<op> $treg,<sym>($gp) (BFD_RELOC_MIPS_GPREL) |
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<op> $treg,<sym>($gp) (BFD_RELOC_GPREL16) |
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Otherwise, if there is no base register, we want |
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lui $tempreg,<sym> (BFD_RELOC_HI16_S) |
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<op> $treg,<sym>($tempreg) (BFD_RELOC_LO16) |
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@ -5396,7 +5395,7 @@ macro (ip) |
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If we have a base register, and this is a reference to a |
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GP relative symbol, we want |
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addu $tempreg,$breg,$gp |
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<op> $treg,<sym>($tempreg) (BFD_RELOC_MIPS_GPREL) |
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<op> $treg,<sym>($tempreg) (BFD_RELOC_GPREL16) |
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Otherwise we want |
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lui $tempreg,<sym> (BFD_RELOC_HI16_S) |
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addu $tempreg,$tempreg,$breg |
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@ -5494,7 +5493,7 @@ macro (ip) |
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{ |
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frag_grow (20); |
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macro_build ((char *) NULL, &icnt, &offset_expr, s, fmt, |
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treg, (int) BFD_RELOC_MIPS_GPREL, GP); |
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treg, (int) BFD_RELOC_GPREL16, GP); |
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p = frag_var (rs_machine_dependent, 8, 0, |
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RELAX_ENCODE (4, 8, 0, 4, 0, |
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(mips_opts.warn_about_macros |
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@ -5522,7 +5521,7 @@ macro (ip) |
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HAVE_32BIT_ADDRESSES ? "addu" : "daddu", |
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"d,v,t", tempreg, breg, GP); |
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macro_build ((char *) NULL, &icnt, &offset_expr, s, fmt, |
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treg, (int) BFD_RELOC_MIPS_GPREL, tempreg); |
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treg, (int) BFD_RELOC_GPREL16, tempreg); |
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p = frag_var (rs_machine_dependent, 12, 0, |
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RELAX_ENCODE (8, 12, 0, 8, 0, 0), |
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offset_expr.X_add_symbol, (offsetT) 0, |
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@ -5648,16 +5647,16 @@ macro (ip) |
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else if (mips_pic == EMBEDDED_PIC) |
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{ |
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/* If there is no base register, we want
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<op> $treg,<sym>($gp) (BFD_RELOC_MIPS_GPREL) |
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<op> $treg,<sym>($gp) (BFD_RELOC_GPREL16) |
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If there is a base register, we want |
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addu $tempreg,$breg,$gp |
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<op> $treg,<sym>($tempreg) (BFD_RELOC_MIPS_GPREL) |
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<op> $treg,<sym>($tempreg) (BFD_RELOC_GPREL16) |
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*/ |
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assert (offset_expr.X_op == O_symbol); |
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if (breg == 0) |
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{ |
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macro_build ((char *) NULL, &icnt, &offset_expr, s, fmt, |
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treg, (int) BFD_RELOC_MIPS_GPREL, GP); |
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treg, (int) BFD_RELOC_GPREL16, GP); |
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used_at = 0; |
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} |
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else |
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@ -5666,7 +5665,7 @@ macro (ip) |
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HAVE_32BIT_ADDRESSES ? "addu" : "daddu", |
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"d,v,t", tempreg, breg, GP); |
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macro_build ((char *) NULL, &icnt, &offset_expr, s, fmt, |
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treg, (int) BFD_RELOC_MIPS_GPREL, tempreg); |
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treg, (int) BFD_RELOC_GPREL16, tempreg); |
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} |
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} |
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else |
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@ -5765,7 +5764,7 @@ macro (ip) |
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a single instruction. */ |
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macro_build ((char *) NULL, &icnt, &offset_expr, |
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HAVE_32BIT_ADDRESSES ? "addiu" : "daddiu", |
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"t,r,j", AT, GP, (int) BFD_RELOC_MIPS_GPREL); |
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"t,r,j", AT, GP, (int) BFD_RELOC_GPREL16); |
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offset_expr.X_op = O_constant; |
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offset_expr.X_add_number = 0; |
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} |
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@ -5998,12 +5997,12 @@ macro (ip) |
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|| offset_expr.X_op == O_constant) |
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{ |
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/* If this is a reference to a GP relative symbol, we want
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<op> $treg,<sym>($gp) (BFD_RELOC_MIPS_GPREL) |
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<op> $treg+1,<sym>+4($gp) (BFD_RELOC_MIPS_GPREL) |
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<op> $treg,<sym>($gp) (BFD_RELOC_GPREL16) |
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<op> $treg+1,<sym>+4($gp) (BFD_RELOC_GPREL16) |
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If we have a base register, we use this |
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addu $at,$breg,$gp |
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<op> $treg,<sym>($at) (BFD_RELOC_MIPS_GPREL) |
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<op> $treg+1,<sym>+4($at) (BFD_RELOC_MIPS_GPREL) |
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<op> $treg,<sym>($at) (BFD_RELOC_GPREL16) |
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<op> $treg+1,<sym>+4($at) (BFD_RELOC_GPREL16) |
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If this is not a GP relative symbol, we want |
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lui $at,<sym> (BFD_RELOC_HI16_S) |
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<op> $treg,<sym>($at) (BFD_RELOC_LO16) |
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@ -6042,7 +6041,7 @@ macro (ip) |
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/* Itbl support may require additional care here. */ |
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macro_build ((char *) NULL, &icnt, &offset_expr, s, fmt, |
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coproc ? treg + 1 : treg, |
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(int) BFD_RELOC_MIPS_GPREL, tempreg); |
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(int) BFD_RELOC_GPREL16, tempreg); |
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offset_expr.X_add_number += 4; |
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/* Set mips_optimize to 2 to avoid inserting an
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@ -6052,7 +6051,7 @@ macro (ip) |
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/* Itbl support may require additional care here. */ |
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macro_build ((char *) NULL, &icnt, &offset_expr, s, fmt, |
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coproc ? treg : treg + 1, |
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(int) BFD_RELOC_MIPS_GPREL, tempreg); |
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(int) BFD_RELOC_GPREL16, tempreg); |
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mips_optimize = hold_mips_optimize; |
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p = frag_var (rs_machine_dependent, 12 + off, 0, |
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@ -6268,12 +6267,12 @@ macro (ip) |
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else if (mips_pic == EMBEDDED_PIC) |
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{ |
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/* If there is no base register, we use
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<op> $treg,<sym>($gp) (BFD_RELOC_MIPS_GPREL) |
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<op> $treg+1,<sym>+4($gp) (BFD_RELOC_MIPS_GPREL) |
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<op> $treg,<sym>($gp) (BFD_RELOC_GPREL16) |
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<op> $treg+1,<sym>+4($gp) (BFD_RELOC_GPREL16) |
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If we have a base register, we use |
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addu $at,$breg,$gp |
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<op> $treg,<sym>($at) (BFD_RELOC_MIPS_GPREL) |
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<op> $treg+1,<sym>+4($at) (BFD_RELOC_MIPS_GPREL) |
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<op> $treg,<sym>($at) (BFD_RELOC_GPREL16) |
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<op> $treg+1,<sym>+4($at) (BFD_RELOC_GPREL16) |
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*/ |
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if (breg == 0) |
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{ |
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@ -6292,12 +6291,12 @@ macro (ip) |
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/* Itbl support may require additional care here. */ |
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macro_build ((char *) NULL, &icnt, &offset_expr, s, fmt, |
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coproc ? treg + 1 : treg, |
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(int) BFD_RELOC_MIPS_GPREL, tempreg); |
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(int) BFD_RELOC_GPREL16, tempreg); |
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offset_expr.X_add_number += 4; |
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/* Itbl support may require additional care here. */ |
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macro_build ((char *) NULL, &icnt, &offset_expr, s, fmt, |
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coproc ? treg : treg + 1, |
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(int) BFD_RELOC_MIPS_GPREL, tempreg); |
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(int) BFD_RELOC_GPREL16, tempreg); |
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} |
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else |
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abort (); |
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@ -10373,11 +10372,11 @@ md_apply_fix3 (fixP, valP, seg) |
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case BFD_RELOC_MIPS_JALR: |
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case BFD_RELOC_HI16: |
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case BFD_RELOC_HI16_S: |
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case BFD_RELOC_MIPS_GPREL: |
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case BFD_RELOC_GPREL16: |
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case BFD_RELOC_MIPS_LITERAL: |
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case BFD_RELOC_MIPS_CALL16: |
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case BFD_RELOC_MIPS_GOT16: |
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case BFD_RELOC_MIPS_GPREL32: |
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case BFD_RELOC_GPREL32: |
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case BFD_RELOC_MIPS_GOT_HI16: |
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case BFD_RELOC_MIPS_GOT_LO16: |
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case BFD_RELOC_MIPS_CALL_HI16: |
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@ -11475,7 +11474,7 @@ s_gpword (ignore) |
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p = frag_more (4); |
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md_number_to_chars (p, (valueT) 0, 4); |
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fix_new_exp (frag_now, p - frag_now->fr_literal, 4, &ex, 0, |
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BFD_RELOC_MIPS_GPREL32); |
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BFD_RELOC_GPREL32); |
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demand_empty_rest_of_line (); |
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} |
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@ -12137,7 +12136,7 @@ tc_gen_reloc (section, fixp) |
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/* If this is a variant frag, we may need to adjust the existing
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reloc and generate a new one. */ |
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if (fixp->fx_frag->fr_opcode != NULL |
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&& (fixp->fx_r_type == BFD_RELOC_MIPS_GPREL |
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&& (fixp->fx_r_type == BFD_RELOC_GPREL16 |
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|| fixp->fx_r_type == BFD_RELOC_MIPS_GOT16 |
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|| fixp->fx_r_type == BFD_RELOC_MIPS_CALL16 |
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|| fixp->fx_r_type == BFD_RELOC_MIPS_GOT_HI16 |
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@ -12157,8 +12156,8 @@ tc_gen_reloc (section, fixp) |
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if (fixp->fx_next != NULL |
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&& fixp->fx_frag == fixp->fx_next->fx_frag) |
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{ |
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assert ((fixp->fx_r_type == BFD_RELOC_MIPS_GPREL |
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&& fixp->fx_next->fx_r_type == BFD_RELOC_MIPS_GPREL) |
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assert ((fixp->fx_r_type == BFD_RELOC_GPREL16 |
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&& fixp->fx_next->fx_r_type == BFD_RELOC_GPREL16) |
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|| (fixp->fx_r_type == BFD_RELOC_MIPS_GOT_HI16 |
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&& (fixp->fx_next->fx_r_type |
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== BFD_RELOC_MIPS_GOT_LO16)) |
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@ -12194,7 +12193,7 @@ tc_gen_reloc (section, fixp) |
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if (mips_pic == NO_PIC) |
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{ |
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assert (fixp->fx_r_type == BFD_RELOC_MIPS_GPREL); |
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assert (fixp->fx_r_type == BFD_RELOC_GPREL16); |
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fixp->fx_r_type = BFD_RELOC_HI16_S; |
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} |
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else if (mips_pic == SVR4_PIC) |
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