sim: frv: fix -Wunused-variable warnings

sim/frv/cache.c

@@ -517,7 +517,6 @@ frv_cache_write (FRV_CACHE *cache, SI address, char *data, unsigned length)
 
   /* See if this data is already in the cache.  */
   SIM_CPU *current_cpu = cache->cpu;
-  USI hsr0 = GET_HSR0 ();
   FRV_CACHE_TAG *tag;
   int found;
 
@@ -851,7 +850,7 @@ pipeline_requeue_request (FRV_CACHE_PIPELINE *p)
 static int
 next_priority (FRV_CACHE *cache, FRV_CACHE_PIPELINE *pipeline)
 {
-  int i, j;
+  int i;
   int pipe;
   int lowest = 0;
   FRV_CACHE_REQUEST *req;
@@ -1155,7 +1154,6 @@ address_interference (FRV_CACHE *cache, SI address, FRV_CACHE_REQUEST *req,
 static void
 wait_for_WAR (FRV_CACHE* cache, int pipe, FRV_CACHE_REQUEST *req)
 {
-  FRV_CACHE_WAR war;
   FRV_CACHE_PIPELINE *pipeline = & cache->pipeline[pipe];
 
   if (! cache->BARS.valid)
@@ -1286,7 +1284,6 @@ static void
 handle_req_preload (FRV_CACHE *cache, int pipe, FRV_CACHE_REQUEST *req)
 {
   int found;
-  FRV_CACHE_WAR war;
   FRV_CACHE_TAG *tag;
   int length;
   int lock;
@@ -1462,7 +1459,6 @@ handle_req_unlock (FRV_CACHE *cache, int pipe, FRV_CACHE_REQUEST *req)
 static void
 handle_req_WAR (FRV_CACHE *cache, int pipe, FRV_CACHE_REQUEST *req)
 {
-  char *buffer;
   FRV_CACHE_TAG *tag;
   SI address = req->address;
 

sim/frv/frv.c

@@ -656,8 +656,6 @@ spr_ccr_get_handler (SIM_CPU *current_cpu)
 void
 spr_ccr_set_handler (SIM_CPU *current_cpu, USI newval)
 {
-  int ccr = newval;
-
   SET_H_ICCR (H_ICCR_ICC3, (newval >> 28) & 0xf);
   SET_H_ICCR (H_ICCR_ICC2, (newval >> 24) & 0xf);
   SET_H_ICCR (H_ICCR_ICC1, (newval >> 20) & 0xf);
@@ -715,8 +713,6 @@ spr_cccr_get_handler (SIM_CPU *current_cpu)
 void
 spr_cccr_set_handler (SIM_CPU *current_cpu, USI newval)
 {
-  int cccr = newval;
-
   SET_H_CCCR (H_CCCR_CC7, (newval >> 14) & 0x3);
   SET_H_CCCR (H_CCCR_CC6, (newval >> 12) & 0x3);
   SET_H_CCCR (H_CCCR_CC5, (newval >> 10) & 0x3);

sim/frv/interrupts.c

@@ -390,7 +390,6 @@ frv_detect_insn_access_interrupts (SIM_CPU *current_cpu, SCACHE *sc)
 {
 
   const CGEN_INSN *insn = sc->argbuf.idesc->idata;
-  SIM_DESC sd = CPU_STATE (current_cpu);
   FRV_VLIW *vliw = CPU_VLIW (current_cpu);
 
   /* Check for vliw constraints.  */
@@ -431,6 +430,7 @@ frv_detect_insn_access_interrupts (SIM_CPU *current_cpu, SCACHE *sc)
       /* Enter the halt state if FSR0.QNE is set and we are executing a
 	 floating point insn, a media insn or an insn which access a FR
 	 register.  */
+      SIM_DESC sd = CPU_STATE (current_cpu);
       SI fsr0 = GET_FSR (0);
       if (GET_FSR_QNE (fsr0)
 	  && (frv_is_float_insn (insn) || frv_is_media_insn (insn)
@@ -808,7 +808,6 @@ set_exception_status_registers (
 )
 {
   struct frv_interrupt *interrupt = & frv_interrupt_table[item->kind];
-  int slot = (item->vpc - previous_vliw_pc) / 4;
   int reg_index = -1;
   int set_ear = 0;
   int set_edr = 0;

sim/frv/mloop.in

@@ -139,7 +139,6 @@ static void
 {
   int i;
 
-  FRV_VLIW *vliw = CPU_VLIW (current_cpu);
   CGEN_WRITE_QUEUE *q = CPU_WRITE_QUEUE (current_cpu);
 
   /* Loop over the queued writes, executing them. Set the pc to the address

sim/frv/profile-fr500.c

@@ -2043,11 +2043,8 @@ frvbf_model_fr500_u_media (SIM_CPU *cpu, const IDESC *idesc,
 {
   int cycles;
   FRV_PROFILE_STATE *ps;
-  int is_media_s1;
-  int is_media_s2;
   int busy_adjustment[] = {0, 0, 0};
   int *fr;
-  int *acc;
 
   if (model_insn == FRV_INSN_MODEL_PASS_1)
     return 0;

sim/frv/traps.c

@@ -172,7 +172,7 @@ frv_itrap (SIM_CPU *current_cpu, PCADDR pc, USI base, SI offset)
 #if TRAPDUMP || (defined (TRAP_REGDUMP1)) || (defined (TRAP_REGDUMP2))
       {
 	char buf[256];
-	int i, j;
+	int i;
 
 	buf[0] = 0;
 	if (STATE_TEXT_SECTION (sd)
@@ -824,7 +824,6 @@ clear_ne_flags (
 )
 {
   SI NE_flags[2];
-  int exception;
 
   GET_NE_FLAGS (NE_flags, NE_base);
   if (target_index >= 0)
@@ -857,7 +856,6 @@ frvbf_clear_ne_flags (SIM_CPU *current_cpu, SI target_index, BI is_float)
 {
   int hi_available;
   int lo_available;
-  int exception;
   SI NE_base;
   USI necr;
   FRV_REGISTER_CONTROL *control;
@@ -897,7 +895,6 @@ frvbf_commit (SIM_CPU *current_cpu, SI target_index, BI is_float)
   SI NE_base;
   SI NE_flags[2];
   BI NE_flag;
-  int exception;
   int hi_available;
   int lo_available;
   USI necr;