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S/390: Fix instruction types of csdtr and csxtr 

opcodes/ChangeLog:

2017-05-30  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>

	* s390-opc.c: Add new instruction types RRF_0URF and RRF_0UREFE.
	* s390-opc.txt: Fix instruction typs of csdtr and csxtr.

gas/ChangeLog:

2017-05-30  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>

	* testsuite/gas/s390/zarch-z9-ec.d: Adjust csdtr and csxtr.
	* testsuite/gas/s390/zarch-z9-ec.s: Likewise.
binutils-2_29-branch
Andreas Krebbel 9 years ago
parent
67aa8be4cb
commit
ca87ae741f
4 changed files with 10 additions and 6 deletions
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  1. 4
      gas/testsuite/gas/s390/zarch-z9-ec.d
  2. 4
      gas/testsuite/gas/s390/zarch-z9-ec.s
  3. 4
      opcodes/s390-opc.c
  4. 4
      opcodes/s390-opc.txt

4
gas/testsuite/gas/s390/zarch-z9-ec.d
View File

@ -28,8 +28,8 @@ Disassembly of section .text:
.*: b3 fa 00 12 [ ]*cxutr %f1,%r2
.*: b3 e1 10 26 [ ]*cgdtr %r2,1,%f6
.*: b3 e9 10 21 [ ]*cgxtr %r2,1,%f1
.*: b3 e3 00 26 [ ]*csdtr %r2,%f6
.*: b3 eb 00 21 [ ]*csxtr %r2,%f1
.*: b3 e3 0d 63 [ ]*csdtr %r6,%f3,13
.*: b3 eb 0d 61 [ ]*csxtr %r6,%f1,13
.*: b3 e2 00 26 [ ]*cudtr %r2,%f6
.*: b3 ea 00 21 [ ]*cuxtr %r2,%f1
.*: b3 d1 40 62 [ ]*ddtr %f6,%f2,%f4

4
gas/testsuite/gas/s390/zarch-z9-ec.s
View File

@ -22,8 +22,8 @@ foo:
cxutr %f1,%r2
cgdtr %r2,1,%f6
cgxtr %r2,1,%f1
csdtr %r2,%f6
csxtr %r2,%f1
csdtr %r6,%f3,13
csxtr %r6,%f1,13
cudtr %r2,%f6
cuxtr %r2,%f1
ddtr %f6,%f2,%f4

4
opcodes/s390-opc.c
View File

@ -374,6 +374,8 @@ const struct s390_operand s390_operands[] =
#define INSTR_RRF_U0RER 4, { RE_24,R_28,U4_16,0,0,0 } /* e.g. trte */
#define INSTR_RRF_U0RERE 4, { RE_24,RE_28,U4_16,0,0,0 } /* e.g. cu24 */
#define INSTR_RRF_00RR 4, { R_24,R_28,0,0,0,0 } /* e.g. clrtne */
#define INSTR_RRF_0URF 4, { R_24,F_28,U4_20,0,0,0 } /* e.g. csdtr */
#define INSTR_RRF_0UREFE 4, { RE_24,FE_28,U4_20,0,0,0 } /* e.g. csxtr */
#define INSTR_RRF_UUFR 4, { F_24,U4_16,R_28,U4_20,0,0 } /* e.g. cdgtra */
#define INSTR_RRF_UUFER 4, { FE_24,U4_16,R_28,U4_20,0,0 } /* e.g. cxfbra */
#define INSTR_RRF_UURF 4, { R_24,U4_16,F_28,U4_20,0,0 } /* e.g. cgdtra */
@ -590,6 +592,8 @@ const struct s390_operand s390_operands[] =
#define MASK_RRF_U0RER { 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00 }
#define MASK_RRF_U0RERE { 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00 }
#define MASK_RRF_00RR { 0xff, 0xff, 0xff, 0x00, 0x00, 0x00 }
#define MASK_RRF_0URF { 0xff, 0xff, 0xf0, 0x00, 0x00, 0x00 }
#define MASK_RRF_0UREFE { 0xff, 0xff, 0xf0, 0x00, 0x00, 0x00 }
#define MASK_RRF_UUFR { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
#define MASK_RRF_UUFER { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
#define MASK_RRF_UURF { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }

4
opcodes/s390-opc.txt
View File

@ -817,8 +817,8 @@ b3f2 cdutr RRE_FR "convert from unsigned bcd to long dfp" z9-ec zarch
b3fa cxutr RRE_FER "convert from unsigned bcd to extended dfp" z9-ec zarch
b3e1 cgdtr RRF_U0RF "convert from long dfp to fixed" z9-ec zarch
b3e9 cgxtr RRF_U0RFE "convert from extended dfp to fixed" z9-ec zarch
b3e3 csdtr RRE_RF "convert from long dfp to signed bcd" z9-ec zarch
b3eb csxtr RRE_RFE "convert from extended dfp to signed bcd" z9-ec zarch
b3e3 csdtr RRF_0URF "convert from long dfp to signed bcd" z9-ec zarch
b3eb csxtr RRF_0UREFE "convert from extended dfp to signed bcd" z9-ec zarch
b3e2 cudtr RRE_RF "convert from long dfp to unsigned bcd" z9-ec zarch
b3ea cuxtr RRE_RFE "convert from extended dfp to unsigned bcd" z9-ec zarch
b3d1 ddtr RRR_F0FF "divide long dfp" z9-ec zarch

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