Browse Source
* Makefile.am (ALL_MACHINES): Add cpu-rx.lo.
(ALL_MACHINES_CFILES): Add cpu-rx.c.
(BFD32_BACKENDS): Add elf32-rx.lo.
(BFD32_BACKENDS_CFILES): Add elf32-rx.c.
* archures.c (bfd_architecture): Add bfd_arch_rx and bfd_mach_rx.
Export bfd_rx_arch.
(bfd_archures_list): Add bfd_rx_arch.
* config.bfd: Add entry for rx-*-elf.
* configure.in: Add entries for bfd_elf32_rx_le_vec and
bfd_elf32_rx_be_vec.
* reloc.c: Add RX relocations.
* targets.c: Add RX target vectors.
* Makefile.in: Regenerate.
* bfd-in2.h: Regenerate.
* configure: Regenerate.
* libbfd.h: Regenerate.
* cpu-rx.c: New file.
* elf32-rx.c: New file.
binutils
* readelf.c: Add support for RX target.
* MAINTAINERS: Add DJ and NickC as maintainers for RX.
gas
* Makefile.am: Add RX target.
* configure.in: Likewise.
* configure.tgt: Likewise.
* read.c (do_repeat_with_expander): New function.
* read.h: Provide a prototype for do_repeat_with_expander.
* doc/Makefile.am: Add RX target documentation.
* doc/all.texi: Likewise.
* doc/as.texinfo: Likewise.
* Makefile.in: Regenerate.
* NEWS: Mention support for RX architecture.
* configure: Regenerate.
* doc/Makefile.in: Regenerate.
* config/rx-defs.h: New file.
* config/rx-parse.y: New file.
* config/tc-rx.h: New file.
* config/tc-rx.c: New file.
* doc/c-rx.texi: New file.
gas/testsuite
* gas/rx: New directory.
* gas/rx/*: New set of test cases.
* gas/elf/section2.e-rx: New expected output file.
* gas/all/gas.exp: Add support for RX target.
* gas/elf/elf.exp: Likewise.
* gas/lns/lns.exp: Likewise.
* gas/macros/macros.exp: Likewise.
include
* dis-asm.h: Add prototype for print_insn_rx.
include/elf
* rx.h: New file.
include/opcode
* rx.h: New file.
ld
* Makefile.am: Add rules to build RX emulation.
* configure.tgt: Likewise.
* NEWS: Mention support for RX architecture.
* Makefile.in: Regenerate.
* emulparams/elf32rx.sh: New file.
* emultempl/rxelf.em: New file.
opcodes
* Makefile.am: Add RX files.
* configure.in: Add support for RX target.
* disassemble.c: Likewise.
* Makefile.in: Regenerate.
* configure: Regenerate.
* opc2c.c: New file.
* rx-decode.c: New file.
* rx-decode.opc: New file.
* rx-dis.c: New file.
gdb_7_1-branch
Nick Clifton
17 years ago
266 changed files with 30415 additions and 7 deletions
@ -0,0 +1,57 @@ |
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/* BFD support for the RX processor.
|
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Copyright (C) 2008, 2009 Free Software Foundation, Inc. |
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|
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This file is part of BFD, the Binary File Descriptor library. |
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|
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This program is free software; you can redistribute it and/or modify |
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it under the terms of the GNU General Public License as published by |
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the Free Software Foundation; either version 3 of the License, or |
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(at your option) any later version. |
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|
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This program is distributed in the hope that it will be useful, |
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but WITHOUT ANY WARRANTY; without even the implied warranty of |
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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GNU General Public License for more details. |
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|
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You should have received a copy of the GNU General Public License |
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along with this program; if not, write to the Free Software |
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Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, |
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MA 02110-1301, USA. */ |
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|
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#include "sysdep.h" |
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#include "bfd.h" |
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#include "libbfd.h" |
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|
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static const bfd_arch_info_type arch_info_struct[] = |
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{ |
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{ |
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32, /* Bits per word. */ |
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32, /* Bits per address. */ |
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8, /* Bits per byte. */ |
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bfd_arch_rx, /* Architecture. */ |
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bfd_mach_rx, /* Machine. */ |
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"rx", /* Architecture name. */ |
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"rx", /* Printable name. */ |
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3, /* Section align power. */ |
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FALSE, /* The default ? */ |
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bfd_default_compatible, /* Architecture comparison fn. */ |
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bfd_default_scan, /* String to architecture convert fn. */ |
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NULL /* Next in list. */ |
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}, |
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}; |
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|
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const bfd_arch_info_type bfd_rx_arch = |
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{ |
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32, /* Bits per word. */ |
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32, /* Bits per address. */ |
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8, /* Bits per byte. */ |
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bfd_arch_rx, /* Architecture. */ |
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bfd_mach_rx, /* Machine. */ |
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"rx", /* Architecture name. */ |
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"rx", /* Printable name. */ |
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4, /* Section align power. */ |
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TRUE, /* The default ? */ |
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bfd_default_compatible, /* Architecture comparison fn. */ |
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bfd_default_scan, /* String to architecture convert fn. */ |
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& arch_info_struct[0], /* Next in list. */ |
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}; |
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File diff suppressed because it is too large
@ -0,0 +1,57 @@ |
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/* rx-defs.h Renesas RX internal definitions
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Copyright 2008, 2009 |
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Free Software Foundation, Inc. |
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This file is part of GAS, the GNU Assembler. |
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|
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GAS is free software; you can redistribute it and/or modify |
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it under the terms of the GNU General Public License as published by |
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the Free Software Foundation; either version 3, or (at your option) |
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any later version. |
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|
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GAS is distributed in the hope that it will be useful, |
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but WITHOUT ANY WARRANTY; without even the implied warranty of |
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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GNU General Public License for more details. |
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|
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You should have received a copy of the GNU General Public License |
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along with GAS; see the file COPYING. If not, write to the Free |
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Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA |
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02110-1301, USA. */ |
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|
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#ifndef RX_DEFS_H |
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#define RX_DEFS_H |
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|
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/* Third operand to rx_op. */ |
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#define RXREL_SIGNED 0 |
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#define RXREL_UNSIGNED 1 |
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#define RXREL_NEGATIVE 2 |
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#define RXREL_PCREL 3 |
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#define RXREL_NEGATIVE_BORROW 4 |
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|
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#define RX_RELAX_NONE 0 |
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#define RX_RELAX_BRANCH 1 |
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#define RX_RELAX_IMM 2 |
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#define RX_RELAX_DISP 3 |
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|
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extern int rx_error (char *); |
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extern void rx_lex_init (char *, char *); |
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extern void rx_base1 (int); |
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extern void rx_base2 (int, int); |
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extern void rx_base3 (int, int, int); |
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extern void rx_base4 (int, int, int, int); |
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extern void rx_field (int, int, int); |
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extern void rx_op (expressionS, int, int); |
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extern void rx_disp3 (expressionS, int); |
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extern void rx_field5s (expressionS); |
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extern void rx_field5s2 (expressionS); |
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extern void rx_relax (int, int); |
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extern void rx_linkrelax_dsp (int); |
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extern void rx_linkrelax_imm (int); |
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extern void rx_linkrelax_branch (void); |
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extern int rx_parse (void); |
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extern int rx_wrap (void); |
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|
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extern char * rx_lex_start; |
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extern char * rx_lex_end; |
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#endif |
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File diff suppressed because it is too large
File diff suppressed because it is too large
@ -0,0 +1,93 @@ |
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/* tc-rx.h - header file for Renesas RX
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Copyright 2008, 2009 |
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Free Software Foundation, Inc. |
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This file is part of GAS, the GNU Assembler. |
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|
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GAS is free software; you can redistribute it and/or modify |
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it under the terms of the GNU General Public License as published by |
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the Free Software Foundation; either version 3, or (at your option) |
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any later version. |
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|
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GAS is distributed in the hope that it will be useful, |
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but WITHOUT ANY WARRANTY; without even the implied warranty of |
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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GNU General Public License for more details. |
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|
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You should have received a copy of the GNU General Public License |
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along with GAS; see the file COPYING. If not, write to the Free |
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Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA |
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02110-1301, USA. */ |
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|
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#define TC_RX |
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extern int target_big_endian; |
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#define LISTING_HEADER (target_big_endian ? "RX GAS BE" : "RX GAS LE") |
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#define LISTING_LHS_WIDTH 8 |
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#define LISTING_WORD_SIZE 1 |
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#define TARGET_ARCH bfd_arch_rx |
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|
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/* Instruction bytes are big endian, data bytes can be either. */ |
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#define TARGET_BYTES_BIG_ENDIAN 0 |
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#define TARGET_FORMAT (target_big_endian ? "elf32-rx-be" : "elf32-rx-le") |
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/* We don't need to handle .word strangely. */ |
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#define WORKING_DOT_WORD |
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|
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/* Permit temporary numeric labels. */ |
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#define LOCAL_LABELS_FB 1 |
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/* But make sure that the binutils treat them as locals. */ |
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#define LOCAL_LABEL_PREFIX '.' |
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|
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/* Allow classic-style constants. */ |
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#define NUMBERS_WITH_SUFFIX 1 |
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|
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/* .-foo gets turned into PC relative relocs. */ |
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#define DIFF_EXPR_OK |
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|
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#define md_end rx_md_end |
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extern void rx_md_end (void); |
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#define md_relax_frag rx_relax_frag |
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extern int rx_relax_frag (segT, fragS *, long); |
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|
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#define TC_FRAG_TYPE struct rx_bytesT * |
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#define TC_FRAG_INIT rx_frag_init |
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extern void rx_frag_init (fragS *); |
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|
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/* Call md_pcrel_from_section(), not md_pcrel_from(). */ |
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#define MD_PCREL_FROM_SECTION(FIXP, SEC) md_pcrel_from_section (FIXP, SEC) |
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extern long md_pcrel_from_section (struct fix *, segT); |
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/* RX doesn't have a 32 bit PCREL relocations. */ |
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#define TC_FORCE_RELOCATION_SUB_LOCAL(FIX, SEG) 1 |
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#define TC_VALIDATE_FIX_SUB(FIX, SEG) \ |
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rx_validate_fix_sub (FIX) |
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extern int rx_validate_fix_sub (struct fix *); |
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#define TC_CONS_FIX_NEW(FRAG, WHERE, NBYTES, EXP) \ |
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rx_cons_fix_new (FRAG, WHERE, NBYTES, EXP) |
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extern void rx_cons_fix_new (fragS *, int, int, expressionS *); |
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#define tc_fix_adjustable(x) 0 |
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#define HANDLE_ALIGN(FRAG) rx_handle_align (FRAG) |
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extern void rx_handle_align (fragS *); |
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#define RELOC_EXPANSION_POSSIBLE 1 |
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#define MAX_RELOC_EXPANSION 4 |
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|
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#define elf_tc_final_processing rx_elf_final_processing |
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extern void rx_elf_final_processing (void); |
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extern bfd_boolean rx_use_conventional_section_names; |
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#define TEXT_SECTION_NAME (rx_use_conventional_section_names ? ".text" : "P") |
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#define DATA_SECTION_NAME (rx_use_conventional_section_names ? ".data" : "D_1") |
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#define BSS_SECTION_NAME (rx_use_conventional_section_names ? ".bss" : "B_1") |
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|
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#define md_start_line_hook rx_start_line |
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extern void rx_start_line (void); |
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@ -0,0 +1,145 @@ |
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@c Copyright 2008, 2009 |
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@c Free Software Foundation, Inc. |
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@c This is part of the GAS manual. |
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@c For copying conditions, see the file as.texinfo. |
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@ifset GENERIC |
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@page |
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@node RX-Dependent |
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@chapter RX Dependent Features |
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@end ifset |
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@ifclear GENERIC |
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@node Machine Dependencies |
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@chapter RX Dependent Features |
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@end ifclear |
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@cindex RX support |
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@menu |
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* RX-Opts:: RX Assembler Command Line Options |
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* RX-Modifiers:: Symbolic Operand Modifiers |
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* RX-Directives:: Assembler Directives |
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* RX-Float:: Floating Point |
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@end menu |
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@node RX-Opts |
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@section RX Options |
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@cindex options, RX |
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@cindex RX options |
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|
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The Renesas RX port of @code{@value{AS}} has a few target specfic |
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command line options: |
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@table @code |
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@cindex @samp{-m32bit-doubles} |
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@item -m32bit-doubles |
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This option controls the ABI and indicates to use a 32-bit float ABI. |
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It has no effect on the assembled instructions, but it does influence |
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the behaviour of the @samp{.double} pseudo-op. |
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This is the default. |
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@cindex @samp{-m64bit-doubles} |
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@item -m64bit-doubles |
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This option controls the ABI and indicates to use a 64-bit float ABI. |
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It has no effect on the assembled instructions, but it does influence |
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the behaviour of the @samp{.double} pseudo-op. |
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@cindex @samp{-mbig-endian} |
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@item -mbig-endian |
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This option controls the ABI and indicates to use a big-endian data |
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ABI. It has no effect on the assembled instructions, but it does |
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influence the behaviour of the @samp{.short}, @samp{.hword}, @samp{.int}, |
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@samp{.word}, @samp{.long}, @samp{.quad} and @samp{.octa} pseudo-ops. |
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|
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@cindex @samp{-mlittle-endian} |
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@item -mlittle-endian |
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This option controls the ABI and indicates to use a little-endian data |
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ABI. It has no effect on the assembled instructions, but it does |
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influence the behaviour of the @samp{.short}, @samp{.hword}, @samp{.int}, |
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@samp{.word}, @samp{.long}, @samp{.quad} and @samp{.octa} pseudo-ops. |
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This is the default. |
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@cindex @samp{-muse-conventional-section-names} |
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@item -muse-conventional-section-names |
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This option controls the default names given to the code (.text), |
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initialised data (.data) and uninitialised data sections (.bss). |
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|
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@cindex @samp{-muse-renesas-section-names} |
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@item -muse-renesas-section-names |
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This option controls the default names given to the code (.P), |
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initialised data (.D_1) and uninitialised data sections (.B_1). |
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This is the default. |
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@cindex @samp{-msmall-data-limit} |
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@item -msmall-data-limit |
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This option tells the assembler that the small data limit feature of |
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the RX port of GCC is being used. This results in the assembler |
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generating an undefined reference to a symbol called __gp for use by |
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the relocations that are needed to support the small data limit |
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feature. This option is not enabled by default as it would otherwise |
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pollute the symbol table. |
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@end table |
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@node RX-Modifiers |
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@section Symbolic Operand Modifiers |
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@cindex RX modifiers |
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@cindex syntax, RX |
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|
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The assembler supports several modifiers when using symbol addresses |
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in RX instruction operands. The general syntax is the following: |
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|
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@smallexample |
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%modifier(symbol) |
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@end smallexample |
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@table @code |
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@cindex symbol modifiers |
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@item %gp |
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@c FIXME: Add documentation here. |
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@end table |
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@node RX-Directives |
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@section Assembler Directives |
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@cindex assembler directives, RX |
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@cindex RX assembler directives |
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The RX version of @code{@value{AS}} has the following specific |
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assembler directives: |
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@table @code |
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@item .3byte |
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@cindex assembler directive .3byte, RX |
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@cindex RX assembler directive .3byte |
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Inserts a 3-byte value into the output file at the current location. |
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@end table |
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@node RX-Float |
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@section Floating Point |
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@cindex floating point, RX |
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@cindex RX floating point |
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The floating point formats generated by directives are these. |
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@table @code |
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@cindex @code{float} directive, RX |
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@item .float |
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@code{Single} precision (32-bit) floating point constants. |
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@cindex @code{double} directive, RX |
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@item .double |
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If the @option{-m64bit-doubles} command line option has been specified |
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then then @code{double} directive generates @code{double} precision |
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(64-bit) floating point constants, otherwise it generates |
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@code{single} precision (32-bit) floating point constants. To force |
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the generation of 64-bit floating point constants used the @code{dc.d} |
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directive instead. |
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@end table |
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@ -0,0 +1,9 @@ |
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|
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Symbol table '.symtab' contains . entries: |
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Num: Value[ ]* Size Type Bind Vis Ndx Name |
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0: 0+0 0 NOTYPE LOCAL DEFAULT UND |
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1: 0+0 0 SECTION LOCAL DEFAULT 1 |
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2: 0+0 0 SECTION LOCAL DEFAULT 2 |
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3: 0+0 0 SECTION LOCAL DEFAULT 3 |
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4: 0+0 0 SECTION LOCAL DEFAULT 4 |
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#... |
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@ -0,0 +1,14 @@ |
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#objdump: -dr |
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dump\.o: file format .* |
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Disassembly of section \.text: |
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00000000 <\.text>: |
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0: 7e 20 abs r0 |
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2: 7e 2f abs r15 |
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4: fc 0f 00 abs r0, r0 |
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7: fc 0f 0f abs r0, r15 |
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a: fc 0f f0 abs r15, r0 |
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d: fc 0f ff abs r15, r15 |
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@ -0,0 +1,2 @@ |
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abs {reg} |
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abs {reg},{reg} |
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@ -0,0 +1,40 @@ |
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#objdump: -dr |
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dump\.o: file format .* |
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Disassembly of section \.text: |
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|
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00000000 <\.text>: |
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0: fd 74 20 80 adc #-128, r0 |
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4: fd 74 2f 80 adc #-128, r15 |
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8: fd 74 20 7f adc #127, r0 |
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c: fd 74 2f 7f adc #127, r15 |
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10: fd 78 20 00 80 adc #0xffff8000, r0 |
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15: fd 78 2f 00 80 adc #0xffff8000, r15 |
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1a: fd 7c 20 00 80 00 adc #0x8000, r0 |
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20: fd 7c 2f 00 80 00 adc #0x8000, r15 |
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26: fd 7c 20 00 00 80 adc #0xff800000, r0 |
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2c: fd 7c 2f 00 00 80 adc #0xff800000, r15 |
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32: fd 7c 20 ff ff 7f adc #0x7fffff, r0 |
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38: fd 7c 2f ff ff 7f adc #0x7fffff, r15 |
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3e: fd 70 20 00 00 00 80 adc #0x80000000, r0 |
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45: fd 70 2f 00 00 00 80 adc #0x80000000, r15 |
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4c: fd 70 20 ff ff ff 7f adc #0x7fffffff, r0 |
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53: fd 70 2f ff ff ff 7f adc #0x7fffffff, r15 |
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5a: fc 0b 00 adc r0, r0 |
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5d: fc 0b 0f adc r0, r15 |
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60: fc 0b f0 adc r15, r0 |
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63: fc 0b ff adc r15, r15 |
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66: 06 a0 02 00 adc \[r0\]\.l, r0 |
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6a: 06 a0 02 0f adc \[r0\]\.l, r15 |
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6e: 06 a0 02 f0 adc \[r15\]\.l, r0 |
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72: 06 a0 02 ff adc \[r15\]\.l, r15 |
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76: 06 a1 02 00 3f adc 252\[r0\]\.l, r0 |
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7b: 06 a1 02 0f 3f adc 252\[r0\]\.l, r15 |
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80: 06 a1 02 f0 3f adc 252\[r15\]\.l, r0 |
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85: 06 a1 02 ff 3f adc 252\[r15\]\.l, r15 |
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8a: 06 a2 02 00 ff 3f adc 65532\[r0\]\.l, r0 |
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90: 06 a2 02 0f ff 3f adc 65532\[r0\]\.l, r15 |
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96: 06 a2 02 f0 ff 3f adc 65532\[r15\]\.l, r0 |
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9c: 06 a2 02 ff ff 3f adc 65532\[r15\]\.l, r15 |
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@ -0,0 +1,4 @@ |
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adc #{imm},{reg} |
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adc {reg},{reg} |
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adc {dsp}[{reg}].L,{reg} |
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|
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@ -0,0 +1,132 @@ |
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#objdump: -dr |
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|
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dump\.o: file format .* |
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|
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|
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Disassembly of section \.text: |
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|
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00000000 <\.text>: |
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0: 62 00 add #0, r0 |
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2: 62 0f add #0, r15 |
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4: 62 f0 add #15, r0 |
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6: 62 ff add #15, r15 |
|||
8: 71 00 80 add #-128, r0, r0 |
|||
b: 71 ff 80 add #-128, r15, r15 |
|||
e: 71 00 7f add #127, r0, r0 |
|||
11: 71 ff 7f add #127, r15, r15 |
|||
14: 72 00 00 80 add #0xffff8000, r0, r0 |
|||
18: 72 ff 00 80 add #0xffff8000, r15, r15 |
|||
1c: 73 00 00 80 00 add #0x8000, r0, r0 |
|||
21: 73 ff 00 80 00 add #0x8000, r15, r15 |
|||
26: 73 00 00 00 80 add #0xff800000, r0, r0 |
|||
2b: 73 ff 00 00 80 add #0xff800000, r15, r15 |
|||
30: 73 00 ff ff 7f add #0x7fffff, r0, r0 |
|||
35: 73 ff ff ff 7f add #0x7fffff, r15, r15 |
|||
3a: 70 00 00 00 00 80 add #0x80000000, r0, r0 |
|||
40: 70 ff 00 00 00 80 add #0x80000000, r15, r15 |
|||
46: 70 00 ff ff ff 7f add #0x7fffffff, r0, r0 |
|||
4c: 70 ff ff ff ff 7f add #0x7fffffff, r15, r15 |
|||
52: 4b 00 add r0, r0 |
|||
54: 4b 0f add r0, r15 |
|||
56: 4b f0 add r15, r0 |
|||
58: 4b ff add r15, r15 |
|||
5a: 48 00 add \[r0\]\.ub, r0 |
|||
5c: 48 0f add \[r0\]\.ub, r15 |
|||
5e: 06 08 00 add \[r0\]\.b, r0 |
|||
61: 06 08 0f add \[r0\]\.b, r15 |
|||
64: 06 c8 00 add \[r0\]\.uw, r0 |
|||
67: 06 c8 0f add \[r0\]\.uw, r15 |
|||
6a: 06 48 00 add \[r0\]\.w, r0 |
|||
6d: 06 48 0f add \[r0\]\.w, r15 |
|||
70: 06 88 00 add \[r0\]\.l, r0 |
|||
73: 06 88 0f add \[r0\]\.l, r15 |
|||
76: 48 f0 add \[r15\]\.ub, r0 |
|||
78: 48 ff add \[r15\]\.ub, r15 |
|||
7a: 06 08 f0 add \[r15\]\.b, r0 |
|||
7d: 06 08 ff add \[r15\]\.b, r15 |
|||
80: 06 c8 f0 add \[r15\]\.uw, r0 |
|||
83: 06 c8 ff add \[r15\]\.uw, r15 |
|||
86: 06 48 f0 add \[r15\]\.w, r0 |
|||
89: 06 48 ff add \[r15\]\.w, r15 |
|||
8c: 06 88 f0 add \[r15\]\.l, r0 |
|||
8f: 06 88 ff add \[r15\]\.l, r15 |
|||
92: 49 00 fc add 252\[r0\]\.ub, r0 |
|||
95: 49 0f fc add 252\[r0\]\.ub, r15 |
|||
98: 06 09 00 fc add 252\[r0\]\.b, r0 |
|||
9c: 06 09 0f fc add 252\[r0\]\.b, r15 |
|||
a0: 06 c9 00 7e add 252\[r0\]\.uw, r0 |
|||
a4: 06 c9 0f 7e add 252\[r0\]\.uw, r15 |
|||
a8: 06 49 00 7e add 252\[r0\]\.w, r0 |
|||
ac: 06 49 0f 7e add 252\[r0\]\.w, r15 |
|||
b0: 06 89 00 3f add 252\[r0\]\.l, r0 |
|||
b4: 06 89 0f 3f add 252\[r0\]\.l, r15 |
|||
b8: 49 f0 fc add 252\[r15\]\.ub, r0 |
|||
bb: 49 ff fc add 252\[r15\]\.ub, r15 |
|||
be: 06 09 f0 fc add 252\[r15\]\.b, r0 |
|||
c2: 06 09 ff fc add 252\[r15\]\.b, r15 |
|||
c6: 06 c9 f0 7e add 252\[r15\]\.uw, r0 |
|||
ca: 06 c9 ff 7e add 252\[r15\]\.uw, r15 |
|||
ce: 06 49 f0 7e add 252\[r15\]\.w, r0 |
|||
d2: 06 49 ff 7e add 252\[r15\]\.w, r15 |
|||
d6: 06 89 f0 3f add 252\[r15\]\.l, r0 |
|||
da: 06 89 ff 3f add 252\[r15\]\.l, r15 |
|||
de: 4a 00 fc ff add 65532\[r0\]\.ub, r0 |
|||
e2: 4a 0f fc ff add 65532\[r0\]\.ub, r15 |
|||
e6: 06 0a 00 fc ff add 65532\[r0\]\.b, r0 |
|||
eb: 06 0a 0f fc ff add 65532\[r0\]\.b, r15 |
|||
f0: 06 ca 00 fe 7f add 65532\[r0\]\.uw, r0 |
|||
f5: 06 ca 0f fe 7f add 65532\[r0\]\.uw, r15 |
|||
fa: 06 4a 00 fe 7f add 65532\[r0\]\.w, r0 |
|||
ff: 06 4a 0f fe 7f add 65532\[r0\]\.w, r15 |
|||
104: 06 8a 00 ff 3f add 65532\[r0\]\.l, r0 |
|||
109: 06 8a 0f ff 3f add 65532\[r0\]\.l, r15 |
|||
10e: 4a f0 fc ff add 65532\[r15\]\.ub, r0 |
|||
112: 4a ff fc ff add 65532\[r15\]\.ub, r15 |
|||
116: 06 0a f0 fc ff add 65532\[r15\]\.b, r0 |
|||
11b: 06 0a ff fc ff add 65532\[r15\]\.b, r15 |
|||
120: 06 ca f0 fe 7f add 65532\[r15\]\.uw, r0 |
|||
125: 06 ca ff fe 7f add 65532\[r15\]\.uw, r15 |
|||
12a: 06 4a f0 fe 7f add 65532\[r15\]\.w, r0 |
|||
12f: 06 4a ff fe 7f add 65532\[r15\]\.w, r15 |
|||
134: 06 8a f0 ff 3f add 65532\[r15\]\.l, r0 |
|||
139: 06 8a ff ff 3f add 65532\[r15\]\.l, r15 |
|||
13e: 71 00 80 add #-128, r0, r0 |
|||
141: 71 0f 80 add #-128, r0, r15 |
|||
144: 71 f0 80 add #-128, r15, r0 |
|||
147: 71 ff 80 add #-128, r15, r15 |
|||
14a: 71 00 7f add #127, r0, r0 |
|||
14d: 71 0f 7f add #127, r0, r15 |
|||
150: 71 f0 7f add #127, r15, r0 |
|||
153: 71 ff 7f add #127, r15, r15 |
|||
156: 72 00 00 80 add #0xffff8000, r0, r0 |
|||
15a: 72 0f 00 80 add #0xffff8000, r0, r15 |
|||
15e: 72 f0 00 80 add #0xffff8000, r15, r0 |
|||
162: 72 ff 00 80 add #0xffff8000, r15, r15 |
|||
166: 73 00 00 80 00 add #0x8000, r0, r0 |
|||
16b: 73 0f 00 80 00 add #0x8000, r0, r15 |
|||
170: 73 f0 00 80 00 add #0x8000, r15, r0 |
|||
175: 73 ff 00 80 00 add #0x8000, r15, r15 |
|||
17a: 73 00 00 00 80 add #0xff800000, r0, r0 |
|||
17f: 73 0f 00 00 80 add #0xff800000, r0, r15 |
|||
184: 73 f0 00 00 80 add #0xff800000, r15, r0 |
|||
189: 73 ff 00 00 80 add #0xff800000, r15, r15 |
|||
18e: 73 00 ff ff 7f add #0x7fffff, r0, r0 |
|||
193: 73 0f ff ff 7f add #0x7fffff, r0, r15 |
|||
198: 73 f0 ff ff 7f add #0x7fffff, r15, r0 |
|||
19d: 73 ff ff ff 7f add #0x7fffff, r15, r15 |
|||
1a2: 70 00 00 00 00 80 add #0x80000000, r0, r0 |
|||
1a8: 70 0f 00 00 00 80 add #0x80000000, r0, r15 |
|||
1ae: 70 f0 00 00 00 80 add #0x80000000, r15, r0 |
|||
1b4: 70 ff 00 00 00 80 add #0x80000000, r15, r15 |
|||
1ba: 70 00 ff ff ff 7f add #0x7fffffff, r0, r0 |
|||
1c0: 70 0f ff ff ff 7f add #0x7fffffff, r0, r15 |
|||
1c6: 70 f0 ff ff ff 7f add #0x7fffffff, r15, r0 |
|||
1cc: 70 ff ff ff ff 7f add #0x7fffffff, r15, r15 |
|||
1d2: ff 20 00 add r0, r0, r0 |
|||
1d5: ff 2f 00 add r0, r0, r15 |
|||
1d8: ff 20 0f add r0, r15, r0 |
|||
1db: ff 2f 0f add r0, r15, r15 |
|||
1de: ff 20 f0 add r15, r0, r0 |
|||
1e1: ff 2f f0 add r15, r0, r15 |
|||
1e4: ff 20 ff add r15, r15, r0 |
|||
1e7: ff 2f ff add r15, r15, r15 |
|||
@ -0,0 +1,8 @@ |
|||
add #{uimm4},{reg} |
|||
add #{imm},{reg} |
|||
|
|||
add {reg},{reg} |
|||
add {memx},{reg} |
|||
|
|||
add #{imm},{reg},{reg} |
|||
add {reg},{reg},{reg} |
|||
@ -0,0 +1,100 @@ |
|||
#objdump: -dr |
|||
|
|||
dump\.o: file format .* |
|||
|
|||
|
|||
Disassembly of section \.text: |
|||
|
|||
00000000 <\.text>: |
|||
0: 64 00 and #0, r0 |
|||
2: 64 0f and #0, r15 |
|||
4: 64 f0 and #15, r0 |
|||
6: 64 ff and #15, r15 |
|||
8: 75 20 80 and #-128, r0 |
|||
b: 75 2f 80 and #-128, r15 |
|||
e: 75 20 7f and #127, r0 |
|||
11: 75 2f 7f and #127, r15 |
|||
14: 76 20 00 80 and #0xffff8000, r0 |
|||
18: 76 2f 00 80 and #0xffff8000, r15 |
|||
1c: 77 20 00 80 00 and #0x8000, r0 |
|||
21: 77 2f 00 80 00 and #0x8000, r15 |
|||
26: 77 20 00 00 80 and #0xff800000, r0 |
|||
2b: 77 2f 00 00 80 and #0xff800000, r15 |
|||
30: 77 20 ff ff 7f and #0x7fffff, r0 |
|||
35: 77 2f ff ff 7f and #0x7fffff, r15 |
|||
3a: 74 20 00 00 00 80 and #0x80000000, r0 |
|||
40: 74 2f 00 00 00 80 and #0x80000000, r15 |
|||
46: 74 20 ff ff ff 7f and #0x7fffffff, r0 |
|||
4c: 74 2f ff ff ff 7f and #0x7fffffff, r15 |
|||
52: 53 00 and r0, r0 |
|||
54: 53 0f and r0, r15 |
|||
56: 53 f0 and r15, r0 |
|||
58: 53 ff and r15, r15 |
|||
5a: 50 00 and \[r0\]\.ub, r0 |
|||
5c: 50 0f and \[r0\]\.ub, r15 |
|||
5e: 06 10 00 and \[r0\]\.b, r0 |
|||
61: 06 10 0f and \[r0\]\.b, r15 |
|||
64: 06 d0 00 and \[r0\]\.uw, r0 |
|||
67: 06 d0 0f and \[r0\]\.uw, r15 |
|||
6a: 06 50 00 and \[r0\]\.w, r0 |
|||
6d: 06 50 0f and \[r0\]\.w, r15 |
|||
70: 06 90 00 and \[r0\]\.l, r0 |
|||
73: 06 90 0f and \[r0\]\.l, r15 |
|||
76: 50 f0 and \[r15\]\.ub, r0 |
|||
78: 50 ff and \[r15\]\.ub, r15 |
|||
7a: 06 10 f0 and \[r15\]\.b, r0 |
|||
7d: 06 10 ff and \[r15\]\.b, r15 |
|||
80: 06 d0 f0 and \[r15\]\.uw, r0 |
|||
83: 06 d0 ff and \[r15\]\.uw, r15 |
|||
86: 06 50 f0 and \[r15\]\.w, r0 |
|||
89: 06 50 ff and \[r15\]\.w, r15 |
|||
8c: 06 90 f0 and \[r15\]\.l, r0 |
|||
8f: 06 90 ff and \[r15\]\.l, r15 |
|||
92: 51 00 fc and 252\[r0\]\.ub, r0 |
|||
95: 51 0f fc and 252\[r0\]\.ub, r15 |
|||
98: 06 11 00 fc and 252\[r0\]\.b, r0 |
|||
9c: 06 11 0f fc and 252\[r0\]\.b, r15 |
|||
a0: 06 d1 00 7e and 252\[r0\]\.uw, r0 |
|||
a4: 06 d1 0f 7e and 252\[r0\]\.uw, r15 |
|||
a8: 06 51 00 7e and 252\[r0\]\.w, r0 |
|||
ac: 06 51 0f 7e and 252\[r0\]\.w, r15 |
|||
b0: 06 91 00 3f and 252\[r0\]\.l, r0 |
|||
b4: 06 91 0f 3f and 252\[r0\]\.l, r15 |
|||
b8: 51 f0 fc and 252\[r15\]\.ub, r0 |
|||
bb: 51 ff fc and 252\[r15\]\.ub, r15 |
|||
be: 06 11 f0 fc and 252\[r15\]\.b, r0 |
|||
c2: 06 11 ff fc and 252\[r15\]\.b, r15 |
|||
c6: 06 d1 f0 7e and 252\[r15\]\.uw, r0 |
|||
ca: 06 d1 ff 7e and 252\[r15\]\.uw, r15 |
|||
ce: 06 51 f0 7e and 252\[r15\]\.w, r0 |
|||
d2: 06 51 ff 7e and 252\[r15\]\.w, r15 |
|||
d6: 06 91 f0 3f and 252\[r15\]\.l, r0 |
|||
da: 06 91 ff 3f and 252\[r15\]\.l, r15 |
|||
de: 52 00 fc ff and 65532\[r0\]\.ub, r0 |
|||
e2: 52 0f fc ff and 65532\[r0\]\.ub, r15 |
|||
e6: 06 12 00 fc ff and 65532\[r0\]\.b, r0 |
|||
eb: 06 12 0f fc ff and 65532\[r0\]\.b, r15 |
|||
f0: 06 d2 00 fe 7f and 65532\[r0\]\.uw, r0 |
|||
f5: 06 d2 0f fe 7f and 65532\[r0\]\.uw, r15 |
|||
fa: 06 52 00 fe 7f and 65532\[r0\]\.w, r0 |
|||
ff: 06 52 0f fe 7f and 65532\[r0\]\.w, r15 |
|||
104: 06 92 00 ff 3f and 65532\[r0\]\.l, r0 |
|||
109: 06 92 0f ff 3f and 65532\[r0\]\.l, r15 |
|||
10e: 52 f0 fc ff and 65532\[r15\]\.ub, r0 |
|||
112: 52 ff fc ff and 65532\[r15\]\.ub, r15 |
|||
116: 06 12 f0 fc ff and 65532\[r15\]\.b, r0 |
|||
11b: 06 12 ff fc ff and 65532\[r15\]\.b, r15 |
|||
120: 06 d2 f0 fe 7f and 65532\[r15\]\.uw, r0 |
|||
125: 06 d2 ff fe 7f and 65532\[r15\]\.uw, r15 |
|||
12a: 06 52 f0 fe 7f and 65532\[r15\]\.w, r0 |
|||
12f: 06 52 ff fe 7f and 65532\[r15\]\.w, r15 |
|||
134: 06 92 f0 ff 3f and 65532\[r15\]\.l, r0 |
|||
139: 06 92 ff ff 3f and 65532\[r15\]\.l, r15 |
|||
13e: ff 40 00 and r0, r0, r0 |
|||
141: ff 4f 00 and r0, r0, r15 |
|||
144: ff 40 0f and r0, r15, r0 |
|||
147: ff 4f 0f and r0, r15, r15 |
|||
14a: ff 40 f0 and r15, r0, r0 |
|||
14d: ff 4f f0 and r15, r0, r15 |
|||
150: ff 40 ff and r15, r15, r0 |
|||
153: ff 4f ff and r15, r15, r15 |
|||
@ -0,0 +1,7 @@ |
|||
and #{uimm4},{reg} |
|||
and #{imm},{reg} |
|||
|
|||
and {reg},{reg} |
|||
and {memx},{reg} |
|||
|
|||
and {reg},{reg},{reg} |
|||
@ -0,0 +1,40 @@ |
|||
#objdump: -dr |
|||
|
|||
dump\.o: file format .* |
|||
|
|||
|
|||
Disassembly of section \.text: |
|||
|
|||
00000000 <\.text>: |
|||
0: f0 08 bclr #0, \[r0\]\.b |
|||
2: f0 f8 bclr #0, \[r15\]\.b |
|||
4: f1 08 fc bclr #0, 252\[r0\]\.b |
|||
7: f1 f8 fc bclr #0, 252\[r15\]\.b |
|||
a: f2 08 fc ff bclr #0, 65532\[r0\]\.b |
|||
e: f2 f8 fc ff bclr #0, 65532\[r15\]\.b |
|||
12: f0 0f bclr #7, \[r0\]\.b |
|||
14: f0 ff bclr #7, \[r15\]\.b |
|||
16: f1 0f fc bclr #7, 252\[r0\]\.b |
|||
19: f1 ff fc bclr #7, 252\[r15\]\.b |
|||
1c: f2 0f fc ff bclr #7, 65532\[r0\]\.b |
|||
20: f2 ff fc ff bclr #7, 65532\[r15\]\.b |
|||
24: fc 64 00 bclr r0, \[r0\]\.b |
|||
27: fc 64 f0 bclr r0, \[r15\]\.b |
|||
2a: fc 65 00 fc bclr r0, 252\[r0\]\.b |
|||
2e: fc 65 f0 fc bclr r0, 252\[r15\]\.b |
|||
32: fc 66 00 fc ff bclr r0, 65532\[r0\]\.b |
|||
37: fc 66 f0 fc ff bclr r0, 65532\[r15\]\.b |
|||
3c: fc 64 0f bclr r15, \[r0\]\.b |
|||
3f: fc 64 ff bclr r15, \[r15\]\.b |
|||
42: fc 65 0f fc bclr r15, 252\[r0\]\.b |
|||
46: fc 65 ff fc bclr r15, 252\[r15\]\.b |
|||
4a: fc 66 0f fc ff bclr r15, 65532\[r0\]\.b |
|||
4f: fc 66 ff fc ff bclr r15, 65532\[r15\]\.b |
|||
54: 7a 00 bclr #0, r0 |
|||
56: 7a 0f bclr #0, r15 |
|||
58: 7b f0 bclr #31, r0 |
|||
5a: 7b ff bclr #31, r15 |
|||
5c: fc 67 00 bclr r0, r0 |
|||
5f: fc 67 f0 bclr r0, r15 |
|||
62: fc 67 0f bclr r15, r0 |
|||
65: fc 67 ff bclr r15, r15 |
|||
@ -0,0 +1,5 @@ |
|||
bclr #{uimm3}, {dsp}[{reg}].B |
|||
bclr {reg}, {dsp}[{reg}].B |
|||
|
|||
bclr #{uimm5}, {reg} |
|||
bclr {reg}, {reg} |
|||
@ -0,0 +1,104 @@ |
|||
#objdump: -dr |
|||
|
|||
dump\.o: file format .* |
|||
|
|||
|
|||
Disassembly of section \.text: |
|||
|
|||
00000000 <\.text>: |
|||
0: 13 beq\.s 0x3 |
|||
1: 12 beq\.s 0xb |
|||
2: 10 beq\.s 0xa |
|||
2: R_RX_DIR3U_PCREL foo |
|||
3: 1b bne\.s 0x6 |
|||
4: 1a bne\.s 0xe |
|||
5: 18 bne\.s 0xd |
|||
5: R_RX_DIR3U_PCREL foo |
|||
6: 22 80 bc\.b 0xffffff86 |
|||
8: 22 7f bc\.b 0x87 |
|||
a: 22 00 bc\.b 0xa |
|||
b: R_RX_DIR8S_PCREL foo |
|||
c: 22 80 bc\.b 0xffffff8c |
|||
e: 22 7f bc\.b 0x8d |
|||
10: 22 00 bc\.b 0x10 |
|||
11: R_RX_DIR8S_PCREL foo |
|||
12: 20 80 beq\.b 0xffffff92 |
|||
14: 20 7f beq\.b 0x93 |
|||
16: 20 00 beq\.b 0x16 |
|||
17: R_RX_DIR8S_PCREL foo |
|||
18: 20 80 beq\.b 0xffffff98 |
|||
1a: 20 7f beq\.b 0x99 |
|||
1c: 20 00 beq\.b 0x1c |
|||
1d: R_RX_DIR8S_PCREL foo |
|||
1e: 24 80 bgtu\.b 0xffffff9e |
|||
20: 24 7f bgtu\.b 0x9f |
|||
22: 24 00 bgtu\.b 0x22 |
|||
23: R_RX_DIR8S_PCREL foo |
|||
24: 26 80 bpz\.b 0xffffffa4 |
|||
26: 26 7f bpz\.b 0xa5 |
|||
28: 26 00 bpz\.b 0x28 |
|||
29: R_RX_DIR8S_PCREL foo |
|||
2a: 28 80 bge\.b 0xffffffaa |
|||
2c: 28 7f bge\.b 0xab |
|||
2e: 28 00 bge\.b 0x2e |
|||
2f: R_RX_DIR8S_PCREL foo |
|||
30: 2a 80 bgt\.b 0xffffffb0 |
|||
32: 2a 7f bgt\.b 0xb1 |
|||
34: 2a 00 bgt\.b 0x34 |
|||
35: R_RX_DIR8S_PCREL foo |
|||
36: 2c 80 bo\.b 0xffffffb6 |
|||
38: 2c 7f bo\.b 0xb7 |
|||
3a: 2c 00 bo\.b 0x3a |
|||
3b: R_RX_DIR8S_PCREL foo |
|||
3c: 23 80 bnc\.b 0xffffffbc |
|||
3e: 23 7f bnc\.b 0xbd |
|||
40: 23 00 bnc\.b 0x40 |
|||
41: R_RX_DIR8S_PCREL foo |
|||
42: 23 80 bnc\.b 0xffffffc2 |
|||
44: 23 7f bnc\.b 0xc3 |
|||
46: 23 00 bnc\.b 0x46 |
|||
47: R_RX_DIR8S_PCREL foo |
|||
48: 21 80 bne\.b 0xffffffc8 |
|||
4a: 21 7f bne\.b 0xc9 |
|||
4c: 21 00 bne\.b 0x4c |
|||
4d: R_RX_DIR8S_PCREL foo |
|||
4e: 21 80 bne\.b 0xffffffce |
|||
50: 21 7f bne\.b 0xcf |
|||
52: 21 00 bne\.b 0x52 |
|||
53: R_RX_DIR8S_PCREL foo |
|||
54: 25 80 bleu\.b 0xffffffd4 |
|||
56: 25 7f bleu\.b 0xd5 |
|||
58: 25 00 bleu\.b 0x58 |
|||
59: R_RX_DIR8S_PCREL foo |
|||
5a: 27 80 bn\.b 0xffffffda |
|||
5c: 27 7f bn\.b 0xdb |
|||
5e: 27 00 bn\.b 0x5e |
|||
5f: R_RX_DIR8S_PCREL foo |
|||
60: 29 80 blt\.b 0xffffffe0 |
|||
62: 29 7f blt\.b 0xe1 |
|||
64: 29 00 blt\.b 0x64 |
|||
65: R_RX_DIR8S_PCREL foo |
|||
66: 2b 80 ble\.b 0xffffffe6 |
|||
68: 2b 7f ble\.b 0xe7 |
|||
6a: 2b 00 ble\.b 0x6a |
|||
6b: R_RX_DIR8S_PCREL foo |
|||
6c: 2d 80 bno\.b 0xffffffec |
|||
6e: 2d 7f bno\.b 0xed |
|||
70: 2d 00 bno\.b 0x70 |
|||
71: R_RX_DIR8S_PCREL foo |
|||
72: 3a 00 80 beq\.w 0xffff8072 |
|||
75: 3a ff 7f beq\.w 0x8074 |
|||
78: 3a 00 00 beq\.w 0x78 |
|||
79: R_RX_DIR16S_PCREL foo |
|||
7b: 3b 00 80 bne\.w 0xffff807b |
|||
7e: 3b ff 7f bne\.w 0x807d |
|||
81: 3b 00 00 bne\.w 0x81 |
|||
82: R_RX_DIR16S_PCREL foo |
|||
84: 3a 00 80 beq\.w 0xffff8084 |
|||
87: 3a ff 7f beq\.w 0x8086 |
|||
8a: 3a fc 7f beq\.w 0x8086 |
|||
8b: R_RX_DIR16S_PCREL foo |
|||
8d: 3b 00 80 bne\.w 0xffff808d |
|||
90: 3b ff 7f bne\.w 0x808f |
|||
93: 3b fc 7f bne\.w 0x808f |
|||
94: R_RX_DIR16S_PCREL foo |
|||
@ -0,0 +1,5 @@ |
|||
b{eq;ne}.s {lab_s} |
|||
b{cnd}.b {lab_b} |
|||
b{eq;ne}.w {lab_w} |
|||
b{eq;ne} {lab_w} |
|||
|
|||
@ -0,0 +1,296 @@ |
|||
#objdump: -dr |
|||
|
|||
dump\.o: file format .* |
|||
|
|||
|
|||
Disassembly of section \.text: |
|||
|
|||
00000000 <\.text>: |
|||
0: fc e0 02 bmc #0, \[r0\]\.b |
|||
3: fc e0 f2 bmc #0, \[r15\]\.b |
|||
6: fc e1 02 fc bmc #0, 252\[r0\]\.b |
|||
a: fc e1 f2 fc bmc #0, 252\[r15\]\.b |
|||
e: fc e2 02 fc ff bmc #0, 65532\[r0\]\.b |
|||
13: fc e2 f2 fc ff bmc #0, 65532\[r15\]\.b |
|||
18: fc fc 02 bmc #7, \[r0\]\.b |
|||
1b: fc fc f2 bmc #7, \[r15\]\.b |
|||
1e: fc fd 02 fc bmc #7, 252\[r0\]\.b |
|||
22: fc fd f2 fc bmc #7, 252\[r15\]\.b |
|||
26: fc fe 02 fc ff bmc #7, 65532\[r0\]\.b |
|||
2b: fc fe f2 fc ff bmc #7, 65532\[r15\]\.b |
|||
30: fc e0 02 bmc #0, \[r0\]\.b |
|||
33: fc e0 f2 bmc #0, \[r15\]\.b |
|||
36: fc e1 02 fc bmc #0, 252\[r0\]\.b |
|||
3a: fc e1 f2 fc bmc #0, 252\[r15\]\.b |
|||
3e: fc e2 02 fc ff bmc #0, 65532\[r0\]\.b |
|||
43: fc e2 f2 fc ff bmc #0, 65532\[r15\]\.b |
|||
48: fc fc 02 bmc #7, \[r0\]\.b |
|||
4b: fc fc f2 bmc #7, \[r15\]\.b |
|||
4e: fc fd 02 fc bmc #7, 252\[r0\]\.b |
|||
52: fc fd f2 fc bmc #7, 252\[r15\]\.b |
|||
56: fc fe 02 fc ff bmc #7, 65532\[r0\]\.b |
|||
5b: fc fe f2 fc ff bmc #7, 65532\[r15\]\.b |
|||
60: fc e0 00 bmeq #0, \[r0\]\.b |
|||
63: fc e0 f0 bmeq #0, \[r15\]\.b |
|||
66: fc e1 00 fc bmeq #0, 252\[r0\]\.b |
|||
6a: fc e1 f0 fc bmeq #0, 252\[r15\]\.b |
|||
6e: fc e2 00 fc ff bmeq #0, 65532\[r0\]\.b |
|||
73: fc e2 f0 fc ff bmeq #0, 65532\[r15\]\.b |
|||
78: fc fc 00 bmeq #7, \[r0\]\.b |
|||
7b: fc fc f0 bmeq #7, \[r15\]\.b |
|||
7e: fc fd 00 fc bmeq #7, 252\[r0\]\.b |
|||
82: fc fd f0 fc bmeq #7, 252\[r15\]\.b |
|||
86: fc fe 00 fc ff bmeq #7, 65532\[r0\]\.b |
|||
8b: fc fe f0 fc ff bmeq #7, 65532\[r15\]\.b |
|||
90: fc e0 00 bmeq #0, \[r0\]\.b |
|||
93: fc e0 f0 bmeq #0, \[r15\]\.b |
|||
96: fc e1 00 fc bmeq #0, 252\[r0\]\.b |
|||
9a: fc e1 f0 fc bmeq #0, 252\[r15\]\.b |
|||
9e: fc e2 00 fc ff bmeq #0, 65532\[r0\]\.b |
|||
a3: fc e2 f0 fc ff bmeq #0, 65532\[r15\]\.b |
|||
a8: fc fc 00 bmeq #7, \[r0\]\.b |
|||
ab: fc fc f0 bmeq #7, \[r15\]\.b |
|||
ae: fc fd 00 fc bmeq #7, 252\[r0\]\.b |
|||
b2: fc fd f0 fc bmeq #7, 252\[r15\]\.b |
|||
b6: fc fe 00 fc ff bmeq #7, 65532\[r0\]\.b |
|||
bb: fc fe f0 fc ff bmeq #7, 65532\[r15\]\.b |
|||
c0: fc e0 04 bmgtu #0, \[r0\]\.b |
|||
c3: fc e0 f4 bmgtu #0, \[r15\]\.b |
|||
c6: fc e1 04 fc bmgtu #0, 252\[r0\]\.b |
|||
ca: fc e1 f4 fc bmgtu #0, 252\[r15\]\.b |
|||
ce: fc e2 04 fc ff bmgtu #0, 65532\[r0\]\.b |
|||
d3: fc e2 f4 fc ff bmgtu #0, 65532\[r15\]\.b |
|||
d8: fc fc 04 bmgtu #7, \[r0\]\.b |
|||
db: fc fc f4 bmgtu #7, \[r15\]\.b |
|||
de: fc fd 04 fc bmgtu #7, 252\[r0\]\.b |
|||
e2: fc fd f4 fc bmgtu #7, 252\[r15\]\.b |
|||
e6: fc fe 04 fc ff bmgtu #7, 65532\[r0\]\.b |
|||
eb: fc fe f4 fc ff bmgtu #7, 65532\[r15\]\.b |
|||
f0: fc e0 06 bmpz #0, \[r0\]\.b |
|||
f3: fc e0 f6 bmpz #0, \[r15\]\.b |
|||
f6: fc e1 06 fc bmpz #0, 252\[r0\]\.b |
|||
fa: fc e1 f6 fc bmpz #0, 252\[r15\]\.b |
|||
fe: fc e2 06 fc ff bmpz #0, 65532\[r0\]\.b |
|||
103: fc e2 f6 fc ff bmpz #0, 65532\[r15\]\.b |
|||
108: fc fc 06 bmpz #7, \[r0\]\.b |
|||
10b: fc fc f6 bmpz #7, \[r15\]\.b |
|||
10e: fc fd 06 fc bmpz #7, 252\[r0\]\.b |
|||
112: fc fd f6 fc bmpz #7, 252\[r15\]\.b |
|||
116: fc fe 06 fc ff bmpz #7, 65532\[r0\]\.b |
|||
11b: fc fe f6 fc ff bmpz #7, 65532\[r15\]\.b |
|||
120: fc e0 08 bmge #0, \[r0\]\.b |
|||
123: fc e0 f8 bmge #0, \[r15\]\.b |
|||
126: fc e1 08 fc bmge #0, 252\[r0\]\.b |
|||
12a: fc e1 f8 fc bmge #0, 252\[r15\]\.b |
|||
12e: fc e2 08 fc ff bmge #0, 65532\[r0\]\.b |
|||
133: fc e2 f8 fc ff bmge #0, 65532\[r15\]\.b |
|||
138: fc fc 08 bmge #7, \[r0\]\.b |
|||
13b: fc fc f8 bmge #7, \[r15\]\.b |
|||
13e: fc fd 08 fc bmge #7, 252\[r0\]\.b |
|||
142: fc fd f8 fc bmge #7, 252\[r15\]\.b |
|||
146: fc fe 08 fc ff bmge #7, 65532\[r0\]\.b |
|||
14b: fc fe f8 fc ff bmge #7, 65532\[r15\]\.b |
|||
150: fc e0 0a bmgt #0, \[r0\]\.b |
|||
153: fc e0 fa bmgt #0, \[r15\]\.b |
|||
156: fc e1 0a fc bmgt #0, 252\[r0\]\.b |
|||
15a: fc e1 fa fc bmgt #0, 252\[r15\]\.b |
|||
15e: fc e2 0a fc ff bmgt #0, 65532\[r0\]\.b |
|||
163: fc e2 fa fc ff bmgt #0, 65532\[r15\]\.b |
|||
168: fc fc 0a bmgt #7, \[r0\]\.b |
|||
16b: fc fc fa bmgt #7, \[r15\]\.b |
|||
16e: fc fd 0a fc bmgt #7, 252\[r0\]\.b |
|||
172: fc fd fa fc bmgt #7, 252\[r15\]\.b |
|||
176: fc fe 0a fc ff bmgt #7, 65532\[r0\]\.b |
|||
17b: fc fe fa fc ff bmgt #7, 65532\[r15\]\.b |
|||
180: fc e0 0c bmo #0, \[r0\]\.b |
|||
183: fc e0 fc bmo #0, \[r15\]\.b |
|||
186: fc e1 0c fc bmo #0, 252\[r0\]\.b |
|||
18a: fc e1 fc fc bmo #0, 252\[r15\]\.b |
|||
18e: fc e2 0c fc ff bmo #0, 65532\[r0\]\.b |
|||
193: fc e2 fc fc ff bmo #0, 65532\[r15\]\.b |
|||
198: fc fc 0c bmo #7, \[r0\]\.b |
|||
19b: fc fc fc bmo #7, \[r15\]\.b |
|||
19e: fc fd 0c fc bmo #7, 252\[r0\]\.b |
|||
1a2: fc fd fc fc bmo #7, 252\[r15\]\.b |
|||
1a6: fc fe 0c fc ff bmo #7, 65532\[r0\]\.b |
|||
1ab: fc fe fc fc ff bmo #7, 65532\[r15\]\.b |
|||
1b0: fc e0 03 bmnc #0, \[r0\]\.b |
|||
1b3: fc e0 f3 bmnc #0, \[r15\]\.b |
|||
1b6: fc e1 03 fc bmnc #0, 252\[r0\]\.b |
|||
1ba: fc e1 f3 fc bmnc #0, 252\[r15\]\.b |
|||
1be: fc e2 03 fc ff bmnc #0, 65532\[r0\]\.b |
|||
1c3: fc e2 f3 fc ff bmnc #0, 65532\[r15\]\.b |
|||
1c8: fc fc 03 bmnc #7, \[r0\]\.b |
|||
1cb: fc fc f3 bmnc #7, \[r15\]\.b |
|||
1ce: fc fd 03 fc bmnc #7, 252\[r0\]\.b |
|||
1d2: fc fd f3 fc bmnc #7, 252\[r15\]\.b |
|||
1d6: fc fe 03 fc ff bmnc #7, 65532\[r0\]\.b |
|||
1db: fc fe f3 fc ff bmnc #7, 65532\[r15\]\.b |
|||
1e0: fc e0 03 bmnc #0, \[r0\]\.b |
|||
1e3: fc e0 f3 bmnc #0, \[r15\]\.b |
|||
1e6: fc e1 03 fc bmnc #0, 252\[r0\]\.b |
|||
1ea: fc e1 f3 fc bmnc #0, 252\[r15\]\.b |
|||
1ee: fc e2 03 fc ff bmnc #0, 65532\[r0\]\.b |
|||
1f3: fc e2 f3 fc ff bmnc #0, 65532\[r15\]\.b |
|||
1f8: fc fc 03 bmnc #7, \[r0\]\.b |
|||
1fb: fc fc f3 bmnc #7, \[r15\]\.b |
|||
1fe: fc fd 03 fc bmnc #7, 252\[r0\]\.b |
|||
202: fc fd f3 fc bmnc #7, 252\[r15\]\.b |
|||
206: fc fe 03 fc ff bmnc #7, 65532\[r0\]\.b |
|||
20b: fc fe f3 fc ff bmnc #7, 65532\[r15\]\.b |
|||
210: fc e0 01 bmne #0, \[r0\]\.b |
|||
213: fc e0 f1 bmne #0, \[r15\]\.b |
|||
216: fc e1 01 fc bmne #0, 252\[r0\]\.b |
|||
21a: fc e1 f1 fc bmne #0, 252\[r15\]\.b |
|||
21e: fc e2 01 fc ff bmne #0, 65532\[r0\]\.b |
|||
223: fc e2 f1 fc ff bmne #0, 65532\[r15\]\.b |
|||
228: fc fc 01 bmne #7, \[r0\]\.b |
|||
22b: fc fc f1 bmne #7, \[r15\]\.b |
|||
22e: fc fd 01 fc bmne #7, 252\[r0\]\.b |
|||
232: fc fd f1 fc bmne #7, 252\[r15\]\.b |
|||
236: fc fe 01 fc ff bmne #7, 65532\[r0\]\.b |
|||
23b: fc fe f1 fc ff bmne #7, 65532\[r15\]\.b |
|||
240: fc e0 01 bmne #0, \[r0\]\.b |
|||
243: fc e0 f1 bmne #0, \[r15\]\.b |
|||
246: fc e1 01 fc bmne #0, 252\[r0\]\.b |
|||
24a: fc e1 f1 fc bmne #0, 252\[r15\]\.b |
|||
24e: fc e2 01 fc ff bmne #0, 65532\[r0\]\.b |
|||
253: fc e2 f1 fc ff bmne #0, 65532\[r15\]\.b |
|||
258: fc fc 01 bmne #7, \[r0\]\.b |
|||
25b: fc fc f1 bmne #7, \[r15\]\.b |
|||
25e: fc fd 01 fc bmne #7, 252\[r0\]\.b |
|||
262: fc fd f1 fc bmne #7, 252\[r15\]\.b |
|||
266: fc fe 01 fc ff bmne #7, 65532\[r0\]\.b |
|||
26b: fc fe f1 fc ff bmne #7, 65532\[r15\]\.b |
|||
270: fc e0 05 bmleu #0, \[r0\]\.b |
|||
273: fc e0 f5 bmleu #0, \[r15\]\.b |
|||
276: fc e1 05 fc bmleu #0, 252\[r0\]\.b |
|||
27a: fc e1 f5 fc bmleu #0, 252\[r15\]\.b |
|||
27e: fc e2 05 fc ff bmleu #0, 65532\[r0\]\.b |
|||
283: fc e2 f5 fc ff bmleu #0, 65532\[r15\]\.b |
|||
288: fc fc 05 bmleu #7, \[r0\]\.b |
|||
28b: fc fc f5 bmleu #7, \[r15\]\.b |
|||
28e: fc fd 05 fc bmleu #7, 252\[r0\]\.b |
|||
292: fc fd f5 fc bmleu #7, 252\[r15\]\.b |
|||
296: fc fe 05 fc ff bmleu #7, 65532\[r0\]\.b |
|||
29b: fc fe f5 fc ff bmleu #7, 65532\[r15\]\.b |
|||
2a0: fc e0 07 bmn #0, \[r0\]\.b |
|||
2a3: fc e0 f7 bmn #0, \[r15\]\.b |
|||
2a6: fc e1 07 fc bmn #0, 252\[r0\]\.b |
|||
2aa: fc e1 f7 fc bmn #0, 252\[r15\]\.b |
|||
2ae: fc e2 07 fc ff bmn #0, 65532\[r0\]\.b |
|||
2b3: fc e2 f7 fc ff bmn #0, 65532\[r15\]\.b |
|||
2b8: fc fc 07 bmn #7, \[r0\]\.b |
|||
2bb: fc fc f7 bmn #7, \[r15\]\.b |
|||
2be: fc fd 07 fc bmn #7, 252\[r0\]\.b |
|||
2c2: fc fd f7 fc bmn #7, 252\[r15\]\.b |
|||
2c6: fc fe 07 fc ff bmn #7, 65532\[r0\]\.b |
|||
2cb: fc fe f7 fc ff bmn #7, 65532\[r15\]\.b |
|||
2d0: fc e0 09 bmlt #0, \[r0\]\.b |
|||
2d3: fc e0 f9 bmlt #0, \[r15\]\.b |
|||
2d6: fc e1 09 fc bmlt #0, 252\[r0\]\.b |
|||
2da: fc e1 f9 fc bmlt #0, 252\[r15\]\.b |
|||
2de: fc e2 09 fc ff bmlt #0, 65532\[r0\]\.b |
|||
2e3: fc e2 f9 fc ff bmlt #0, 65532\[r15\]\.b |
|||
2e8: fc fc 09 bmlt #7, \[r0\]\.b |
|||
2eb: fc fc f9 bmlt #7, \[r15\]\.b |
|||
2ee: fc fd 09 fc bmlt #7, 252\[r0\]\.b |
|||
2f2: fc fd f9 fc bmlt #7, 252\[r15\]\.b |
|||
2f6: fc fe 09 fc ff bmlt #7, 65532\[r0\]\.b |
|||
2fb: fc fe f9 fc ff bmlt #7, 65532\[r15\]\.b |
|||
300: fc e0 0b bmle #0, \[r0\]\.b |
|||
303: fc e0 fb bmle #0, \[r15\]\.b |
|||
306: fc e1 0b fc bmle #0, 252\[r0\]\.b |
|||
30a: fc e1 fb fc bmle #0, 252\[r15\]\.b |
|||
30e: fc e2 0b fc ff bmle #0, 65532\[r0\]\.b |
|||
313: fc e2 fb fc ff bmle #0, 65532\[r15\]\.b |
|||
318: fc fc 0b bmle #7, \[r0\]\.b |
|||
31b: fc fc fb bmle #7, \[r15\]\.b |
|||
31e: fc fd 0b fc bmle #7, 252\[r0\]\.b |
|||
322: fc fd fb fc bmle #7, 252\[r15\]\.b |
|||
326: fc fe 0b fc ff bmle #7, 65532\[r0\]\.b |
|||
32b: fc fe fb fc ff bmle #7, 65532\[r15\]\.b |
|||
330: fc e0 0d bmno #0, \[r0\]\.b |
|||
333: fc e0 fd bmno #0, \[r15\]\.b |
|||
336: fc e1 0d fc bmno #0, 252\[r0\]\.b |
|||
33a: fc e1 fd fc bmno #0, 252\[r15\]\.b |
|||
33e: fc e2 0d fc ff bmno #0, 65532\[r0\]\.b |
|||
343: fc e2 fd fc ff bmno #0, 65532\[r15\]\.b |
|||
348: fc fc 0d bmno #7, \[r0\]\.b |
|||
34b: fc fc fd bmno #7, \[r15\]\.b |
|||
34e: fc fd 0d fc bmno #7, 252\[r0\]\.b |
|||
352: fc fd fd fc bmno #7, 252\[r15\]\.b |
|||
356: fc fe 0d fc ff bmno #7, 65532\[r0\]\.b |
|||
35b: fc fe fd fc ff bmno #7, 65532\[r15\]\.b |
|||
360: fd e0 20 bmc #0, r0 |
|||
363: fd e0 2f bmc #0, r15 |
|||
366: fd ff 20 bmc #31, r0 |
|||
369: fd ff 2f bmc #31, r15 |
|||
36c: fd e0 20 bmc #0, r0 |
|||
36f: fd e0 2f bmc #0, r15 |
|||
372: fd ff 20 bmc #31, r0 |
|||
375: fd ff 2f bmc #31, r15 |
|||
378: fd e0 00 bmeq #0, r0 |
|||
37b: fd e0 0f bmeq #0, r15 |
|||
37e: fd ff 00 bmeq #31, r0 |
|||
381: fd ff 0f bmeq #31, r15 |
|||
384: fd e0 00 bmeq #0, r0 |
|||
387: fd e0 0f bmeq #0, r15 |
|||
38a: fd ff 00 bmeq #31, r0 |
|||
38d: fd ff 0f bmeq #31, r15 |
|||
390: fd e0 40 bmgtu #0, r0 |
|||
393: fd e0 4f bmgtu #0, r15 |
|||
396: fd ff 40 bmgtu #31, r0 |
|||
399: fd ff 4f bmgtu #31, r15 |
|||
39c: fd e0 60 bmpz #0, r0 |
|||
39f: fd e0 6f bmpz #0, r15 |
|||
3a2: fd ff 60 bmpz #31, r0 |
|||
3a5: fd ff 6f bmpz #31, r15 |
|||
3a8: fd e0 80 bmge #0, r0 |
|||
3ab: fd e0 8f bmge #0, r15 |
|||
3ae: fd ff 80 bmge #31, r0 |
|||
3b1: fd ff 8f bmge #31, r15 |
|||
3b4: fd e0 a0 bmgt #0, r0 |
|||
3b7: fd e0 af bmgt #0, r15 |
|||
3ba: fd ff a0 bmgt #31, r0 |
|||
3bd: fd ff af bmgt #31, r15 |
|||
3c0: fd e0 c0 bmo #0, r0 |
|||
3c3: fd e0 cf bmo #0, r15 |
|||
3c6: fd ff c0 bmo #31, r0 |
|||
3c9: fd ff cf bmo #31, r15 |
|||
3cc: fd e0 30 bmnc #0, r0 |
|||
3cf: fd e0 3f bmnc #0, r15 |
|||
3d2: fd ff 30 bmnc #31, r0 |
|||
3d5: fd ff 3f bmnc #31, r15 |
|||
3d8: fd e0 30 bmnc #0, r0 |
|||
3db: fd e0 3f bmnc #0, r15 |
|||
3de: fd ff 30 bmnc #31, r0 |
|||
3e1: fd ff 3f bmnc #31, r15 |
|||
3e4: fd e0 10 bmne #0, r0 |
|||
3e7: fd e0 1f bmne #0, r15 |
|||
3ea: fd ff 10 bmne #31, r0 |
|||
3ed: fd ff 1f bmne #31, r15 |
|||
3f0: fd e0 10 bmne #0, r0 |
|||
3f3: fd e0 1f bmne #0, r15 |
|||
3f6: fd ff 10 bmne #31, r0 |
|||
3f9: fd ff 1f bmne #31, r15 |
|||
3fc: fd e0 50 bmleu #0, r0 |
|||
3ff: fd e0 5f bmleu #0, r15 |
|||
402: fd ff 50 bmleu #31, r0 |
|||
405: fd ff 5f bmleu #31, r15 |
|||
408: fd e0 70 bmn #0, r0 |
|||
40b: fd e0 7f bmn #0, r15 |
|||
40e: fd ff 70 bmn #31, r0 |
|||
411: fd ff 7f bmn #31, r15 |
|||
414: fd e0 90 bmlt #0, r0 |
|||
417: fd e0 9f bmlt #0, r15 |
|||
41a: fd ff 90 bmlt #31, r0 |
|||
41d: fd ff 9f bmlt #31, r15 |
|||
420: fd e0 b0 bmle #0, r0 |
|||
423: fd e0 bf bmle #0, r15 |
|||
426: fd ff b0 bmle #31, r0 |
|||
429: fd ff bf bmle #31, r15 |
|||
42c: fd e0 d0 bmno #0, r0 |
|||
42f: fd e0 df bmno #0, r15 |
|||
432: fd ff d0 bmno #31, r0 |
|||
435: fd ff df bmno #31, r15 |
|||
@ -0,0 +1,2 @@ |
|||
bm{cnd} #{uimm3}, {dsp}[{reg}].B |
|||
bm{cnd} #{uimm5}, {reg} |
|||
@ -0,0 +1,40 @@ |
|||
#objdump: -dr |
|||
|
|||
dump\.o: file format .* |
|||
|
|||
|
|||
Disassembly of section \.text: |
|||
|
|||
00000000 <\.text>: |
|||
0: fc e0 0f bnot #0, \[r0\]\.b |
|||
3: fc e0 ff bnot #0, \[r15\]\.b |
|||
6: fc e1 0f fc bnot #0, 252\[r0\]\.b |
|||
a: fc e1 ff fc bnot #0, 252\[r15\]\.b |
|||
e: fc e2 0f fc ff bnot #0, 65532\[r0\]\.b |
|||
13: fc e2 ff fc ff bnot #0, 65532\[r15\]\.b |
|||
18: fc fc 0f bnot #7, \[r0\]\.b |
|||
1b: fc fc ff bnot #7, \[r15\]\.b |
|||
1e: fc fd 0f fc bnot #7, 252\[r0\]\.b |
|||
22: fc fd ff fc bnot #7, 252\[r15\]\.b |
|||
26: fc fe 0f fc ff bnot #7, 65532\[r0\]\.b |
|||
2b: fc fe ff fc ff bnot #7, 65532\[r15\]\.b |
|||
30: fc 6c 00 bnot r0, \[r0\]\.b |
|||
33: fc 6c f0 bnot r0, \[r15\]\.b |
|||
36: fc 6d 00 fc bnot r0, 252\[r0\]\.b |
|||
3a: fc 6d f0 fc bnot r0, 252\[r15\]\.b |
|||
3e: fc 6e 00 fc ff bnot r0, 65532\[r0\]\.b |
|||
43: fc 6e f0 fc ff bnot r0, 65532\[r15\]\.b |
|||
48: fc 6c 0f bnot r15, \[r0\]\.b |
|||
4b: fc 6c ff bnot r15, \[r15\]\.b |
|||
4e: fc 6d 0f fc bnot r15, 252\[r0\]\.b |
|||
52: fc 6d ff fc bnot r15, 252\[r15\]\.b |
|||
56: fc 6e 0f fc ff bnot r15, 65532\[r0\]\.b |
|||
5b: fc 6e ff fc ff bnot r15, 65532\[r15\]\.b |
|||
60: fd e0 f0 bnot #0, r0 |
|||
63: fd e0 ff bnot #0, r15 |
|||
66: fd ff f0 bnot #31, r0 |
|||
69: fd ff ff bnot #31, r15 |
|||
6c: fc 6f 00 bnot r0, r0 |
|||
6f: fc 6f f0 bnot r0, r15 |
|||
72: fc 6f 0f bnot r15, r0 |
|||
75: fc 6f ff bnot r15, r15 |
|||
@ -0,0 +1,5 @@ |
|||
bnot #{uimm3}, {dsp}[{reg}].B |
|||
bnot {reg}, {dsp}[{reg}].B |
|||
|
|||
bnot #{uimm5}, {reg} |
|||
bnot {reg}, {reg} |
|||
@ -0,0 +1,30 @@ |
|||
#objdump: -dr |
|||
|
|||
dump\.o: file format .* |
|||
|
|||
|
|||
Disassembly of section \.text: |
|||
|
|||
00000000 <\.text>: |
|||
0: 0b bra\.s 0x3 |
|||
1: 0a bra\.s 0xb |
|||
2: 08 bra\.s 0xa |
|||
2: R_RX_DIR3U_PCREL foo |
|||
3: 2e 80 bra\.b 0xffffff83 |
|||
5: 2e 7f bra\.b 0x84 |
|||
7: 2e 00 bra\.b 0x7 |
|||
8: R_RX_DIR8S_PCREL foo |
|||
9: 38 00 80 bra\.w 0xffff8009 |
|||
c: 38 ff 7f bra\.w 0x800b |
|||
f: 38 00 00 bra\.w 0xf |
|||
10: R_RX_DIR16S_PCREL foo |
|||
12: 04 00 00 80 bra\.a 0xff800012 |
|||
16: 04 ff ff 7f bra\.a 0x800015 |
|||
1a: 04 00 00 00 bra\.a 0x1a |
|||
1b: R_RX_DIR24S_PCREL foo |
|||
1e: 04 00 00 80 bra\.a 0xff80001e |
|||
22: 04 ff ff 7f bra\.a 0x800021 |
|||
26: 04 fb ff 7f bra\.a 0x800021 |
|||
27: R_RX_DIR24S_PCREL foo |
|||
2a: 7f 40 bra\.l r0 |
|||
2c: 7f 4f bra\.l r15 |
|||
@ -0,0 +1,6 @@ |
|||
bra.s {lab_s} |
|||
bra.b {lab_b} |
|||
bra.w {lab_w} |
|||
bra.a {lab_a} |
|||
bra {lab_a} |
|||
bra.l {reg} |
|||
@ -0,0 +1,10 @@ |
|||
#objdump: -dr |
|||
|
|||
dump\.o: file format .* |
|||
|
|||
|
|||
Disassembly of section \.text: |
|||
|
|||
00000000 <\.text>: |
|||
0: 00 brk |
|||
1: 03 nop |
|||
@ -0,0 +1,2 @@ |
|||
brk |
|||
nop |
|||
@ -0,0 +1,40 @@ |
|||
#objdump: -dr |
|||
|
|||
dump\.o: file format .* |
|||
|
|||
|
|||
Disassembly of section \.text: |
|||
|
|||
00000000 <\.text>: |
|||
0: f0 00 bset #0, \[r0\]\.b |
|||
2: f0 f0 bset #0, \[r15\]\.b |
|||
4: f1 00 fc bset #0, 252\[r0\]\.b |
|||
7: f1 f0 fc bset #0, 252\[r15\]\.b |
|||
a: f2 00 fc ff bset #0, 65532\[r0\]\.b |
|||
e: f2 f0 fc ff bset #0, 65532\[r15\]\.b |
|||
12: f0 07 bset #7, \[r0\]\.b |
|||
14: f0 f7 bset #7, \[r15\]\.b |
|||
16: f1 07 fc bset #7, 252\[r0\]\.b |
|||
19: f1 f7 fc bset #7, 252\[r15\]\.b |
|||
1c: f2 07 fc ff bset #7, 65532\[r0\]\.b |
|||
20: f2 f7 fc ff bset #7, 65532\[r15\]\.b |
|||
24: fc 60 00 bset r0, \[r0\]\.b |
|||
27: fc 60 f0 bset r0, \[r15\]\.b |
|||
2a: fc 61 00 fc bset r0, 252\[r0\]\.b |
|||
2e: fc 61 f0 fc bset r0, 252\[r15\]\.b |
|||
32: fc 62 00 fc ff bset r0, 65532\[r0\]\.b |
|||
37: fc 62 f0 fc ff bset r0, 65532\[r15\]\.b |
|||
3c: fc 60 0f bset r15, \[r0\]\.b |
|||
3f: fc 60 ff bset r15, \[r15\]\.b |
|||
42: fc 61 0f fc bset r15, 252\[r0\]\.b |
|||
46: fc 61 ff fc bset r15, 252\[r15\]\.b |
|||
4a: fc 62 0f fc ff bset r15, 65532\[r0\]\.b |
|||
4f: fc 62 ff fc ff bset r15, 65532\[r15\]\.b |
|||
54: 78 00 bset #0, r0 |
|||
56: 78 0f bset #0, r15 |
|||
58: 79 f0 bset #31, r0 |
|||
5a: 79 ff bset #31, r15 |
|||
5c: fc 63 00 bset r0, r0 |
|||
5f: fc 63 f0 bset r0, r15 |
|||
62: fc 63 0f bset r15, r0 |
|||
65: fc 63 ff bset r15, r15 |
|||
@ -0,0 +1,5 @@ |
|||
bset #{uimm3}, {dsp}[{reg}].B |
|||
bset {reg}, {dsp}[{reg}].B |
|||
|
|||
bset #{uimm5}, {reg} |
|||
bset {reg}, {reg} |
|||
@ -0,0 +1,18 @@ |
|||
#objdump: -dr |
|||
|
|||
dump\.o: file format .* |
|||
|
|||
|
|||
Disassembly of section \.text: |
|||
|
|||
00000000 <\.text>: |
|||
0: 39 00 80 bsr\.w 0xffff8000 |
|||
3: 39 ff 7f bsr\.w 0x8002 |
|||
6: 39 00 00 bsr\.w 0x6 |
|||
7: R_RX_DIR16S_PCREL foo |
|||
9: 05 00 00 80 bsr\.a 0xff800009 |
|||
d: 05 ff ff 7f bsr\.a 0x80000c |
|||
11: 05 00 00 00 bsr\.a 0x11 |
|||
12: R_RX_DIR24S_PCREL foo |
|||
15: 7f 50 bsr\.l r0 |
|||
17: 7f 5f bsr\.l r15 |
|||
@ -0,0 +1,3 @@ |
|||
bsr.w {lab_w} |
|||
bsr.a {lab_a} |
|||
bsr.l {reg} |
|||
@ -0,0 +1,40 @@ |
|||
#objdump: -dr |
|||
|
|||
dump\.o: file format .* |
|||
|
|||
|
|||
Disassembly of section \.text: |
|||
|
|||
00000000 <\.text>: |
|||
0: f4 00 btst #0, \[r0\]\.b |
|||
2: f4 f0 btst #0, \[r15\]\.b |
|||
4: f5 00 fc btst #0, 252\[r0\]\.b |
|||
7: f5 f0 fc btst #0, 252\[r15\]\.b |
|||
a: f6 00 fc ff btst #0, 65532\[r0\]\.b |
|||
e: f6 f0 fc ff btst #0, 65532\[r15\]\.b |
|||
12: f4 07 btst #7, \[r0\]\.b |
|||
14: f4 f7 btst #7, \[r15\]\.b |
|||
16: f5 07 fc btst #7, 252\[r0\]\.b |
|||
19: f5 f7 fc btst #7, 252\[r15\]\.b |
|||
1c: f6 07 fc ff btst #7, 65532\[r0\]\.b |
|||
20: f6 f7 fc ff btst #7, 65532\[r15\]\.b |
|||
24: fc 68 00 btst r0, \[r0\]\.b |
|||
27: fc 68 f0 btst r0, \[r15\]\.b |
|||
2a: fc 69 00 fc btst r0, 252\[r0\]\.b |
|||
2e: fc 69 f0 fc btst r0, 252\[r15\]\.b |
|||
32: fc 6a 00 fc ff btst r0, 65532\[r0\]\.b |
|||
37: fc 6a f0 fc ff btst r0, 65532\[r15\]\.b |
|||
3c: fc 68 0f btst r15, \[r0\]\.b |
|||
3f: fc 68 ff btst r15, \[r15\]\.b |
|||
42: fc 69 0f fc btst r15, 252\[r0\]\.b |
|||
46: fc 69 ff fc btst r15, 252\[r15\]\.b |
|||
4a: fc 6a 0f fc ff btst r15, 65532\[r0\]\.b |
|||
4f: fc 6a ff fc ff btst r15, 65532\[r15\]\.b |
|||
54: 7c 00 btst #0, r0 |
|||
56: 7c 0f btst #0, r15 |
|||
58: 7d f0 btst #31, r0 |
|||
5a: 7d ff btst #31, r15 |
|||
5c: fc 6b 00 btst r0, r0 |
|||
5f: fc 6b f0 btst r0, r15 |
|||
62: fc 6b 0f btst r15, r0 |
|||
65: fc 6b ff btst r15, r15 |
|||
@ -0,0 +1,5 @@ |
|||
btst #{uimm3}, {dsp}[{reg}].B |
|||
btst {reg}, {dsp}[{reg}].B |
|||
|
|||
btst #{uimm5}, {reg} |
|||
btst {reg}, {reg} |
|||
@ -0,0 +1,14 @@ |
|||
#objdump: -dr |
|||
|
|||
dump\.o: file format .* |
|||
|
|||
|
|||
Disassembly of section \.text: |
|||
|
|||
00000000 <\.text>: |
|||
0: 7f b9 clrpsw u |
|||
2: 7f b8 clrpsw i |
|||
4: 7f b3 clrpsw o |
|||
6: 7f b2 clrpsw s |
|||
8: 7f b1 clrpsw z |
|||
a: 7f b0 clrpsw c |
|||
@ -0,0 +1 @@ |
|||
clrpsw {pswf} |
|||
@ -0,0 +1,96 @@ |
|||
#objdump: -dr |
|||
|
|||
dump\.o: file format .* |
|||
|
|||
|
|||
Disassembly of section \.text: |
|||
|
|||
00000000 <\.text>: |
|||
0: 61 00 cmp #0, r0 |
|||
2: 61 0f cmp #0, r15 |
|||
4: 61 f0 cmp #15, r0 |
|||
6: 61 ff cmp #15, r15 |
|||
8: 61 00 cmp #0, r0 |
|||
a: 61 0f cmp #0, r15 |
|||
c: 75 50 ff cmp #255, r0 |
|||
f: 75 5f ff cmp #255, r15 |
|||
12: 75 00 80 cmp #-128, r0 |
|||
15: 75 0f 80 cmp #-128, r15 |
|||
18: 75 50 7f cmp #127, r0 |
|||
1b: 75 5f 7f cmp #127, r15 |
|||
1e: 76 00 00 80 cmp #0xffff8000, r0 |
|||
22: 76 0f 00 80 cmp #0xffff8000, r15 |
|||
26: 77 00 00 80 00 cmp #0x8000, r0 |
|||
2b: 77 0f 00 80 00 cmp #0x8000, r15 |
|||
30: 77 00 00 00 80 cmp #0xff800000, r0 |
|||
35: 77 0f 00 00 80 cmp #0xff800000, r15 |
|||
3a: 77 00 ff ff 7f cmp #0x7fffff, r0 |
|||
3f: 77 0f ff ff 7f cmp #0x7fffff, r15 |
|||
44: 74 00 00 00 00 80 cmp #0x80000000, r0 |
|||
4a: 74 0f 00 00 00 80 cmp #0x80000000, r15 |
|||
50: 74 00 ff ff ff 7f cmp #0x7fffffff, r0 |
|||
56: 74 0f ff ff ff 7f cmp #0x7fffffff, r15 |
|||
5c: 47 00 cmp r0, r0 |
|||
5e: 47 0f cmp r0, r15 |
|||
60: 47 f0 cmp r15, r0 |
|||
62: 47 ff cmp r15, r15 |
|||
64: 44 00 cmp \[r0\]\.ub, r0 |
|||
66: 44 0f cmp \[r0\]\.ub, r15 |
|||
68: 06 04 00 cmp \[r0\]\.b, r0 |
|||
6b: 06 04 0f cmp \[r0\]\.b, r15 |
|||
6e: 06 c4 00 cmp \[r0\]\.uw, r0 |
|||
71: 06 c4 0f cmp \[r0\]\.uw, r15 |
|||
74: 06 44 00 cmp \[r0\]\.w, r0 |
|||
77: 06 44 0f cmp \[r0\]\.w, r15 |
|||
7a: 06 84 00 cmp \[r0\]\.l, r0 |
|||
7d: 06 84 0f cmp \[r0\]\.l, r15 |
|||
80: 44 f0 cmp \[r15\]\.ub, r0 |
|||
82: 44 ff cmp \[r15\]\.ub, r15 |
|||
84: 06 04 f0 cmp \[r15\]\.b, r0 |
|||
87: 06 04 ff cmp \[r15\]\.b, r15 |
|||
8a: 06 c4 f0 cmp \[r15\]\.uw, r0 |
|||
8d: 06 c4 ff cmp \[r15\]\.uw, r15 |
|||
90: 06 44 f0 cmp \[r15\]\.w, r0 |
|||
93: 06 44 ff cmp \[r15\]\.w, r15 |
|||
96: 06 84 f0 cmp \[r15\]\.l, r0 |
|||
99: 06 84 ff cmp \[r15\]\.l, r15 |
|||
9c: 45 00 fc cmp 252\[r0\]\.ub, r0 |
|||
9f: 45 0f fc cmp 252\[r0\]\.ub, r15 |
|||
a2: 06 05 00 fc cmp 252\[r0\]\.b, r0 |
|||
a6: 06 05 0f fc cmp 252\[r0\]\.b, r15 |
|||
aa: 06 c5 00 7e cmp 252\[r0\]\.uw, r0 |
|||
ae: 06 c5 0f 7e cmp 252\[r0\]\.uw, r15 |
|||
b2: 06 45 00 7e cmp 252\[r0\]\.w, r0 |
|||
b6: 06 45 0f 7e cmp 252\[r0\]\.w, r15 |
|||
ba: 06 85 00 3f cmp 252\[r0\]\.l, r0 |
|||
be: 06 85 0f 3f cmp 252\[r0\]\.l, r15 |
|||
c2: 45 f0 fc cmp 252\[r15\]\.ub, r0 |
|||
c5: 45 ff fc cmp 252\[r15\]\.ub, r15 |
|||
c8: 06 05 f0 fc cmp 252\[r15\]\.b, r0 |
|||
cc: 06 05 ff fc cmp 252\[r15\]\.b, r15 |
|||
d0: 06 c5 f0 7e cmp 252\[r15\]\.uw, r0 |
|||
d4: 06 c5 ff 7e cmp 252\[r15\]\.uw, r15 |
|||
d8: 06 45 f0 7e cmp 252\[r15\]\.w, r0 |
|||
dc: 06 45 ff 7e cmp 252\[r15\]\.w, r15 |
|||
e0: 06 85 f0 3f cmp 252\[r15\]\.l, r0 |
|||
e4: 06 85 ff 3f cmp 252\[r15\]\.l, r15 |
|||
e8: 46 00 fc ff cmp 65532\[r0\]\.ub, r0 |
|||
ec: 46 0f fc ff cmp 65532\[r0\]\.ub, r15 |
|||
f0: 06 06 00 fc ff cmp 65532\[r0\]\.b, r0 |
|||
f5: 06 06 0f fc ff cmp 65532\[r0\]\.b, r15 |
|||
fa: 06 c6 00 fe 7f cmp 65532\[r0\]\.uw, r0 |
|||
ff: 06 c6 0f fe 7f cmp 65532\[r0\]\.uw, r15 |
|||
104: 06 46 00 fe 7f cmp 65532\[r0\]\.w, r0 |
|||
109: 06 46 0f fe 7f cmp 65532\[r0\]\.w, r15 |
|||
10e: 06 86 00 ff 3f cmp 65532\[r0\]\.l, r0 |
|||
113: 06 86 0f ff 3f cmp 65532\[r0\]\.l, r15 |
|||
118: 46 f0 fc ff cmp 65532\[r15\]\.ub, r0 |
|||
11c: 46 ff fc ff cmp 65532\[r15\]\.ub, r15 |
|||
120: 06 06 f0 fc ff cmp 65532\[r15\]\.b, r0 |
|||
125: 06 06 ff fc ff cmp 65532\[r15\]\.b, r15 |
|||
12a: 06 c6 f0 fe 7f cmp 65532\[r15\]\.uw, r0 |
|||
12f: 06 c6 ff fe 7f cmp 65532\[r15\]\.uw, r15 |
|||
134: 06 46 f0 fe 7f cmp 65532\[r15\]\.w, r0 |
|||
139: 06 46 ff fe 7f cmp 65532\[r15\]\.w, r15 |
|||
13e: 06 86 f0 ff 3f cmp 65532\[r15\]\.l, r0 |
|||
143: 06 86 ff ff 3f cmp 65532\[r15\]\.l, r15 |
|||
@ -0,0 +1,6 @@ |
|||
cmp #{uimm4},{reg} |
|||
cmp #{uimm8},{reg} |
|||
cmp #{imm},{reg} |
|||
cmp {reg},{reg} |
|||
cmp {memx},{reg} |
|||
|
|||
@ -0,0 +1,9 @@ |
|||
#objdump: -dr |
|||
|
|||
dump\.o: file format .* |
|||
|
|||
|
|||
Disassembly of section \.text: |
|||
|
|||
00000000 <\.text>: |
|||
0: 01 dbt |
|||
@ -0,0 +1 @@ |
|||
dbt |
|||
@ -0,0 +1,88 @@ |
|||
#objdump: -dr |
|||
|
|||
dump\.o: file format .* |
|||
|
|||
|
|||
Disassembly of section \.text: |
|||
|
|||
00000000 <\.text>: |
|||
0: fd 74 80 80 div #-128, r0 |
|||
4: fd 74 8f 80 div #-128, r15 |
|||
8: fd 74 80 7f div #127, r0 |
|||
c: fd 74 8f 7f div #127, r15 |
|||
10: fd 78 80 00 80 div #0xffff8000, r0 |
|||
15: fd 78 8f 00 80 div #0xffff8000, r15 |
|||
1a: fd 7c 80 00 80 00 div #0x8000, r0 |
|||
20: fd 7c 8f 00 80 00 div #0x8000, r15 |
|||
26: fd 7c 80 00 00 80 div #0xff800000, r0 |
|||
2c: fd 7c 8f 00 00 80 div #0xff800000, r15 |
|||
32: fd 7c 80 ff ff 7f div #0x7fffff, r0 |
|||
38: fd 7c 8f ff ff 7f div #0x7fffff, r15 |
|||
3e: fd 70 80 00 00 00 80 div #0x80000000, r0 |
|||
45: fd 70 8f 00 00 00 80 div #0x80000000, r15 |
|||
4c: fd 70 80 ff ff ff 7f div #0x7fffffff, r0 |
|||
53: fd 70 8f ff ff ff 7f div #0x7fffffff, r15 |
|||
5a: fc 23 00 div r0, r0 |
|||
5d: fc 23 0f div r0, r15 |
|||
60: fc 23 f0 div r15, r0 |
|||
63: fc 23 ff div r15, r15 |
|||
66: fc 20 00 div \[r0\]\.ub, r0 |
|||
69: fc 20 0f div \[r0\]\.ub, r15 |
|||
6c: 06 20 08 00 div \[r0\]\.b, r0 |
|||
70: 06 20 08 0f div \[r0\]\.b, r15 |
|||
74: 06 e0 08 00 div \[r0\]\.uw, r0 |
|||
78: 06 e0 08 0f div \[r0\]\.uw, r15 |
|||
7c: 06 60 08 00 div \[r0\]\.w, r0 |
|||
80: 06 60 08 0f div \[r0\]\.w, r15 |
|||
84: 06 a0 08 00 div \[r0\]\.l, r0 |
|||
88: 06 a0 08 0f div \[r0\]\.l, r15 |
|||
8c: fc 20 f0 div \[r15\]\.ub, r0 |
|||
8f: fc 20 ff div \[r15\]\.ub, r15 |
|||
92: 06 20 08 f0 div \[r15\]\.b, r0 |
|||
96: 06 20 08 ff div \[r15\]\.b, r15 |
|||
9a: 06 e0 08 f0 div \[r15\]\.uw, r0 |
|||
9e: 06 e0 08 ff div \[r15\]\.uw, r15 |
|||
a2: 06 60 08 f0 div \[r15\]\.w, r0 |
|||
a6: 06 60 08 ff div \[r15\]\.w, r15 |
|||
aa: 06 a0 08 f0 div \[r15\]\.l, r0 |
|||
ae: 06 a0 08 ff div \[r15\]\.l, r15 |
|||
b2: fc 21 00 fc div 252\[r0\]\.ub, r0 |
|||
b6: fc 21 0f fc div 252\[r0\]\.ub, r15 |
|||
ba: 06 21 08 00 fc div 252\[r0\]\.b, r0 |
|||
bf: 06 21 08 0f fc div 252\[r0\]\.b, r15 |
|||
c4: 06 e1 08 00 7e div 252\[r0\]\.uw, r0 |
|||
c9: 06 e1 08 0f 7e div 252\[r0\]\.uw, r15 |
|||
ce: 06 61 08 00 7e div 252\[r0\]\.w, r0 |
|||
d3: 06 61 08 0f 7e div 252\[r0\]\.w, r15 |
|||
d8: 06 a1 08 00 3f div 252\[r0\]\.l, r0 |
|||
dd: 06 a1 08 0f 3f div 252\[r0\]\.l, r15 |
|||
e2: fc 21 f0 fc div 252\[r15\]\.ub, r0 |
|||
e6: fc 21 ff fc div 252\[r15\]\.ub, r15 |
|||
ea: 06 21 08 f0 fc div 252\[r15\]\.b, r0 |
|||
ef: 06 21 08 ff fc div 252\[r15\]\.b, r15 |
|||
f4: 06 e1 08 f0 7e div 252\[r15\]\.uw, r0 |
|||
f9: 06 e1 08 ff 7e div 252\[r15\]\.uw, r15 |
|||
fe: 06 61 08 f0 7e div 252\[r15\]\.w, r0 |
|||
103: 06 61 08 ff 7e div 252\[r15\]\.w, r15 |
|||
108: 06 a1 08 f0 3f div 252\[r15\]\.l, r0 |
|||
10d: 06 a1 08 ff 3f div 252\[r15\]\.l, r15 |
|||
112: fc 22 00 fc ff div 65532\[r0\]\.ub, r0 |
|||
117: fc 22 0f fc ff div 65532\[r0\]\.ub, r15 |
|||
11c: 06 22 08 00 fc ff div 65532\[r0\]\.b, r0 |
|||
122: 06 22 08 0f fc ff div 65532\[r0\]\.b, r15 |
|||
128: 06 e2 08 00 fe 7f div 65532\[r0\]\.uw, r0 |
|||
12e: 06 e2 08 0f fe 7f div 65532\[r0\]\.uw, r15 |
|||
134: 06 62 08 00 fe 7f div 65532\[r0\]\.w, r0 |
|||
13a: 06 62 08 0f fe 7f div 65532\[r0\]\.w, r15 |
|||
140: 06 a2 08 00 ff 3f div 65532\[r0\]\.l, r0 |
|||
146: 06 a2 08 0f ff 3f div 65532\[r0\]\.l, r15 |
|||
14c: fc 22 f0 fc ff div 65532\[r15\]\.ub, r0 |
|||
151: fc 22 ff fc ff div 65532\[r15\]\.ub, r15 |
|||
156: 06 22 08 f0 fc ff div 65532\[r15\]\.b, r0 |
|||
15c: 06 22 08 ff fc ff div 65532\[r15\]\.b, r15 |
|||
162: 06 e2 08 f0 fe 7f div 65532\[r15\]\.uw, r0 |
|||
168: 06 e2 08 ff fe 7f div 65532\[r15\]\.uw, r15 |
|||
16e: 06 62 08 f0 fe 7f div 65532\[r15\]\.w, r0 |
|||
174: 06 62 08 ff fe 7f div 65532\[r15\]\.w, r15 |
|||
17a: 06 a2 08 f0 ff 3f div 65532\[r15\]\.l, r0 |
|||
180: 06 a2 08 ff ff 3f div 65532\[r15\]\.l, r15 |
|||
@ -0,0 +1,4 @@ |
|||
div #{imm},{reg} |
|||
div {reg},{reg} |
|||
div {memx},{reg} |
|||
|
|||
@ -0,0 +1,88 @@ |
|||
#objdump: -dr |
|||
|
|||
dump\.o: file format .* |
|||
|
|||
|
|||
Disassembly of section \.text: |
|||
|
|||
00000000 <\.text>: |
|||
0: fd 74 90 80 divu #-128, r0 |
|||
4: fd 74 9f 80 divu #-128, r15 |
|||
8: fd 74 90 7f divu #127, r0 |
|||
c: fd 74 9f 7f divu #127, r15 |
|||
10: fd 78 90 00 80 divu #0xffff8000, r0 |
|||
15: fd 78 9f 00 80 divu #0xffff8000, r15 |
|||
1a: fd 7c 90 00 80 00 divu #0x8000, r0 |
|||
20: fd 7c 9f 00 80 00 divu #0x8000, r15 |
|||
26: fd 7c 90 00 00 80 divu #0xff800000, r0 |
|||
2c: fd 7c 9f 00 00 80 divu #0xff800000, r15 |
|||
32: fd 7c 90 ff ff 7f divu #0x7fffff, r0 |
|||
38: fd 7c 9f ff ff 7f divu #0x7fffff, r15 |
|||
3e: fd 70 90 00 00 00 80 divu #0x80000000, r0 |
|||
45: fd 70 9f 00 00 00 80 divu #0x80000000, r15 |
|||
4c: fd 70 90 ff ff ff 7f divu #0x7fffffff, r0 |
|||
53: fd 70 9f ff ff ff 7f divu #0x7fffffff, r15 |
|||
5a: fc 27 00 divu r0, r0 |
|||
5d: fc 27 0f divu r0, r15 |
|||
60: fc 27 f0 divu r15, r0 |
|||
63: fc 27 ff divu r15, r15 |
|||
66: fc 24 00 divu \[r0\]\.ub, r0 |
|||
69: fc 24 0f divu \[r0\]\.ub, r15 |
|||
6c: 06 20 09 00 divu \[r0\]\.b, r0 |
|||
70: 06 20 09 0f divu \[r0\]\.b, r15 |
|||
74: 06 e0 09 00 divu \[r0\]\.uw, r0 |
|||
78: 06 e0 09 0f divu \[r0\]\.uw, r15 |
|||
7c: 06 60 09 00 divu \[r0\]\.w, r0 |
|||
80: 06 60 09 0f divu \[r0\]\.w, r15 |
|||
84: 06 a0 09 00 divu \[r0\]\.l, r0 |
|||
88: 06 a0 09 0f divu \[r0\]\.l, r15 |
|||
8c: fc 24 f0 divu \[r15\]\.ub, r0 |
|||
8f: fc 24 ff divu \[r15\]\.ub, r15 |
|||
92: 06 20 09 f0 divu \[r15\]\.b, r0 |
|||
96: 06 20 09 ff divu \[r15\]\.b, r15 |
|||
9a: 06 e0 09 f0 divu \[r15\]\.uw, r0 |
|||
9e: 06 e0 09 ff divu \[r15\]\.uw, r15 |
|||
a2: 06 60 09 f0 divu \[r15\]\.w, r0 |
|||
a6: 06 60 09 ff divu \[r15\]\.w, r15 |
|||
aa: 06 a0 09 f0 divu \[r15\]\.l, r0 |
|||
ae: 06 a0 09 ff divu \[r15\]\.l, r15 |
|||
b2: fc 25 00 fc divu 252\[r0\]\.ub, r0 |
|||
b6: fc 25 0f fc divu 252\[r0\]\.ub, r15 |
|||
ba: 06 21 09 00 fc divu 252\[r0\]\.b, r0 |
|||
bf: 06 21 09 0f fc divu 252\[r0\]\.b, r15 |
|||
c4: 06 e1 09 00 7e divu 252\[r0\]\.uw, r0 |
|||
c9: 06 e1 09 0f 7e divu 252\[r0\]\.uw, r15 |
|||
ce: 06 61 09 00 7e divu 252\[r0\]\.w, r0 |
|||
d3: 06 61 09 0f 7e divu 252\[r0\]\.w, r15 |
|||
d8: 06 a1 09 00 3f divu 252\[r0\]\.l, r0 |
|||
dd: 06 a1 09 0f 3f divu 252\[r0\]\.l, r15 |
|||
e2: fc 25 f0 fc divu 252\[r15\]\.ub, r0 |
|||
e6: fc 25 ff fc divu 252\[r15\]\.ub, r15 |
|||
ea: 06 21 09 f0 fc divu 252\[r15\]\.b, r0 |
|||
ef: 06 21 09 ff fc divu 252\[r15\]\.b, r15 |
|||
f4: 06 e1 09 f0 7e divu 252\[r15\]\.uw, r0 |
|||
f9: 06 e1 09 ff 7e divu 252\[r15\]\.uw, r15 |
|||
fe: 06 61 09 f0 7e divu 252\[r15\]\.w, r0 |
|||
103: 06 61 09 ff 7e divu 252\[r15\]\.w, r15 |
|||
108: 06 a1 09 f0 3f divu 252\[r15\]\.l, r0 |
|||
10d: 06 a1 09 ff 3f divu 252\[r15\]\.l, r15 |
|||
112: fc 26 00 fc ff divu 65532\[r0\]\.ub, r0 |
|||
117: fc 26 0f fc ff divu 65532\[r0\]\.ub, r15 |
|||
11c: 06 22 09 00 fc ff divu 65532\[r0\]\.b, r0 |
|||
122: 06 22 09 0f fc ff divu 65532\[r0\]\.b, r15 |
|||
128: 06 e2 09 00 fe 7f divu 65532\[r0\]\.uw, r0 |
|||
12e: 06 e2 09 0f fe 7f divu 65532\[r0\]\.uw, r15 |
|||
134: 06 62 09 00 fe 7f divu 65532\[r0\]\.w, r0 |
|||
13a: 06 62 09 0f fe 7f divu 65532\[r0\]\.w, r15 |
|||
140: 06 a2 09 00 ff 3f divu 65532\[r0\]\.l, r0 |
|||
146: 06 a2 09 0f ff 3f divu 65532\[r0\]\.l, r15 |
|||
14c: fc 26 f0 fc ff divu 65532\[r15\]\.ub, r0 |
|||
151: fc 26 ff fc ff divu 65532\[r15\]\.ub, r15 |
|||
156: 06 22 09 f0 fc ff divu 65532\[r15\]\.b, r0 |
|||
15c: 06 22 09 ff fc ff divu 65532\[r15\]\.b, r15 |
|||
162: 06 e2 09 f0 fe 7f divu 65532\[r15\]\.uw, r0 |
|||
168: 06 e2 09 ff fe 7f divu 65532\[r15\]\.uw, r15 |
|||
16e: 06 62 09 f0 fe 7f divu 65532\[r15\]\.w, r0 |
|||
174: 06 62 09 ff fe 7f divu 65532\[r15\]\.w, r15 |
|||
17a: 06 a2 09 f0 ff 3f divu 65532\[r15\]\.l, r0 |
|||
180: 06 a2 09 ff ff 3f divu 65532\[r15\]\.l, r15 |
|||
@ -0,0 +1,4 @@ |
|||
divu #{imm},{reg} |
|||
divu {reg},{reg} |
|||
divu {memx},{reg} |
|||
|
|||
@ -0,0 +1,88 @@ |
|||
#objdump: -dr |
|||
|
|||
dump\.o: file format .* |
|||
|
|||
|
|||
Disassembly of section \.text: |
|||
|
|||
00000000 <\.text>: |
|||
0: fd 74 60 80 emul #-128, r0 |
|||
4: fd 74 6e 80 emul #-128, r14 |
|||
8: fd 74 60 7f emul #127, r0 |
|||
c: fd 74 6e 7f emul #127, r14 |
|||
10: fd 78 60 00 80 emul #0xffff8000, r0 |
|||
15: fd 78 6e 00 80 emul #0xffff8000, r14 |
|||
1a: fd 7c 60 00 80 00 emul #0x8000, r0 |
|||
20: fd 7c 6e 00 80 00 emul #0x8000, r14 |
|||
26: fd 7c 60 00 00 80 emul #0xff800000, r0 |
|||
2c: fd 7c 6e 00 00 80 emul #0xff800000, r14 |
|||
32: fd 7c 60 ff ff 7f emul #0x7fffff, r0 |
|||
38: fd 7c 6e ff ff 7f emul #0x7fffff, r14 |
|||
3e: fd 70 60 00 00 00 80 emul #0x80000000, r0 |
|||
45: fd 70 6e 00 00 00 80 emul #0x80000000, r14 |
|||
4c: fd 70 60 ff ff ff 7f emul #0x7fffffff, r0 |
|||
53: fd 70 6e ff ff ff 7f emul #0x7fffffff, r14 |
|||
5a: fc 1b 00 emul r0, r0 |
|||
5d: fc 1b 0e emul r0, r14 |
|||
60: fc 1b f0 emul r15, r0 |
|||
63: fc 1b fe emul r15, r14 |
|||
66: fc 18 00 emul \[r0\]\.ub, r0 |
|||
69: fc 18 0e emul \[r0\]\.ub, r14 |
|||
6c: 06 20 06 00 emul \[r0\]\.b, r0 |
|||
70: 06 20 06 0e emul \[r0\]\.b, r14 |
|||
74: 06 e0 06 00 emul \[r0\]\.uw, r0 |
|||
78: 06 e0 06 0e emul \[r0\]\.uw, r14 |
|||
7c: 06 60 06 00 emul \[r0\]\.w, r0 |
|||
80: 06 60 06 0e emul \[r0\]\.w, r14 |
|||
84: 06 a0 06 00 emul \[r0\]\.l, r0 |
|||
88: 06 a0 06 0e emul \[r0\]\.l, r14 |
|||
8c: fc 18 f0 emul \[r15\]\.ub, r0 |
|||
8f: fc 18 fe emul \[r15\]\.ub, r14 |
|||
92: 06 20 06 f0 emul \[r15\]\.b, r0 |
|||
96: 06 20 06 fe emul \[r15\]\.b, r14 |
|||
9a: 06 e0 06 f0 emul \[r15\]\.uw, r0 |
|||
9e: 06 e0 06 fe emul \[r15\]\.uw, r14 |
|||
a2: 06 60 06 f0 emul \[r15\]\.w, r0 |
|||
a6: 06 60 06 fe emul \[r15\]\.w, r14 |
|||
aa: 06 a0 06 f0 emul \[r15\]\.l, r0 |
|||
ae: 06 a0 06 fe emul \[r15\]\.l, r14 |
|||
b2: fc 19 00 fc emul 252\[r0\]\.ub, r0 |
|||
b6: fc 19 0e fc emul 252\[r0\]\.ub, r14 |
|||
ba: 06 21 06 00 fc emul 252\[r0\]\.b, r0 |
|||
bf: 06 21 06 0e fc emul 252\[r0\]\.b, r14 |
|||
c4: 06 e1 06 00 7e emul 252\[r0\]\.uw, r0 |
|||
c9: 06 e1 06 0e 7e emul 252\[r0\]\.uw, r14 |
|||
ce: 06 61 06 00 7e emul 252\[r0\]\.w, r0 |
|||
d3: 06 61 06 0e 7e emul 252\[r0\]\.w, r14 |
|||
d8: 06 a1 06 00 3f emul 252\[r0\]\.l, r0 |
|||
dd: 06 a1 06 0e 3f emul 252\[r0\]\.l, r14 |
|||
e2: fc 19 f0 fc emul 252\[r15\]\.ub, r0 |
|||
e6: fc 19 fe fc emul 252\[r15\]\.ub, r14 |
|||
ea: 06 21 06 f0 fc emul 252\[r15\]\.b, r0 |
|||
ef: 06 21 06 fe fc emul 252\[r15\]\.b, r14 |
|||
f4: 06 e1 06 f0 7e emul 252\[r15\]\.uw, r0 |
|||
f9: 06 e1 06 fe 7e emul 252\[r15\]\.uw, r14 |
|||
fe: 06 61 06 f0 7e emul 252\[r15\]\.w, r0 |
|||
103: 06 61 06 fe 7e emul 252\[r15\]\.w, r14 |
|||
108: 06 a1 06 f0 3f emul 252\[r15\]\.l, r0 |
|||
10d: 06 a1 06 fe 3f emul 252\[r15\]\.l, r14 |
|||
112: fc 1a 00 fc ff emul 65532\[r0\]\.ub, r0 |
|||
117: fc 1a 0e fc ff emul 65532\[r0\]\.ub, r14 |
|||
11c: 06 22 06 00 fc ff emul 65532\[r0\]\.b, r0 |
|||
122: 06 22 06 0e fc ff emul 65532\[r0\]\.b, r14 |
|||
128: 06 e2 06 00 fe 7f emul 65532\[r0\]\.uw, r0 |
|||
12e: 06 e2 06 0e fe 7f emul 65532\[r0\]\.uw, r14 |
|||
134: 06 62 06 00 fe 7f emul 65532\[r0\]\.w, r0 |
|||
13a: 06 62 06 0e fe 7f emul 65532\[r0\]\.w, r14 |
|||
140: 06 a2 06 00 ff 3f emul 65532\[r0\]\.l, r0 |
|||
146: 06 a2 06 0e ff 3f emul 65532\[r0\]\.l, r14 |
|||
14c: fc 1a f0 fc ff emul 65532\[r15\]\.ub, r0 |
|||
151: fc 1a fe fc ff emul 65532\[r15\]\.ub, r14 |
|||
156: 06 22 06 f0 fc ff emul 65532\[r15\]\.b, r0 |
|||
15c: 06 22 06 fe fc ff emul 65532\[r15\]\.b, r14 |
|||
162: 06 e2 06 f0 fe 7f emul 65532\[r15\]\.uw, r0 |
|||
168: 06 e2 06 fe fe 7f emul 65532\[r15\]\.uw, r14 |
|||
16e: 06 62 06 f0 fe 7f emul 65532\[r15\]\.w, r0 |
|||
174: 06 62 06 fe fe 7f emul 65532\[r15\]\.w, r14 |
|||
17a: 06 a2 06 f0 ff 3f emul 65532\[r15\]\.l, r0 |
|||
180: 06 a2 06 fe ff 3f emul 65532\[r15\]\.l, r14 |
|||
@ -0,0 +1,4 @@ |
|||
emul #{imm},{reg2} |
|||
emul {reg},{reg2} |
|||
emul {memx},{reg2} |
|||
|
|||
@ -0,0 +1,88 @@ |
|||
#objdump: -dr |
|||
|
|||
dump\.o: file format .* |
|||
|
|||
|
|||
Disassembly of section \.text: |
|||
|
|||
00000000 <\.text>: |
|||
0: fd 74 70 80 emulu #-128, r0 |
|||
4: fd 74 7e 80 emulu #-128, r14 |
|||
8: fd 74 70 7f emulu #127, r0 |
|||
c: fd 74 7e 7f emulu #127, r14 |
|||
10: fd 78 70 00 80 emulu #0xffff8000, r0 |
|||
15: fd 78 7e 00 80 emulu #0xffff8000, r14 |
|||
1a: fd 7c 70 00 80 00 emulu #0x8000, r0 |
|||
20: fd 7c 7e 00 80 00 emulu #0x8000, r14 |
|||
26: fd 7c 70 00 00 80 emulu #0xff800000, r0 |
|||
2c: fd 7c 7e 00 00 80 emulu #0xff800000, r14 |
|||
32: fd 7c 70 ff ff 7f emulu #0x7fffff, r0 |
|||
38: fd 7c 7e ff ff 7f emulu #0x7fffff, r14 |
|||
3e: fd 70 70 00 00 00 80 emulu #0x80000000, r0 |
|||
45: fd 70 7e 00 00 00 80 emulu #0x80000000, r14 |
|||
4c: fd 70 70 ff ff ff 7f emulu #0x7fffffff, r0 |
|||
53: fd 70 7e ff ff ff 7f emulu #0x7fffffff, r14 |
|||
5a: fc 1f 00 emulu r0, r0 |
|||
5d: fc 1f 0e emulu r0, r14 |
|||
60: fc 1f f0 emulu r15, r0 |
|||
63: fc 1f fe emulu r15, r14 |
|||
66: fc 1c 00 emulu \[r0\]\.ub, r0 |
|||
69: fc 1c 0e emulu \[r0\]\.ub, r14 |
|||
6c: 06 20 07 00 emulu \[r0\]\.b, r0 |
|||
70: 06 20 07 0e emulu \[r0\]\.b, r14 |
|||
74: 06 e0 07 00 emulu \[r0\]\.uw, r0 |
|||
78: 06 e0 07 0e emulu \[r0\]\.uw, r14 |
|||
7c: 06 60 07 00 emulu \[r0\]\.w, r0 |
|||
80: 06 60 07 0e emulu \[r0\]\.w, r14 |
|||
84: 06 a0 07 00 emulu \[r0\]\.l, r0 |
|||
88: 06 a0 07 0e emulu \[r0\]\.l, r14 |
|||
8c: fc 1c f0 emulu \[r15\]\.ub, r0 |
|||
8f: fc 1c fe emulu \[r15\]\.ub, r14 |
|||
92: 06 20 07 f0 emulu \[r15\]\.b, r0 |
|||
96: 06 20 07 fe emulu \[r15\]\.b, r14 |
|||
9a: 06 e0 07 f0 emulu \[r15\]\.uw, r0 |
|||
9e: 06 e0 07 fe emulu \[r15\]\.uw, r14 |
|||
a2: 06 60 07 f0 emulu \[r15\]\.w, r0 |
|||
a6: 06 60 07 fe emulu \[r15\]\.w, r14 |
|||
aa: 06 a0 07 f0 emulu \[r15\]\.l, r0 |
|||
ae: 06 a0 07 fe emulu \[r15\]\.l, r14 |
|||
b2: fc 1d 00 fc emulu 252\[r0\]\.ub, r0 |
|||
b6: fc 1d 0e fc emulu 252\[r0\]\.ub, r14 |
|||
ba: 06 21 07 00 fc emulu 252\[r0\]\.b, r0 |
|||
bf: 06 21 07 0e fc emulu 252\[r0\]\.b, r14 |
|||
c4: 06 e1 07 00 7e emulu 252\[r0\]\.uw, r0 |
|||
c9: 06 e1 07 0e 7e emulu 252\[r0\]\.uw, r14 |
|||
ce: 06 61 07 00 7e emulu 252\[r0\]\.w, r0 |
|||
d3: 06 61 07 0e 7e emulu 252\[r0\]\.w, r14 |
|||
d8: 06 a1 07 00 3f emulu 252\[r0\]\.l, r0 |
|||
dd: 06 a1 07 0e 3f emulu 252\[r0\]\.l, r14 |
|||
e2: fc 1d f0 fc emulu 252\[r15\]\.ub, r0 |
|||
e6: fc 1d fe fc emulu 252\[r15\]\.ub, r14 |
|||
ea: 06 21 07 f0 fc emulu 252\[r15\]\.b, r0 |
|||
ef: 06 21 07 fe fc emulu 252\[r15\]\.b, r14 |
|||
f4: 06 e1 07 f0 7e emulu 252\[r15\]\.uw, r0 |
|||
f9: 06 e1 07 fe 7e emulu 252\[r15\]\.uw, r14 |
|||
fe: 06 61 07 f0 7e emulu 252\[r15\]\.w, r0 |
|||
103: 06 61 07 fe 7e emulu 252\[r15\]\.w, r14 |
|||
108: 06 a1 07 f0 3f emulu 252\[r15\]\.l, r0 |
|||
10d: 06 a1 07 fe 3f emulu 252\[r15\]\.l, r14 |
|||
112: fc 1e 00 fc ff emulu 65532\[r0\]\.ub, r0 |
|||
117: fc 1e 0e fc ff emulu 65532\[r0\]\.ub, r14 |
|||
11c: 06 22 07 00 fc ff emulu 65532\[r0\]\.b, r0 |
|||
122: 06 22 07 0e fc ff emulu 65532\[r0\]\.b, r14 |
|||
128: 06 e2 07 00 fe 7f emulu 65532\[r0\]\.uw, r0 |
|||
12e: 06 e2 07 0e fe 7f emulu 65532\[r0\]\.uw, r14 |
|||
134: 06 62 07 00 fe 7f emulu 65532\[r0\]\.w, r0 |
|||
13a: 06 62 07 0e fe 7f emulu 65532\[r0\]\.w, r14 |
|||
140: 06 a2 07 00 ff 3f emulu 65532\[r0\]\.l, r0 |
|||
146: 06 a2 07 0e ff 3f emulu 65532\[r0\]\.l, r14 |
|||
14c: fc 1e f0 fc ff emulu 65532\[r15\]\.ub, r0 |
|||
151: fc 1e fe fc ff emulu 65532\[r15\]\.ub, r14 |
|||
156: 06 22 07 f0 fc ff emulu 65532\[r15\]\.b, r0 |
|||
15c: 06 22 07 fe fc ff emulu 65532\[r15\]\.b, r14 |
|||
162: 06 e2 07 f0 fe 7f emulu 65532\[r15\]\.uw, r0 |
|||
168: 06 e2 07 fe fe 7f emulu 65532\[r15\]\.uw, r14 |
|||
16e: 06 62 07 f0 fe 7f emulu 65532\[r15\]\.w, r0 |
|||
174: 06 62 07 fe fe 7f emulu 65532\[r15\]\.w, r14 |
|||
17a: 06 a2 07 f0 ff 3f emulu 65532\[r15\]\.l, r0 |
|||
180: 06 a2 07 fe ff 3f emulu 65532\[r15\]\.l, r14 |
|||
@ -0,0 +1,4 @@ |
|||
emulu #{imm},{reg2} |
|||
emulu {reg},{reg2} |
|||
emulu {memx},{reg2} |
|||
|
|||
@ -0,0 +1,199 @@ |
|||
#!/usr/bin/perl |
|||
# -*- perl -*- |
|||
|
|||
# Copyright (C) 2006 Red Hat Inc. |
|||
# |
|||
# This file is part of GAS, the GNU Assembler. |
|||
# |
|||
# GAS is free software; you can redistribute it and/or modify |
|||
# it under the terms of the GNU General Public License as published by |
|||
# the Free Software Foundation; either version 2, or (at your option) |
|||
# any later version. |
|||
# |
|||
# GAS is distributed in the hope that it will be useful, |
|||
# but WITHOUT ANY WARRANTY; without even the implied warranty of |
|||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|||
# GNU General Public License for more details. |
|||
# |
|||
# You should have received a copy of the GNU General Public License |
|||
# along with GAS; see the file COPYING. If not, write to |
|||
# the Free Software Foundation, 59 Temple Place - Suite 330, |
|||
# Boston, MA 02111-1307, USA. */ |
|||
|
|||
%myfiles = (); |
|||
|
|||
$incdir = "."; |
|||
|
|||
while ($ARGV[0] =~ /^-/) { |
|||
$opt = shift; |
|||
if ($opt eq "-I") { |
|||
$incdir = shift; |
|||
} |
|||
} |
|||
|
|||
$infile = shift; |
|||
$outfile = shift; |
|||
|
|||
$inbase = $infile; |
|||
$inbase =~ s@.*/@@; |
|||
$inbase =~ s@[^a-zA-Z0-9].*@@; |
|||
|
|||
$t = 0; |
|||
$errors = 0; |
|||
|
|||
if ($outfile) { |
|||
open(OUT, ">$outfile"); |
|||
} else { |
|||
open(OUT, ">&STDOUT"); |
|||
} |
|||
|
|||
open(I, "$incdir/macros.inc") || die("$incdir/macros.inc: $!"); |
|||
&read_file(); |
|||
close I; |
|||
open(I, $infile) || die("$infile: $!"); |
|||
&read_file(); |
|||
close I; |
|||
|
|||
sub read_file { |
|||
while (<I>) { |
|||
$line ++; |
|||
next if /^;/; |
|||
s/[\r\n]+$//; |
|||
if (/^macro\s+(\S+)\s+(.*)/) { |
|||
($name, $val) = ($1,$2); |
|||
print "set macro \"$name\" to \"$val\"\n" if $t; |
|||
$macro{$name} = $val; |
|||
} elsif (/\S/) { |
|||
&explode($_); |
|||
} |
|||
} |
|||
} |
|||
|
|||
exit ($errors); |
|||
|
|||
# There's no way to quote braces so you can output them :-P |
|||
|
|||
sub explode { |
|||
my ($s) = @_; |
|||
my ($a, $b, $p, $e, @params); |
|||
|
|||
print "explode($s)\n" if $t; |
|||
|
|||
($b, $a, @params) = &split_braces($s); |
|||
@params = explode_params (@params); |
|||
if (! $a && ! @params) { |
|||
if ($t) { |
|||
print "\033[33m$s\033[0m\n"; |
|||
} else { |
|||
print OUT "$s\n"; |
|||
} |
|||
return; |
|||
} |
|||
if (@params == 1 && defined $macro{$params[0]}) { |
|||
$p = $macro{$params[0]}; |
|||
&explode ("$b$p$a"); |
|||
} else { |
|||
for $p (@params) { |
|||
&explode ("$b$p$a"); |
|||
} |
|||
} |
|||
} |
|||
|
|||
sub explode_params { |
|||
my (@p) = @_; |
|||
my ($p,@r); |
|||
|
|||
@r = (); |
|||
while (@p) { |
|||
$p = shift @p; |
|||
($b,$a,@e) = split_braces ($p); |
|||
if (defined $a) { |
|||
for $e (reverse @e) { |
|||
unshift (@p, "$b$e$a"); |
|||
} |
|||
} else { |
|||
push (@r, $p); |
|||
} |
|||
} |
|||
return @r; |
|||
} |
|||
|
|||
sub getmacro { |
|||
my ($v) = $macro{$_[0]}; |
|||
if (! defined $v) { |
|||
print STDERR "$line: Error: macro $_[0] not defined\n"; |
|||
$errors ++; |
|||
} |
|||
return $v; |
|||
} |
|||
|
|||
sub expand_macros { |
|||
my ($l) = @_; |
|||
0 while $l =~ s/{([^{};]+)}/&getmacro($1)/ge; |
|||
return $l; |
|||
} |
|||
|
|||
# returns (before, after, list of variances) |
|||
sub split_braces { |
|||
my ($l) = @_; |
|||
my (@l, $i, $a, @parms, $b, $n,$p); |
|||
|
|||
print "split_braces($l) = (" if $t; |
|||
|
|||
$l = &expand_macros ($l); |
|||
|
|||
if ($l !~ /\{.*\}/) { |
|||
print "nothing)\n" if $t; |
|||
return ($l); |
|||
} |
|||
if ($l =~ /^{([^{};]+)}/) { |
|||
print "macro:", $macro{$1}, ")\n" if $t; |
|||
return (&getmacro($1), ""); |
|||
} |
|||
|
|||
$n = 0; |
|||
@parms = (''); |
|||
$p = 0; |
|||
|
|||
($a, $l) = $l =~ m@^([^\{]*)\{(.*)@; |
|||
@l = split(//, $l); |
|||
|
|||
while (defined ($i = shift @l)) { |
|||
if ($n == 0) { |
|||
print "\033[32m$i" if $t; |
|||
if ($i eq '}') { |
|||
print "\033[0m$a, ", join('', @l), ", (", join("\033[31m;\033[0m", @parms), ")\n" if $t; |
|||
return ($a, join('',@l), @parms); |
|||
} elsif ($i eq ';') { |
|||
$p ++; |
|||
$parms[$p] = ''; |
|||
} else { |
|||
$parms[$p] .= $i; |
|||
$n ++ if $i eq '{'; |
|||
} |
|||
} else { |
|||
print "\033[34m$i" if $t; |
|||
$n ++ if $i eq '{'; |
|||
$n -- if $i eq '}'; |
|||
$parms[$p] .= $i; |
|||
} |
|||
} |
|||
print "$a, <null>, (", join(';', @parms), ")\n" if $t; |
|||
return ($a, "", @parms); |
|||
} |
|||
|
|||
__END__; |
|||
|
|||
macro rest c,d |
|||
foo {a;b},{{rest};e;} |
|||
|
|||
expands to: |
|||
|
|||
foo a,c |
|||
foo a,d |
|||
foo a,e |
|||
foo a, |
|||
foo b,c |
|||
foo b,d |
|||
foo b,e |
|||
foo b, |
|||
@ -0,0 +1,28 @@ |
|||
#objdump: -dr |
|||
|
|||
dump\.o: file format .* |
|||
|
|||
|
|||
Disassembly of section \.text: |
|||
|
|||
00000000 <\.text>: |
|||
0: fd 72 20 00 00 00 80 fadd #0x80000000, r0 |
|||
7: fd 72 2f 00 00 00 80 fadd #0x80000000, r15 |
|||
e: fd 72 20 ff ff ff ff fadd #-1, r0 |
|||
15: fd 72 2f ff ff ff ff fadd #-1, r15 |
|||
1c: fc 8b 00 fadd r0, r0 |
|||
1f: fc 8b 0f fadd r0, r15 |
|||
22: fc 8b f0 fadd r15, r0 |
|||
25: fc 8b ff fadd r15, r15 |
|||
28: fc 88 00 fadd \[r0\]\.l, r0 |
|||
2b: fc 88 0f fadd \[r0\]\.l, r15 |
|||
2e: fc 88 f0 fadd \[r15\]\.l, r0 |
|||
31: fc 88 ff fadd \[r15\]\.l, r15 |
|||
34: fc 89 00 3f fadd 252\[r0\]\.l, r0 |
|||
38: fc 89 0f 3f fadd 252\[r0\]\.l, r15 |
|||
3c: fc 89 f0 3f fadd 252\[r15\]\.l, r0 |
|||
40: fc 89 ff 3f fadd 252\[r15\]\.l, r15 |
|||
44: fc 8a 00 ff 3f fadd 65532\[r0\]\.l, r0 |
|||
49: fc 8a 0f ff 3f fadd 65532\[r0\]\.l, r15 |
|||
4e: fc 8a f0 ff 3f fadd 65532\[r15\]\.l, r0 |
|||
53: fc 8a ff ff 3f fadd 65532\[r15\]\.l, r15 |
|||
@ -0,0 +1,3 @@ |
|||
fadd #{imm32},{reg} |
|||
fadd {reg},{reg} |
|||
fadd {mem}.L,{reg} |
|||
@ -0,0 +1,28 @@ |
|||
#objdump: -dr |
|||
|
|||
dump\.o: file format .* |
|||
|
|||
|
|||
Disassembly of section \.text: |
|||
|
|||
00000000 <\.text>: |
|||
0: fd 72 10 00 00 00 80 fcmp #0x80000000, r0 |
|||
7: fd 72 1f 00 00 00 80 fcmp #0x80000000, r15 |
|||
e: fd 72 10 ff ff ff ff fcmp #-1, r0 |
|||
15: fd 72 1f ff ff ff ff fcmp #-1, r15 |
|||
1c: fc 87 00 fcmp r0, r0 |
|||
1f: fc 87 0f fcmp r0, r15 |
|||
22: fc 87 f0 fcmp r15, r0 |
|||
25: fc 87 ff fcmp r15, r15 |
|||
28: fc 84 00 fcmp \[r0\]\.l, r0 |
|||
2b: fc 84 0f fcmp \[r0\]\.l, r15 |
|||
2e: fc 84 f0 fcmp \[r15\]\.l, r0 |
|||
31: fc 84 ff fcmp \[r15\]\.l, r15 |
|||
34: fc 85 00 3f fcmp 252\[r0\]\.l, r0 |
|||
38: fc 85 0f 3f fcmp 252\[r0\]\.l, r15 |
|||
3c: fc 85 f0 3f fcmp 252\[r15\]\.l, r0 |
|||
40: fc 85 ff 3f fcmp 252\[r15\]\.l, r15 |
|||
44: fc 86 00 ff 3f fcmp 65532\[r0\]\.l, r0 |
|||
49: fc 86 0f ff 3f fcmp 65532\[r0\]\.l, r15 |
|||
4e: fc 86 f0 ff 3f fcmp 65532\[r15\]\.l, r0 |
|||
53: fc 86 ff ff 3f fcmp 65532\[r15\]\.l, r15 |
|||
@ -0,0 +1,3 @@ |
|||
fcmp #{imm32},{reg} |
|||
fcmp {reg},{reg} |
|||
fcmp {mem}.L,{reg} |
|||
@ -0,0 +1,28 @@ |
|||
#objdump: -dr |
|||
|
|||
dump\.o: file format .* |
|||
|
|||
|
|||
Disassembly of section \.text: |
|||
|
|||
00000000 <\.text>: |
|||
0: fd 72 40 00 00 00 80 fdiv #0x80000000, r0 |
|||
7: fd 72 4f 00 00 00 80 fdiv #0x80000000, r15 |
|||
e: fd 72 40 ff ff ff ff fdiv #-1, r0 |
|||
15: fd 72 4f ff ff ff ff fdiv #-1, r15 |
|||
1c: fc 93 00 fdiv r0, r0 |
|||
1f: fc 93 0f fdiv r0, r15 |
|||
22: fc 93 f0 fdiv r15, r0 |
|||
25: fc 93 ff fdiv r15, r15 |
|||
28: fc 90 00 fdiv \[r0\]\.l, r0 |
|||
2b: fc 90 0f fdiv \[r0\]\.l, r15 |
|||
2e: fc 90 f0 fdiv \[r15\]\.l, r0 |
|||
31: fc 90 ff fdiv \[r15\]\.l, r15 |
|||
34: fc 91 00 3f fdiv 252\[r0\]\.l, r0 |
|||
38: fc 91 0f 3f fdiv 252\[r0\]\.l, r15 |
|||
3c: fc 91 f0 3f fdiv 252\[r15\]\.l, r0 |
|||
40: fc 91 ff 3f fdiv 252\[r15\]\.l, r15 |
|||
44: fc 92 00 ff 3f fdiv 65532\[r0\]\.l, r0 |
|||
49: fc 92 0f ff 3f fdiv 65532\[r0\]\.l, r15 |
|||
4e: fc 92 f0 ff 3f fdiv 65532\[r15\]\.l, r0 |
|||
53: fc 92 ff ff 3f fdiv 65532\[r15\]\.l, r15 |
|||
@ -0,0 +1,3 @@ |
|||
fdiv #{imm32},{reg} |
|||
fdiv {reg},{reg} |
|||
fdiv {mem}.L,{reg} |
|||
@ -0,0 +1,28 @@ |
|||
#objdump: -dr |
|||
|
|||
dump\.o: file format .* |
|||
|
|||
|
|||
Disassembly of section \.text: |
|||
|
|||
00000000 <\.text>: |
|||
0: fd 72 30 00 00 00 80 fmul #0x80000000, r0 |
|||
7: fd 72 3f 00 00 00 80 fmul #0x80000000, r15 |
|||
e: fd 72 30 ff ff ff ff fmul #-1, r0 |
|||
15: fd 72 3f ff ff ff ff fmul #-1, r15 |
|||
1c: fc 8f 00 fmul r0, r0 |
|||
1f: fc 8f 0f fmul r0, r15 |
|||
22: fc 8f f0 fmul r15, r0 |
|||
25: fc 8f ff fmul r15, r15 |
|||
28: fc 8c 00 fmul \[r0\]\.l, r0 |
|||
2b: fc 8c 0f fmul \[r0\]\.l, r15 |
|||
2e: fc 8c f0 fmul \[r15\]\.l, r0 |
|||
31: fc 8c ff fmul \[r15\]\.l, r15 |
|||
34: fc 8d 00 3f fmul 252\[r0\]\.l, r0 |
|||
38: fc 8d 0f 3f fmul 252\[r0\]\.l, r15 |
|||
3c: fc 8d f0 3f fmul 252\[r15\]\.l, r0 |
|||
40: fc 8d ff 3f fmul 252\[r15\]\.l, r15 |
|||
44: fc 8e 00 ff 3f fmul 65532\[r0\]\.l, r0 |
|||
49: fc 8e 0f ff 3f fmul 65532\[r0\]\.l, r15 |
|||
4e: fc 8e f0 ff 3f fmul 65532\[r15\]\.l, r0 |
|||
53: fc 8e ff ff 3f fmul 65532\[r15\]\.l, r15 |
|||
@ -0,0 +1,3 @@ |
|||
fmul #{imm32},{reg} |
|||
fmul {reg},{reg} |
|||
fmul {mem}.L,{reg} |
|||
@ -0,0 +1,28 @@ |
|||
#objdump: -dr |
|||
|
|||
dump\.o: file format .* |
|||
|
|||
|
|||
Disassembly of section \.text: |
|||
|
|||
00000000 <\.text>: |
|||
0: fd 72 00 00 00 00 80 fsub #0x80000000, r0 |
|||
7: fd 72 0f 00 00 00 80 fsub #0x80000000, r15 |
|||
e: fd 72 00 ff ff ff ff fsub #-1, r0 |
|||
15: fd 72 0f ff ff ff ff fsub #-1, r15 |
|||
1c: fc 83 00 fsub r0, r0 |
|||
1f: fc 83 0f fsub r0, r15 |
|||
22: fc 83 f0 fsub r15, r0 |
|||
25: fc 83 ff fsub r15, r15 |
|||
28: fc 80 00 fsub \[r0\]\.l, r0 |
|||
2b: fc 80 0f fsub \[r0\]\.l, r15 |
|||
2e: fc 80 f0 fsub \[r15\]\.l, r0 |
|||
31: fc 80 ff fsub \[r15\]\.l, r15 |
|||
34: fc 81 00 3f fsub 252\[r0\]\.l, r0 |
|||
38: fc 81 0f 3f fsub 252\[r0\]\.l, r15 |
|||
3c: fc 81 f0 3f fsub 252\[r15\]\.l, r0 |
|||
40: fc 81 ff 3f fsub 252\[r15\]\.l, r15 |
|||
44: fc 82 00 ff 3f fsub 65532\[r0\]\.l, r0 |
|||
49: fc 82 0f ff 3f fsub 65532\[r0\]\.l, r15 |
|||
4e: fc 82 f0 ff 3f fsub 65532\[r15\]\.l, r0 |
|||
53: fc 82 ff ff 3f fsub 65532\[r15\]\.l, r15 |
|||
@ -0,0 +1,3 @@ |
|||
fsub #{imm32},{reg} |
|||
fsub {reg},{reg} |
|||
fsub {mem}.L,{reg} |
|||
@ -0,0 +1,24 @@ |
|||
#objdump: -dr |
|||
|
|||
dump\.o: file format .* |
|||
|
|||
|
|||
Disassembly of section \.text: |
|||
|
|||
00000000 <\.text>: |
|||
0: fc 97 00 ftoi r0, r0 |
|||
3: fc 97 0f ftoi r0, r15 |
|||
6: fc 97 f0 ftoi r15, r0 |
|||
9: fc 97 ff ftoi r15, r15 |
|||
c: fc 94 00 ftoi \[r0\]\.l, r0 |
|||
f: fc 94 0f ftoi \[r0\]\.l, r15 |
|||
12: fc 94 f0 ftoi \[r15\]\.l, r0 |
|||
15: fc 94 ff ftoi \[r15\]\.l, r15 |
|||
18: fc 95 00 3f ftoi 252\[r0\]\.l, r0 |
|||
1c: fc 95 0f 3f ftoi 252\[r0\]\.l, r15 |
|||
20: fc 95 f0 3f ftoi 252\[r15\]\.l, r0 |
|||
24: fc 95 ff 3f ftoi 252\[r15\]\.l, r15 |
|||
28: fc 96 00 ff 3f ftoi 65532\[r0\]\.l, r0 |
|||
2d: fc 96 0f ff 3f ftoi 65532\[r0\]\.l, r15 |
|||
32: fc 96 f0 ff 3f ftoi 65532\[r15\]\.l, r0 |
|||
37: fc 96 ff ff 3f ftoi 65532\[r15\]\.l, r15 |
|||
@ -0,0 +1,2 @@ |
|||
ftoi {reg},{reg} |
|||
ftoi {mem}.L,{reg} |
|||
@ -0,0 +1,53 @@ |
|||
#objdump: -dr |
|||
|
|||
dump\.o: file format .* |
|||
|
|||
|
|||
Disassembly of section .text: |
|||
|
|||
00000000 <_start>: |
|||
0: ce f1 04 00 mov\.b 4\[r15\], r1 |
|||
2: R_RX_SYM _foo |
|||
2: R_RX_SYM __gp |
|||
2: R_RX_OPsub __gp |
|||
2: R_RX_ABS16U __gp |
|||
4: ce f1 08 00 mov\.b 8\[r15\], r1 |
|||
6: R_RX_SYM _bar |
|||
6: R_RX_SYM __gp |
|||
6: R_RX_OPsub __gp |
|||
6: R_RX_ABS16U __gp |
|||
8: ce f1 00 00 mov\.b \[r15\], r1 |
|||
a: R_RX_SYM _grill |
|||
a: R_RX_SYM __gp |
|||
a: R_RX_OPsub __gp |
|||
a: R_RX_ABS16U __gp |
|||
c: de f1 02 00 mov\.w 4\[r15\], r1 |
|||
e: R_RX_SYM _foo |
|||
e: R_RX_SYM __gp |
|||
e: R_RX_OPsub __gp |
|||
e: R_RX_ABS16UW __gp |
|||
10: de f1 04 00 mov\.w 8\[r15\], r1 |
|||
12: R_RX_SYM _bar |
|||
12: R_RX_SYM __gp |
|||
12: R_RX_OPsub __gp |
|||
12: R_RX_ABS16UW __gp |
|||
14: de f1 00 00 mov\.w \[r15\], r1 |
|||
16: R_RX_SYM _grill |
|||
16: R_RX_SYM __gp |
|||
16: R_RX_OPsub __gp |
|||
16: R_RX_ABS16UW __gp |
|||
18: ee f1 01 00 mov\.l 4\[r15\], r1 |
|||
1a: R_RX_SYM _foo |
|||
1a: R_RX_SYM __gp |
|||
1a: R_RX_OPsub __gp |
|||
1a: R_RX_ABS16UL __gp |
|||
1c: ee f1 02 00 mov\.l 8\[r15\], r1 |
|||
1e: R_RX_SYM _bar |
|||
1e: R_RX_SYM __gp |
|||
1e: R_RX_OPsub __gp |
|||
1e: R_RX_ABS16UL __gp |
|||
20: ee f1 00 00 mov\.l \[r15\], r1 |
|||
22: R_RX_SYM _grill |
|||
22: R_RX_SYM __gp |
|||
22: R_RX_OPsub __gp |
|||
22: R_RX_ABS16UL __gp |
|||
@ -0,0 +1,9 @@ |
|||
.text |
|||
.global _start |
|||
_start: |
|||
mov{bwl} %gp({_foo;_bar;_grill})[r15], r1 |
|||
|
|||
.data |
|||
__gp: .long 0 |
|||
_foo: .long 5 |
|||
_bar: .long 6 |
|||
@ -0,0 +1,10 @@ |
|||
#objdump: -dr |
|||
|
|||
dump\.o: file format .* |
|||
|
|||
|
|||
Disassembly of section \.text: |
|||
|
|||
00000000 <\.text>: |
|||
0: 75 60 00 int #0 |
|||
3: 75 60 ff int #255 |
|||
@ -0,0 +1 @@ |
|||
int #{uimm8} |
|||
@ -0,0 +1,72 @@ |
|||
#objdump: -dr |
|||
|
|||
dump\.o: file format .* |
|||
|
|||
|
|||
Disassembly of section \.text: |
|||
|
|||
00000000 <\.text>: |
|||
0: fc 47 00 itof r0, r0 |
|||
3: fc 47 0f itof r0, r15 |
|||
6: fc 47 f0 itof r15, r0 |
|||
9: fc 47 ff itof r15, r15 |
|||
c: fc 44 00 itof \[r0\]\.ub, r0 |
|||
f: fc 44 0f itof \[r0\]\.ub, r15 |
|||
12: 06 20 11 00 itof \[r0\]\.b, r0 |
|||
16: 06 20 11 0f itof \[r0\]\.b, r15 |
|||
1a: 06 e0 11 00 itof \[r0\]\.uw, r0 |
|||
1e: 06 e0 11 0f itof \[r0\]\.uw, r15 |
|||
22: 06 60 11 00 itof \[r0\]\.w, r0 |
|||
26: 06 60 11 0f itof \[r0\]\.w, r15 |
|||
2a: 06 a0 11 00 itof \[r0\]\.l, r0 |
|||
2e: 06 a0 11 0f itof \[r0\]\.l, r15 |
|||
32: fc 44 f0 itof \[r15\]\.ub, r0 |
|||
35: fc 44 ff itof \[r15\]\.ub, r15 |
|||
38: 06 20 11 f0 itof \[r15\]\.b, r0 |
|||
3c: 06 20 11 ff itof \[r15\]\.b, r15 |
|||
40: 06 e0 11 f0 itof \[r15\]\.uw, r0 |
|||
44: 06 e0 11 ff itof \[r15\]\.uw, r15 |
|||
48: 06 60 11 f0 itof \[r15\]\.w, r0 |
|||
4c: 06 60 11 ff itof \[r15\]\.w, r15 |
|||
50: 06 a0 11 f0 itof \[r15\]\.l, r0 |
|||
54: 06 a0 11 ff itof \[r15\]\.l, r15 |
|||
58: fc 45 00 fc itof 252\[r0\]\.ub, r0 |
|||
5c: fc 45 0f fc itof 252\[r0\]\.ub, r15 |
|||
60: 06 21 11 00 fc itof 252\[r0\]\.b, r0 |
|||
65: 06 21 11 0f fc itof 252\[r0\]\.b, r15 |
|||
6a: 06 e1 11 00 7e itof 252\[r0\]\.uw, r0 |
|||
6f: 06 e1 11 0f 7e itof 252\[r0\]\.uw, r15 |
|||
74: 06 61 11 00 7e itof 252\[r0\]\.w, r0 |
|||
79: 06 61 11 0f 7e itof 252\[r0\]\.w, r15 |
|||
7e: 06 a1 11 00 3f itof 252\[r0\]\.l, r0 |
|||
83: 06 a1 11 0f 3f itof 252\[r0\]\.l, r15 |
|||
88: fc 45 f0 fc itof 252\[r15\]\.ub, r0 |
|||
8c: fc 45 ff fc itof 252\[r15\]\.ub, r15 |
|||
90: 06 21 11 f0 fc itof 252\[r15\]\.b, r0 |
|||
95: 06 21 11 ff fc itof 252\[r15\]\.b, r15 |
|||
9a: 06 e1 11 f0 7e itof 252\[r15\]\.uw, r0 |
|||
9f: 06 e1 11 ff 7e itof 252\[r15\]\.uw, r15 |
|||
a4: 06 61 11 f0 7e itof 252\[r15\]\.w, r0 |
|||
a9: 06 61 11 ff 7e itof 252\[r15\]\.w, r15 |
|||
ae: 06 a1 11 f0 3f itof 252\[r15\]\.l, r0 |
|||
b3: 06 a1 11 ff 3f itof 252\[r15\]\.l, r15 |
|||
b8: fc 46 00 fc ff itof 65532\[r0\]\.ub, r0 |
|||
bd: fc 46 0f fc ff itof 65532\[r0\]\.ub, r15 |
|||
c2: 06 22 11 00 fc ff itof 65532\[r0\]\.b, r0 |
|||
c8: 06 22 11 0f fc ff itof 65532\[r0\]\.b, r15 |
|||
ce: 06 e2 11 00 fe 7f itof 65532\[r0\]\.uw, r0 |
|||
d4: 06 e2 11 0f fe 7f itof 65532\[r0\]\.uw, r15 |
|||
da: 06 62 11 00 fe 7f itof 65532\[r0\]\.w, r0 |
|||
e0: 06 62 11 0f fe 7f itof 65532\[r0\]\.w, r15 |
|||
e6: 06 a2 11 00 ff 3f itof 65532\[r0\]\.l, r0 |
|||
ec: 06 a2 11 0f ff 3f itof 65532\[r0\]\.l, r15 |
|||
f2: fc 46 f0 fc ff itof 65532\[r15\]\.ub, r0 |
|||
f7: fc 46 ff fc ff itof 65532\[r15\]\.ub, r15 |
|||
fc: 06 22 11 f0 fc ff itof 65532\[r15\]\.b, r0 |
|||
102: 06 22 11 ff fc ff itof 65532\[r15\]\.b, r15 |
|||
108: 06 e2 11 f0 fe 7f itof 65532\[r15\]\.uw, r0 |
|||
10e: 06 e2 11 ff fe 7f itof 65532\[r15\]\.uw, r15 |
|||
114: 06 62 11 f0 fe 7f itof 65532\[r15\]\.w, r0 |
|||
11a: 06 62 11 ff fe 7f itof 65532\[r15\]\.w, r15 |
|||
120: 06 a2 11 f0 ff 3f itof 65532\[r15\]\.l, r0 |
|||
126: 06 a2 11 ff ff 3f itof 65532\[r15\]\.l, r15 |
|||
@ -0,0 +1,2 @@ |
|||
itof {reg},{reg} |
|||
itof {memx},{reg} |
|||
@ -0,0 +1,10 @@ |
|||
#objdump: -dr |
|||
|
|||
dump\.o: file format .* |
|||
|
|||
|
|||
Disassembly of section \.text: |
|||
|
|||
00000000 <\.text>: |
|||
0: 7f 00 jmp r0 |
|||
2: 7f 0f jmp r15 |
|||
Some files were not shown because too many files changed in this diff
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Reference in new issue