riscv
/
binutils-gdb
1
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity
Browse Source

[AArch64, Binutils] Add missing TSB instruction 

This patch implements the TSB instructions:
https://developer.arm.com/docs/ddi0596/f/base-instructions-alphabetic-order/
tsb-csync-trace-synchronization-barrier
Since TSB and PSB both use the same (and only) argument "CSYNC", this patch
reuses it for TSB. However, the same argument would imply different value
for CRm:Op2 which are anyway fixed values, so I have diverted the
inserter/extracter function to dummy versions instead of the "hint" version.
The operand checker part still uses the existing infratructure for
AARCH64_OPND_BARRIER_PSB to make sure the operand is parsed correctly.

gas/ChangeLog:

2020-04-20  Sudakshina Das  <sudi.das@arm.com>

	* config/tc-aarch64.c (parse_barrier_psb): Update error messages
	to include TSB.
	* testsuite/gas/aarch64/system-2.d: Update -march and new tsb tests.
	* testsuite/gas/aarch64/system-2.s: Add new tsb tests.
	* testsuite/gas/aarch64/system.d: Update.

opcodes/ChangeLog:

2020-04-20  Sudakshina Das  <sudi.das@arm.com>

	* aarch64-asm.c (aarch64_ins_none): New.
	* aarch64-asm.h (ins_none): New declaration.
	* aarch64-dis.c (aarch64_ext_none): New.
	* aarch64-dis.h (ext_none): New declaration.
	* aarch64-opc.c (aarch64_print_operand): Update case for
	AARCH64_OPND_BARRIER_PSB.
	* aarch64-tbl.h (aarch64_opcode_table): Add tsb.
	(AARCH64_OPERANDS): Update inserter/extracter for
	AARCH64_OPND_BARRIER_PSB to use new dummy functions.
	* aarch64-asm-2.c: Regenerated.
	* aarch64-dis-2.c: Regenerated.
	* aarch64-opc-2.c: Regenerated.
binutils-2_35-branch
Sudakshina Das 6 years ago
parent
8a6e1d1d7f
commit
c2e5c986b3
15 changed files with 1447 additions and 1385 deletions
Whitespace
Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL
Split View
Diff Options
Show Stats Download Patch File Download Diff File
  1. 8
      gas/ChangeLog
  2. 4
      gas/config/tc-aarch64.c
  3. 15
      gas/testsuite/gas/aarch64/system-2.d
  4. 5
      gas/testsuite/gas/aarch64/system-2.s
  5. 2
      gas/testsuite/gas/aarch64/system.d
  6. 15
      opcodes/ChangeLog
  7. 206
      opcodes/aarch64-asm-2.c
  8. 11
      opcodes/aarch64-asm.c
  9. 1
      opcodes/aarch64-asm.h
  10. 2528
      opcodes/aarch64-dis-2.c
  11. 10
      opcodes/aarch64-dis.c
  12. 1
      opcodes/aarch64-dis.h
  13. 18
      opcodes/aarch64-opc-2.c
  14. 3
      opcodes/aarch64-opc.c
  15. 5
      opcodes/aarch64-tbl.h

8
gas/ChangeLog
View File

@ -1,3 +1,11 @@
2020-04-20 Sudakshina Das <sudi.das@arm.com>
* config/tc-aarch64.c (parse_barrier_psb): Update error messages
to include TSB.
* testsuite/gas/aarch64/system-2.d: Update -march and new tsb tests.
* testsuite/gas/aarch64/system-2.s: Add new tsb tests.
* testsuite/gas/aarch64/system.d: Update.
2020-04-20 Sudakshina Das <sudi.das@arm.com>
* testsuite/gas/aarch64/bti.d: Update -march option.

4
gas/config/tc-aarch64.c
View File

@ -4026,7 +4026,7 @@ parse_barrier_psb (char **str,
if (!o)
{
set_fatal_syntax_error
( _("unknown or missing option to PSB"));
( _("unknown or missing option to PSB/TSB"));
return PARSE_FAIL;
}
@ -4034,7 +4034,7 @@ parse_barrier_psb (char **str,
{
/* PSB only accepts option name 'CSYNC'. */
set_syntax_error
(_("the specified option is not accepted for PSB"));
(_("the specified option is not accepted for PSB/TSB"));
return PARSE_FAIL;
}

15
gas/testsuite/gas/aarch64/system-2.d
View File

@ -1,4 +1,4 @@
#as: -march=armv8.2-a+profile
#as: -march=armv8-a
#objdump: -dr
.*: file format .*
@ -6,8 +6,11 @@
Disassembly of section \.text:
0+ <.*>:
0: d503221f esb
4: d503221f esb
8: d503223f psb csync
c: d503223f psb csync
10: d503223f psb csync
.*: d503221f esb
.*: d503221f esb
.*: d503223f psb csync
.*: d503223f psb csync
.*: d503223f psb csync
.*: d503225f tsb csync
.*: d503225f tsb csync
.*: d503225f tsb csync

5
gas/testsuite/gas/aarch64/system-2.s
View File

@ -9,3 +9,8 @@
psb csync
psb CSYNC
hint #0x11
/* Trace sync barrier. */
tsb csync
tsb CSYNC
hint #0x12

2
gas/testsuite/gas/aarch64/system.d
View File

@ -30,7 +30,7 @@ Disassembly of section \.text:
.*: d50321ff hint #0xf
.*: d503221f (hint #0x10|esb)
.*: d503223f (hint #0x11|psb csync)
.*: d503225f hint #0x12
.*: d503225f (hint #0x12|tsb csync)
.*: d503227f hint #0x13
.*: d503229f (hint #0x14|csdb)
.*: d50322bf hint #0x15

15
opcodes/ChangeLog
View File

@ -1,3 +1,18 @@
2020-04-20 Sudakshina Das <sudi.das@arm.com>
* aarch64-asm.c (aarch64_ins_none): New.
* aarch64-asm.h (ins_none): New declaration.
* aarch64-dis.c (aarch64_ext_none): New.
* aarch64-dis.h (ext_none): New declaration.
* aarch64-opc.c (aarch64_print_operand): Update case for
AARCH64_OPND_BARRIER_PSB.
* aarch64-tbl.h (aarch64_opcode_table): Add tsb.
(AARCH64_OPERANDS): Update inserter/extracter for
AARCH64_OPND_BARRIER_PSB to use new dummy functions.
* aarch64-asm-2.c: Regenerated.
* aarch64-dis-2.c: Regenerated.
* aarch64-opc-2.c: Regenerated.
2020-04-20 Sudakshina Das <sudi.das@arm.com>
* aarch64-tbl.h (aarch64_feature_bti, BTI, BTI_INSN): Remove.

206
opcodes/aarch64-asm-2.c
View File

@ -426,14 +426,15 @@ aarch64_find_real_opcode (const aarch64_opcode *opcode)
case 1183: /* movz */
value = 1183; /* --> movz. */
break;
case 1236: /* autibsp */
case 1235: /* autibz */
case 1234: /* autiasp */
case 1233: /* autiaz */
case 1232: /* pacibsp */
case 1231: /* pacibz */
case 1230: /* paciasp */
case 1229: /* paciaz */
case 1237: /* autibsp */
case 1236: /* autibz */
case 1235: /* autiasp */
case 1234: /* autiaz */
case 1233: /* pacibsp */
case 1232: /* pacibz */
case 1231: /* paciasp */
case 1230: /* paciaz */
case 1210: /* tsb */
case 1209: /* psb */
case 1208: /* esb */
case 1207: /* autib1716 */
@ -452,140 +453,140 @@ aarch64_find_real_opcode (const aarch64_opcode *opcode)
case 1193: /* hint */
value = 1193; /* --> hint. */
break;
case 1213: /* pssbb */
case 1212: /* ssbb */
case 1211: /* dsb */
value = 1211; /* --> dsb. */
break;
case 1224: /* cpp */
case 1223: /* dvp */
case 1222: /* cfp */
case 1221: /* tlbi */
case 1220: /* ic */
case 1219: /* dc */
case 1218: /* at */
case 1217: /* sys */
value = 1217; /* --> sys. */
break;
case 2034: /* bic */
case 1284: /* and */
value = 1284; /* --> and. */
case 1214: /* pssbb */
case 1213: /* ssbb */
case 1212: /* dsb */
value = 1212; /* --> dsb. */
break;
case 1225: /* cpp */
case 1224: /* dvp */
case 1223: /* cfp */
case 1222: /* tlbi */
case 1221: /* ic */
case 1220: /* dc */
case 1219: /* at */
case 1218: /* sys */
value = 1218; /* --> sys. */
break;
case 2035: /* bic */
case 1285: /* and */
value = 1285; /* --> and. */
break;
case 1267: /* mov */
case 1286: /* and */
value = 1286; /* --> and. */
break;
case 1271: /* movs */
case 1287: /* ands */
value = 1287; /* --> ands. */
case 1268: /* mov */
case 1287: /* and */
value = 1287; /* --> and. */
break;
case 2035: /* cmple */
case 1322: /* cmpge */
value = 1322; /* --> cmpge. */
case 1272: /* movs */
case 1288: /* ands */
value = 1288; /* --> ands. */
break;
case 2038: /* cmplt */
case 1325: /* cmpgt */
value = 1325; /* --> cmpgt. */
case 2036: /* cmple */
case 1323: /* cmpge */
value = 1323; /* --> cmpge. */
break;
case 2036: /* cmplo */
case 1327: /* cmphi */
value = 1327; /* --> cmphi. */
case 2039: /* cmplt */
case 1326: /* cmpgt */
value = 1326; /* --> cmpgt. */
break;
case 2037: /* cmpls */
case 1330: /* cmphs */
value = 1330; /* --> cmphs. */
case 2037: /* cmplo */
case 1328: /* cmphi */
value = 1328; /* --> cmphi. */
break;
case 1264: /* mov */
case 1352: /* cpy */
value = 1352; /* --> cpy. */
case 2038: /* cmpls */
case 1331: /* cmphs */
value = 1331; /* --> cmphs. */
break;
case 1266: /* mov */
case 1265: /* mov */
case 1353: /* cpy */
value = 1353; /* --> cpy. */
break;
case 2045: /* fmov */
case 1269: /* mov */
case 1267: /* mov */
case 1354: /* cpy */
value = 1354; /* --> cpy. */
break;
case 1259: /* mov */
case 1366: /* dup */
value = 1366; /* --> dup. */
case 2046: /* fmov */
case 1270: /* mov */
case 1355: /* cpy */
value = 1355; /* --> cpy. */
break;
case 1261: /* mov */
case 1258: /* mov */
case 1260: /* mov */
case 1367: /* dup */
value = 1367; /* --> dup. */
break;
case 2044: /* fmov */
case 1263: /* mov */
case 1262: /* mov */
case 1259: /* mov */
case 1368: /* dup */
value = 1368; /* --> dup. */
break;
case 1262: /* mov */
case 1369: /* dupm */
value = 1369; /* --> dupm. */
case 2045: /* fmov */
case 1264: /* mov */
case 1369: /* dup */
value = 1369; /* --> dup. */
break;
case 2039: /* eon */
case 1371: /* eor */
value = 1371; /* --> eor. */
case 1263: /* mov */
case 1370: /* dupm */
value = 1370; /* --> dupm. */
break;
case 1272: /* not */
case 1373: /* eor */
value = 1373; /* --> eor. */
case 2040: /* eon */
case 1372: /* eor */
value = 1372; /* --> eor. */
break;
case 1273: /* nots */
case 1374: /* eors */
value = 1374; /* --> eors. */
case 1273: /* not */
case 1374: /* eor */
value = 1374; /* --> eor. */
break;
case 2040: /* facle */
case 1379: /* facge */
value = 1379; /* --> facge. */
case 1274: /* nots */
case 1375: /* eors */
value = 1375; /* --> eors. */
break;
case 2041: /* faclt */
case 1380: /* facgt */
value = 1380; /* --> facgt. */
case 2041: /* facle */
case 1380: /* facge */
value = 1380; /* --> facge. */
break;
case 2042: /* fcmle */
case 1393: /* fcmge */
value = 1393; /* --> fcmge. */
case 2042: /* faclt */
case 1381: /* facgt */
value = 1381; /* --> facgt. */
break;
case 2043: /* fcmlt */
case 1395: /* fcmgt */
value = 1395; /* --> fcmgt. */
case 2043: /* fcmle */
case 1394: /* fcmge */
value = 1394; /* --> fcmge. */
break;
case 1256: /* fmov */
case 1401: /* fcpy */
value = 1401; /* --> fcpy. */
case 2044: /* fcmlt */
case 1396: /* fcmgt */
value = 1396; /* --> fcmgt. */
break;
case 1255: /* fmov */
case 1424: /* fdup */
value = 1424; /* --> fdup. */
case 1257: /* fmov */
case 1402: /* fcpy */
value = 1402; /* --> fcpy. */
break;
case 1257: /* mov */
case 1755: /* orr */
value = 1755; /* --> orr. */
case 1256: /* fmov */
case 1425: /* fdup */
value = 1425; /* --> fdup. */
break;
case 2046: /* orn */
case 1258: /* mov */
case 1756: /* orr */
value = 1756; /* --> orr. */
break;
case 1260: /* mov */
case 1758: /* orr */
value = 1758; /* --> orr. */
case 2047: /* orn */
case 1757: /* orr */
value = 1757; /* --> orr. */
break;
case 1270: /* movs */
case 1759: /* orrs */
value = 1759; /* --> orrs. */
case 1261: /* mov */
case 1759: /* orr */
value = 1759; /* --> orr. */
break;
case 1265: /* mov */
case 1821: /* sel */
value = 1821; /* --> sel. */
case 1271: /* movs */
case 1760: /* orrs */
value = 1760; /* --> orrs. */
break;
case 1268: /* mov */
case 1266: /* mov */
case 1822: /* sel */
value = 1822; /* --> sel. */
break;
case 1269: /* mov */
case 1823: /* sel */
value = 1823; /* --> sel. */
break;
default: return NULL;
}
@ -771,6 +772,7 @@ aarch64_insert_operand (const aarch64_operand *self,
case 104:
return aarch64_ins_prfop (self, info, code, inst, errors);
case 105:
return aarch64_ins_none (self, info, code, inst, errors);
case 106:
return aarch64_ins_hint (self, info, code, inst, errors);
case 107:

11
opcodes/aarch64-asm.c
View File

@ -78,6 +78,17 @@ insert_all_fields (const aarch64_operand *self, aarch64_insn *code,
/* Operand inserters. */
/* Insert nothing. */
bfd_boolean
aarch64_ins_none (const aarch64_operand *self ATTRIBUTE_UNUSED,
const aarch64_opnd_info *info ATTRIBUTE_UNUSED,
aarch64_insn *code ATTRIBUTE_UNUSED,
const aarch64_inst *inst ATTRIBUTE_UNUSED,
aarch64_operand_error *errors ATTRIBUTE_UNUSED)
{
return TRUE;
}
/* Insert register number. */
bfd_boolean
aarch64_ins_regno (const aarch64_operand *self, const aarch64_opnd_info *info,

1
opcodes/aarch64-asm.h
View File

@ -42,6 +42,7 @@ bfd_boolean aarch64_insert_operand (const aarch64_operand *,
aarch64_insn *, const aarch64_inst *, \
aarch64_operand_error *)
AARCH64_DECL_OPD_INSERTER (ins_none);
AARCH64_DECL_OPD_INSERTER (ins_regno);
AARCH64_DECL_OPD_INSERTER (ins_reglane);
AARCH64_DECL_OPD_INSERTER (ins_reglist);

2528
opcodes/aarch64-dis-2.c
View File

File diff suppressed because it is too large

10
opcodes/aarch64-dis.c
View File

@ -251,6 +251,16 @@ get_expected_qualifier (const aarch64_inst *inst, int i)
/* Operand extractors. */
bfd_boolean
aarch64_ext_none (const aarch64_operand *self ATTRIBUTE_UNUSED,
aarch64_opnd_info *info ATTRIBUTE_UNUSED,
const aarch64_insn code ATTRIBUTE_UNUSED,
const aarch64_inst *inst ATTRIBUTE_UNUSED,
aarch64_operand_error *errors ATTRIBUTE_UNUSED)
{
return TRUE;
}
bfd_boolean
aarch64_ext_regno (const aarch64_operand *self, aarch64_opnd_info *info,
const aarch64_insn code,

1
opcodes/aarch64-dis.h
View File

@ -62,6 +62,7 @@ aarch64_extract_operand (const aarch64_operand *, aarch64_opnd_info *,
const aarch64_insn, const aarch64_inst *, \
aarch64_operand_error *)
AARCH64_DECL_OPD_EXTRACTOR (ext_none);
AARCH64_DECL_OPD_EXTRACTOR (ext_regno);
AARCH64_DECL_OPD_EXTRACTOR (ext_regno_pair);
AARCH64_DECL_OPD_EXTRACTOR (ext_regrt_sysins);

18
opcodes/aarch64-opc-2.c
View File

@ -129,7 +129,7 @@ const struct aarch64_operand aarch64_operands[] =
{AARCH64_OPND_CLASS_SYSTEM, "BARRIER", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {}, "a barrier option name"},
{AARCH64_OPND_CLASS_SYSTEM, "BARRIER_ISB", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {}, "the ISB option name SY or an optional 4-bit unsigned immediate"},
{AARCH64_OPND_CLASS_SYSTEM, "PRFOP", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {}, "a prefetch operation specifier"},
{AARCH64_OPND_CLASS_SYSTEM, "BARRIER_PSB", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {}, "the PSB option name CSYNC"},
{AARCH64_OPND_CLASS_SYSTEM, "BARRIER_PSB", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {}, "the PSB/TSB option name CSYNC"},
{AARCH64_OPND_CLASS_SYSTEM, "BTI", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {}, "BTI targets j/c/jc"},
{AARCH64_OPND_CLASS_ADDRESS, "SVE_ADDR_RI_S4x16", 4 << OPD_F_OD_LSB | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_Rn}, "an address with a 4-bit signed offset, multiplied by 16"},
{AARCH64_OPND_CLASS_ADDRESS, "SVE_ADDR_RI_S4x32", 5 << OPD_F_OD_LSB | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_Rn}, "an address with a 4-bit signed offset, multiplied by 32"},
@ -309,17 +309,17 @@ static const unsigned op_enum_table [] =
391,
413,
415,
1260,
1265,
1258,
1257,
1261,
1268,
1270,
1266,
1259,
1258,
1262,
1269,
1271,
1267,
1273,
1272,
1268,
1274,
1273,
131,
};

3
opcodes/aarch64-opc.c
View File

@ -3762,6 +3762,9 @@ aarch64_print_operand (char *buf, size_t size, bfd_vma pc,
break;
case AARCH64_OPND_BARRIER_PSB:
snprintf (buf, size, "csync");
break;
case AARCH64_OPND_BTI_TARGET:
if ((HINT_FLAG (opnd->hint_option->value) & HINT_OPD_F_NOPRINT) == 0)
snprintf (buf, size, "%s", opnd->hint_option->name);

5
opcodes/aarch64-tbl.h
View File

@ -3841,6 +3841,7 @@ struct aarch64_opcode aarch64_opcode_table[] =
CORE_INSN ("autib1716", 0xd50321df, 0xffffffff, ic_system, 0, OP0 (), {}, F_ALIAS),
CORE_INSN ("esb", 0xd503221f, 0xffffffff, ic_system, 0, OP0 (), {}, F_ALIAS),
CORE_INSN ("psb", 0xd503223f, 0xffffffff, ic_system, 0, OP1 (BARRIER_PSB), {}, F_ALIAS),
CORE_INSN ("tsb", 0xd503225f, 0xffffffff, ic_system, 0, OP1 (BARRIER_PSB), {}, F_ALIAS),
CORE_INSN ("clrex", 0xd503305f, 0xfffff0ff, ic_system, 0, OP1 (UIMM4), {}, F_OPD0_OPT | F_DEFAULT (0xF)),
CORE_INSN ("dsb", 0xd503309f, 0xfffff0ff, ic_system, 0, OP1 (BARRIER), {}, F_HAS_ALIAS),
CORE_INSN ("ssbb", 0xd503309f, 0xffffffff, ic_system, 0, OP0 (), {}, F_ALIAS),
@ -5314,8 +5315,8 @@ struct aarch64_opcode aarch64_opcode_table[] =
"the ISB option name SY or an optional 4-bit unsigned immediate") \
Y(SYSTEM, prfop, "PRFOP", 0, F(), \
"a prefetch operation specifier") \
Y(SYSTEM, hint, "BARRIER_PSB", 0, F (), \
"the PSB option name CSYNC") \
Y(SYSTEM, none, "BARRIER_PSB", 0, F (), \
"the PSB/TSB option name CSYNC") \
Y(SYSTEM, hint, "BTI", 0, F (), \
"BTI targets j/c/jc") \
Y(ADDRESS, sve_addr_ri_s4, "SVE_ADDR_RI_S4x16", \

Write Preview
Loading…
Cancel
Save