sim: bfin: update AV and AC ASTAT bits with acc negation

The Acc=-Acc insn can overflow or carry with edge values, so make sure
we update the ASTAT bits accordingly to match the hardware.  Also fix
a thinko where we always updated AC0 even when working with A1 regs.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>

sim/bfin/ChangeLog

@@ -1,3 +1,9 @@
+2011-03-23  Robin Getz  <robin.getz@analog.com>
+
+	* bfin-sim.c (decode_dsp32alu_0): Call saturate_s40_astat instead of
+	saturate_s40, and use the v parameter to update the AV bit.  Set the
+	AC bit only when the final result is 0.
+
 2011-03-23  Mike Frysinger  <vapier@gentoo.org>
 
 	* dv-bfin_sic.c (ENC, DEC_PIN, DEC_SIC): Define.

sim/bfin/bfin-sim.c

@@ -4431,24 +4431,26 @@ decode_dsp32alu_0 (SIM_CPU *cpu, bu16 iw0, bu16 iw1)
   else if ((aop == 0 || aop == 1) && (HL == 0 || HL == 1) && aopcde == 14)
     {
       bs40 src_acc = get_extended_acc (cpu, aop);
+      int v = 0;
 
       TRACE_INSN (cpu, "A%i = - A%i;", HL, aop);
 
-      SET_AREG (HL, saturate_s40 (-src_acc));
+      SET_AREG (HL, saturate_s40_astat (-src_acc, &v));
 
       SET_ASTATREG (az, AWREG (HL) == 0 && AXREG (HL) == 0);
       SET_ASTATREG (an, AXREG (HL) >> 7);
-      SET_ASTATREG (ac0, src_acc == 0);
       if (HL == 0)
 	{
-	  SET_ASTATREG (av0, src_acc < 0);
-	  if (ASTATREG (av0))
+	  SET_ASTATREG (ac0, !src_acc);
+	  SET_ASTATREG (av0, v);
+	  if (v)
 	    SET_ASTATREG (av0s, 1);
 	}
       else
 	{
-	  SET_ASTATREG (av1, src_acc < 0);
-	  if (ASTATREG (av1))
+	  SET_ASTATREG (ac1, !src_acc);
+	  SET_ASTATREG (av1, v);
+	  if (v)
 	    SET_ASTATREG (av1s, 1);
 	}
     }