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Don't convert PC-relative REL relocations against absolute symbols to section-relative references and retain the original symbol reference instead. Offsets into the absolute section may overflow the limited range of their in-place addend field, causing an assembly error, e.g.: $ cat test.s .text .globl foo .ent foo foo: b bar .end foo .set bar, 0x12345678 $ as -EB -32 -o test.o test.s test.s: Assembler messages: test.s:3: Error: relocation overflow $ With the original reference retained the source can now be assembled and linked successfully: $ as -EB -32 -o test.o test.s $ objdump -dr test.o test.o: file format elf32-tradbigmips Disassembly of section .text: 00000000 <foo>: 0: 1000ffff b 0 <foo> 0: R_MIPS_PC16 bar 4: 00000000 nop ... $ ld -melf32btsmip -Ttext 0x12340000 -e foo -o test test.o $ objdump -dr test test: file format elf32-tradbigmips Disassembly of section .text: 12340000 <foo>: 12340000: 1000159d b 12345678 <bar> 12340004: 00000000 nop ... $ For simplicity always retain the original symbol reference, even if it would indeed fit. Making TC_FORCE_RELOCATION_ABS separate from TC_FORCE_RELOCATION causes R_MICROMIPS_PC7_S1, R_MICROMIPS_PC10_S1 and R_MICROMIPS_PC16_S1 branch relocations against absolute symbols to be converted on RELA targets to section-relative references. This is an intended effect of this change. Absolute symbols carry no ISA annotation in their `st_other' field and their value is not going to change with linker relaxation, so it is safe to discard the original reference and keep the calculated final symbol value only in the relocation's addend. Similarly R6 R_MIPS_PCHI16 and R_MIPS_PCLO16 relocations referring absolute symbols can be safely converted even on REL targets, as there the in-place addend of these relocations covers the entire 32-bit address space so it can hold the calculated final symbol value, and likewise the value referred won't be affected by any linker relaxation. Add a set of suitable test cases and enable REL linker tests which now work and were previously used as dump patterns for RELA tests only. gas/ * config/tc-mips.h (TC_FORCE_RELOCATION_ABS): New macro. (mips_force_relocation_abs): New prototype. * config/tc-mips.c (mips_force_relocation_abs): New function. * testsuite/gas/mips/branch-absolute.d: Adjust dump patterns. * testsuite/gas/mips/mips16-branch-absolute.d: Likewise. * testsuite/gas/mips/micromips-branch-absolute-n32.d: Likewise. * testsuite/gas/mips/micromips-branch-absolute-n64.d: Likewise. * testsuite/gas/mips/micromips-branch-absolute-addend-n32.d: Likewise. * testsuite/gas/mips/micromips-branch-absolute-addend-n64.d: Likewise. * testsuite/gas/mips/branch-absolute-addend.d: New test. * testsuite/gas/mips/mips16-branch-absolute-addend.d: New test. * testsuite/gas/mips/micromips-branch-absolute-addend.d: New test. * testsuite/gas/mips/mips.exp: Run the new tests. ld/ * testsuite/ld-mips-elf/mips-elf.exp: Run `branch-absolute-addend', `mips16-branch-absolute', `mips16-branch-absolute-addend' and `micromips-branch-absolute-addend'.users/ARM/sve
Maciej W. Rozycki
10 years ago
15 changed files with 183 additions and 60 deletions
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#objdump: -dr --prefix-addresses --show-raw-insn |
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#name: MIPS branch to absolute expression with addend |
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#as: -32 |
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.*: +file format .*mips.* |
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Disassembly of section \.text: |
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\.\.\. |
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[0-9a-f]+ <[^>]*> 1000048c b 00002234 <foo\+0x1234> |
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[ ]*[0-9a-f]+: R_MIPS_PC16 bar |
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[0-9a-f]+ <[^>]*> 00000000 nop |
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[0-9a-f]+ <[^>]*> 0411048c bal 0000223c <foo\+0x123c> |
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[ ]*[0-9a-f]+: R_MIPS_PC16 bar |
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[0-9a-f]+ <[^>]*> 00000000 nop |
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[0-9a-f]+ <[^>]*> 0410048c bltzal zero,00002244 <foo\+0x1244> |
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[ ]*[0-9a-f]+: R_MIPS_PC16 bar |
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[0-9a-f]+ <[^>]*> 00000000 nop |
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[0-9a-f]+ <[^>]*> 1040048c beqz v0,0000224c <foo\+0x124c> |
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[ ]*[0-9a-f]+: R_MIPS_PC16 bar |
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[0-9a-f]+ <[^>]*> 00000000 nop |
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[0-9a-f]+ <[^>]*> 1440048c bnez v0,00002254 <foo\+0x1254> |
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[ ]*[0-9a-f]+: R_MIPS_PC16 bar |
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[0-9a-f]+ <[^>]*> 00000000 nop |
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\.\.\. |
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#objdump: -dr --prefix-addresses --show-raw-insn |
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#name: microMIPS branch to absolute expression with addend |
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#as: -32 |
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.*: +file format .*mips.* |
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Disassembly of section \.text: |
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\.\.\. |
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[0-9a-f]+ <[^>]*> 9400 0918 b 00002234 <foo\+0x1234> |
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[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 bar |
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[0-9a-f]+ <[^>]*> 0c00 nop |
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[0-9a-f]+ <[^>]*> 4060 0918 bal 0000223a <foo\+0x123a> |
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[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 bar |
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[0-9a-f]+ <[^>]*> 0000 0000 nop |
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[0-9a-f]+ <[^>]*> 4020 0918 bltzal zero,00002242 <foo\+0x1242> |
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[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 bar |
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[0-9a-f]+ <[^>]*> 0000 0000 nop |
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[0-9a-f]+ <[^>]*> 9402 0918 beqz v0,0000224a <foo\+0x124a> |
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[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 bar |
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[0-9a-f]+ <[^>]*> 0c00 nop |
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[0-9a-f]+ <[^>]*> b402 0918 bnez v0,00002250 <foo\+0x1250> |
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[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 bar |
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[0-9a-f]+ <[^>]*> 0c00 nop |
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[0-9a-f]+ <[^>]*> 0c00 nop |
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\.\.\. |
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#objdump: -dr --prefix-addresses --show-raw-insn |
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#name: MIPS16 branch to absolute expression with addend |
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#as: -32 |
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.*: +file format .*mips.* |
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Disassembly of section \.text: |
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\.\.\. |
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[0-9a-f]+ <[^>]*> f101 1018 b 00002234 <foo\+0x1234> |
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[ ]*[0-9a-f]+: R_MIPS16_PC16_S1 bar |
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[0-9a-f]+ <[^>]*> f101 6018 bteqz 00002238 <foo\+0x1238> |
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[ ]*[0-9a-f]+: R_MIPS16_PC16_S1 bar |
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[0-9a-f]+ <[^>]*> f101 6118 btnez 0000223c <foo\+0x123c> |
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[ ]*[0-9a-f]+: R_MIPS16_PC16_S1 bar |
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[0-9a-f]+ <[^>]*> f101 2218 beqz v0,00002240 <foo\+0x1240> |
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[ ]*[0-9a-f]+: R_MIPS16_PC16_S1 bar |
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[0-9a-f]+ <[^>]*> f101 2a18 bnez v0,00002244 <foo\+0x1244> |
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[ ]*[0-9a-f]+: R_MIPS16_PC16_S1 bar |
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[0-9a-f]+ <[^>]*> 6500 nop |
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\.\.\. |
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