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@ -2706,7 +2706,7 @@ |
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*tx19: |
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// end-sanitize-tx19 |
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{ |
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GPR[RD] = (GPR[RS] < GPR[RT]); |
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GPR[RD] = ((signed_word) GPR[RS] < (signed_word) GPR[RT]); |
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} |
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@ -2727,7 +2727,7 @@ |
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*tx19: |
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// end-sanitize-tx19 |
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{ |
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GPR[RT] = (GPR[RS] < EXTEND16 (IMMEDIATE)); |
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GPR[RT] = ((signed_word) GPR[RS] < (signed_word) EXTEND16 (IMMEDIATE)); |
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} |
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@ -3158,7 +3158,7 @@ |
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*tx19: |
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// end-sanitize-tx19 |
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{ |
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if (GPR[RS] == GPR[RT]) |
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if ((signed_word) GPR[RS] == (signed_word) GPR[RT]) |
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SignalException(Trap, instruction_0); |
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} |
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@ -3179,7 +3179,7 @@ |
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*tx19: |
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// end-sanitize-tx19 |
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{ |
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if (GPR[RS] == EXTEND16 (IMMEDIATE)) |
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if ((signed_word) GPR[RS] == (signed_word) EXTEND16 (IMMEDIATE)) |
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SignalException(Trap, instruction_0); |
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} |
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@ -3200,7 +3200,7 @@ |
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*tx19: |
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// end-sanitize-tx19 |
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{ |
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if (GPR[RS] >= GPR[RT]) |
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if ((signed_word) GPR[RS] >= (signed_word) GPR[RT]) |
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SignalException(Trap, instruction_0); |
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} |
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@ -3221,7 +3221,7 @@ |
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*tx19: |
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// end-sanitize-tx19 |
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{ |
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if (GPR[RS] >= EXTEND16 (IMMEDIATE)) |
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if ((signed_word) GPR[RS] >= (signed_word) EXTEND16 (IMMEDIATE)) |
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SignalException(Trap, instruction_0); |
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} |
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@ -3284,7 +3284,7 @@ |
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*tx19: |
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// end-sanitize-tx19 |
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{ |
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if (GPR[RS] < GPR[RT]) |
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if ((signed_word) GPR[RS] < (signed_word) GPR[RT]) |
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SignalException(Trap, instruction_0); |
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} |
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@ -3305,7 +3305,7 @@ |
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*tx19: |
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// end-sanitize-tx19 |
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{ |
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if (GPR[RS] < EXTEND16 (IMMEDIATE)) |
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if ((signed_word) GPR[RS] < (signed_word) EXTEND16 (IMMEDIATE)) |
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SignalException(Trap, instruction_0); |
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} |
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@ -3368,7 +3368,7 @@ |
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*tx19: |
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// end-sanitize-tx19 |
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{ |
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if (GPR[RS] != GPR[RT]) |
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if ((signed_word) GPR[RS] != (signed_word) GPR[RT]) |
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SignalException(Trap, instruction_0); |
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} |
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@ -3389,7 +3389,7 @@ |
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*tx19: |
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// end-sanitize-tx19 |
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{ |
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if (GPR[RS] != EXTEND16 (IMMEDIATE)) |
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if ((signed_word) GPR[RS] != (signed_word) EXTEND16 (IMMEDIATE)) |
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SignalException(Trap, instruction_0); |
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} |
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@ -4074,7 +4074,7 @@ |
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110101,5.BASE,5.FT,16.OFFSET:COP1:64::LDC1 |
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"ldc1 f<FD>, <OFFSET>(r<BASE>)" |
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"ldc1 f<FT>, <OFFSET>(r<BASE>)" |
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*mipsII: |
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*mipsIII: |
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*mipsIV: |
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@ -4086,31 +4086,18 @@ |
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*tx19: |
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// end-sanitize-tx19 |
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{ |
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signed_word offset UNUSED = SIGNEXTEND((t_reg)((instruction >> 0) & 0x0000FFFF),16); |
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int destreg UNUSED = ((instruction >> 16) & 0x0000001F); |
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signed_word op1 UNUSED = GPR[((instruction >> 21) & 0x0000001F)]; |
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{ |
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address_word vaddr = ((uword64)op1 + offset); |
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address_word paddr; |
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int uncached; |
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if ((vaddr & 7) != 0) |
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SignalExceptionAddressLoad(); |
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else |
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{ |
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if (AddressTranslation(vaddr,isDATA,isLOAD,&paddr,&uncached,isTARGET,isREAL)) |
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{ |
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uword64 memval = 0; |
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uword64 memval1 = 0; |
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uword64 mask = 0x7; |
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unsigned int shift = 4; |
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unsigned int reverse UNUSED = (ReverseEndian ? (mask >> shift) : 0); |
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unsigned int bigend UNUSED = (BigEndianCPU ? (mask >> shift) : 0); |
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unsigned int byte UNUSED; |
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LoadMemory(&memval,&memval1,uncached,AccessLength_DOUBLEWORD,paddr,vaddr,isDATA,isREAL); |
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COP_LD(((instruction >> 26) & 0x3),destreg,memval);; |
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} |
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} |
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} |
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address_word vaddr = GPR[BASE] + EXTEND16 (OFFSET); |
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address_word paddr; |
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int uncached; |
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if ((vaddr & 7) != 0) |
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SignalExceptionAddressLoad(); |
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else |
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{ |
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unsigned64 memval; |
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AddressTranslation(vaddr,isDATA,isLOAD,&paddr,&uncached,isTARGET,isREAL); |
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LoadMemory(&memval,0,uncached,AccessLength_DOUBLEWORD,paddr,vaddr,isDATA,isREAL); |
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COP_LD(((instruction_0 >> 26) & 0x3),FT,memval);; |
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} |
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} |
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@ -4747,32 +4734,22 @@ |
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*tx19: |
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// end-sanitize-tx19 |
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{ |
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unsigned32 instruction = instruction_0; |
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signed_word offset UNUSED = SIGNEXTEND((t_reg)((instruction >> 0) & 0x0000FFFF),16); |
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int destreg UNUSED = ((instruction >> 16) & 0x0000001F); |
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signed_word op1 UNUSED = GPR[((instruction >> 21) & 0x0000001F)]; |
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{ |
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address_word vaddr = ((uword64)op1 + offset); |
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address_word paddr; |
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int uncached; |
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if ((vaddr & 7) != 0) |
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SignalExceptionAddressStore(); |
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else |
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{ |
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if (AddressTranslation(vaddr,isDATA,isSTORE,&paddr,&uncached,isTARGET,isREAL)) |
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{ |
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uword64 memval = 0; |
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uword64 memval1 = 0; |
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memval = (uword64)COP_SD(((instruction >> 26) & 0x3),destreg); |
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{ |
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StoreMemory(uncached,AccessLength_DOUBLEWORD,memval,memval1,paddr,vaddr,isREAL); |
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} |
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} |
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} |
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} |
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|
address_word vaddr = GPR[BASE] + EXTEND16 (OFFSET); |
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|
|
int uncached; |
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|
|
if ((vaddr & 7) != 0) |
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SignalExceptionAddressStore(); |
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|
else |
|
|
|
{ |
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|
|
address_word paddr; |
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|
|
unsigned64 memval; |
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|
AddressTranslation(vaddr,isDATA,isSTORE,&paddr,&uncached,isTARGET,isREAL); |
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memval = (unsigned64) COP_SD(((instruction_0 >> 26) & 0x3),FT); |
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StoreMemory(uncached,AccessLength_DOUBLEWORD,memval,0,paddr,vaddr,isREAL); |
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} |
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} |
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|
010011,5.RS,5.RT,vvvvv,00000001001:COP1X:64::SDXC1 |
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*mipsIV: |
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// start-sanitize-vr5400 |
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