riscv
/
binutils-gdb
1
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity
Browse Source

* arm-tdep.c (arm_print_float_info): Use register value from FRAME 

instead of calling read_register.

	* avr-tdep.c (avr_push_dummy_call): Write to REGCACHE instead of
	calling write_register.

	* hppa-tdep.c (hppa32_push_dummy_call): Write to REGCACHE instead of
	calling write_register.

	* ia64-tdep.c (find_func_descr): Add REGCACHE parameter.  Use it
	instead of calling read_register.
	(ia64_push_dummy_call): Update call to find_func_descr.  Use REGCACHE
	instead of calling read_register and write_register.

	* m32r-tdep.c (m32r_linux_supply_gregset): Use REGCACHE parameter
	instead of current_regcache.

	* mn10300-tdep.c (mn10300_push_dummy_call): Write to REGCACHE instead
	of calling write_register.
	* mn10300-linux-tdep.c (am33_supply_fpregset_method): Use REGCACHE
	parameter instead of current_regcache.

	* mips-tdep.c (mips2_fp_compat): Add FRAME parameter.  Use it
	instead of calling read_register.
	(mips_read_fp_register_double, mips_print_fp_register): Update calls.
	(mips_eabi_push_dummy_call): Use REGCACHE instead of write_register.
	(mips_n32n64_push_dummy_call): Likewise.
	(mips_o32_push_dummy_call): Likewise.
	(mips_o64_push_dummy_call): Likewise.

	* ppc-sysv-tdep.c (ppc_sysv_abi_push_dummy_call): Use REGCACHE
	parameter instead of current_regcache.

	* xtensa-tdep.c (xtensa_register_write_masked): Add REGCACHE parameter.
	Use it instead of read_register and write_register.
	(xtensa_register_read_masked): Likewise.
	(xtensa_pseudo_register_read): Update call.
	(xtensa_pseudo_register_write): Likewise.
	(xtensa_frame_cache): Use register values unwound from NEXT_FRAME
	instead of calling read_register.
	(xtensa_push_dummy_call): Update comment.
binutils-2_18-branch
Ulrich Weigand 19 years ago
parent
d2ca4222d5
commit
9c9acae0c2
11 changed files with 125 additions and 68 deletions
Whitespace
Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL
Split View
Diff Options
Show Stats Download Patch File Download Diff File
  1. 44
      gdb/ChangeLog
  2. 2
      gdb/arm-tdep.c
  3. 4
      gdb/avr-tdep.c
  4. 4
      gdb/hppa-tdep.c
  5. 32
      gdb/ia64-tdep.c
  6. 2
      gdb/m32r-linux-tdep.c
  7. 50
      gdb/mips-tdep.c
  8. 8
      gdb/mn10300-linux-tdep.c
  9. 6
      gdb/mn10300-tdep.c
  10. 4
      gdb/ppc-sysv-tdep.c
  11. 37
      gdb/xtensa-tdep.c

44
gdb/ChangeLog
View File

@ -1,3 +1,47 @@
2007-06-15 Ulrich Weigand <uweigand@de.ibm.com>
* arm-tdep.c (arm_print_float_info): Use register value from FRAME
instead of calling read_register.
* avr-tdep.c (avr_push_dummy_call): Write to REGCACHE instead of
calling write_register.
* hppa-tdep.c (hppa32_push_dummy_call): Write to REGCACHE instead of
calling write_register.
* ia64-tdep.c (find_func_descr): Add REGCACHE parameter. Use it
instead of calling read_register.
(ia64_push_dummy_call): Update call to find_func_descr. Use REGCACHE
instead of calling read_register and write_register.
* m32r-tdep.c (m32r_linux_supply_gregset): Use REGCACHE parameter
instead of current_regcache.
* mn10300-tdep.c (mn10300_push_dummy_call): Write to REGCACHE instead
of calling write_register.
* mn10300-linux-tdep.c (am33_supply_fpregset_method): Use REGCACHE
parameter instead of current_regcache.
* mips-tdep.c (mips2_fp_compat): Add FRAME parameter. Use it
instead of calling read_register.
(mips_read_fp_register_double, mips_print_fp_register): Update calls.
(mips_eabi_push_dummy_call): Use REGCACHE instead of write_register.
(mips_n32n64_push_dummy_call): Likewise.
(mips_o32_push_dummy_call): Likewise.
(mips_o64_push_dummy_call): Likewise.
* ppc-sysv-tdep.c (ppc_sysv_abi_push_dummy_call): Use REGCACHE
parameter instead of current_regcache.
* xtensa-tdep.c (xtensa_register_write_masked): Add REGCACHE parameter.
Use it instead of read_register and write_register.
(xtensa_register_read_masked): Likewise.
(xtensa_pseudo_register_read): Update call.
(xtensa_pseudo_register_write): Likewise.
(xtensa_frame_cache): Use register values unwound from NEXT_FRAME
instead of calling read_register.
(xtensa_push_dummy_call): Update comment.
2007-06-15 Ulrich Weigand <uweigand@de.ibm.com>
* mips-tdep.c (mips16_scan_prologue): Replace read_next_frame_reg

2
gdb/arm-tdep.c
View File

@ -1363,7 +1363,7 @@ static void
arm_print_float_info (struct gdbarch *gdbarch, struct ui_file *file,
struct frame_info *frame, const char *args)
{
unsigned long status = read_register (ARM_FPS_REGNUM);
unsigned long status = get_frame_register_unsigned (frame, ARM_FPS_REGNUM);
int type;
type = (status >> 24) & 127;

4
gdb/avr-tdep.c
View File

@ -1163,8 +1163,8 @@ avr_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
if (struct_return)
{
fprintf_unfiltered (gdb_stderr, "struct_return: 0x%lx\n", struct_addr);
write_register (argreg--, struct_addr & 0xff);
write_register (argreg--, (struct_addr >>8) & 0xff);
regcache_cooked_write_unsigned (regcache, argreg--, struct_addr & 0xff);
regcache_cooked_write_unsigned (regcache, argreg--, (struct_addr >>8) & 0xff);
}
#endif

4
gdb/hppa-tdep.c
View File

@ -832,12 +832,12 @@ hppa32_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
/* If a structure has to be returned, set up register 28 to hold its
address */
if (struct_return)
write_register (28, struct_addr);
regcache_cooked_write_unsigned (regcache, 28, struct_addr);
gp = tdep->find_global_pointer (function);
if (gp != 0)
write_register (19, gp);
regcache_cooked_write_unsigned (regcache, 19, gp);
/* Set the return address. */
if (!gdbarch_push_dummy_code_p (gdbarch))

32
gdb/ia64-tdep.c
View File

@ -3198,7 +3198,7 @@ find_extant_func_descr (CORE_ADDR faddr)
stack using the address at fdaptr. */
static CORE_ADDR
find_func_descr (CORE_ADDR faddr, CORE_ADDR *fdaptr)
find_func_descr (struct regcache *regcache, CORE_ADDR faddr, CORE_ADDR *fdaptr)
{
CORE_ADDR fdesc;
@ -3206,7 +3206,7 @@ find_func_descr (CORE_ADDR faddr, CORE_ADDR *fdaptr)
if (fdesc == 0)
{
CORE_ADDR global_pointer;
ULONGEST global_pointer;
char buf[16];
fdesc = *fdaptr;
@ -3215,7 +3215,8 @@ find_func_descr (CORE_ADDR faddr, CORE_ADDR *fdaptr)
global_pointer = ia64_find_global_pointer (faddr);
if (global_pointer == 0)
global_pointer = read_register (IA64_GR1_REGNUM);
regcache_cooked_read_unsigned (regcache,
IA64_GR1_REGNUM, &global_pointer);
store_unsigned_integer (buf, 8, faddr);
store_unsigned_integer (buf + 8, 8, global_pointer);
@ -3273,7 +3274,8 @@ ia64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
int len, argoffset;
int nslots, rseslots, memslots, slotnum, nfuncargs;
int floatreg;
CORE_ADDR bsp, cfm, pfs, new_bsp, funcdescaddr, pc, global_pointer;
ULONGEST bsp, cfm, pfs, new_bsp;
CORE_ADDR funcdescaddr, pc, global_pointer;
CORE_ADDR func_addr = find_function_addr (function, NULL);
nslots = 0;
@ -3299,20 +3301,20 @@ ia64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
memslots = nslots - rseslots;
/* Allocate a new RSE frame. */
cfm = read_register (IA64_CFM_REGNUM);
regcache_cooked_read_unsigned (regcache, IA64_CFM_REGNUM, &cfm);
bsp = read_register (IA64_BSP_REGNUM);
regcache_cooked_read_unsigned (regcache, IA64_BSP_REGNUM, &bsp);
new_bsp = rse_address_add (bsp, rseslots);
write_register (IA64_BSP_REGNUM, new_bsp);
regcache_cooked_write_unsigned (regcache, IA64_BSP_REGNUM, new_bsp);
pfs = read_register (IA64_PFS_REGNUM);
regcache_cooked_read_unsigned (regcache, IA64_PFS_REGNUM, &pfs);
pfs &= 0xc000000000000000LL;
pfs |= (cfm & 0xffffffffffffLL);
write_register (IA64_PFS_REGNUM, pfs);
regcache_cooked_write_unsigned (regcache, IA64_PFS_REGNUM, pfs);
cfm &= 0xc000000000000000LL;
cfm |= rseslots;
write_register (IA64_CFM_REGNUM, cfm);
regcache_cooked_write_unsigned (regcache, IA64_CFM_REGNUM, cfm);
/* We will attempt to find function descriptors in the .opd segment,
but if we can't we'll construct them ourselves. That being the
@ -3346,9 +3348,9 @@ ia64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
&& TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC)
{
char val_buf[8];
ULONGEST faddr = extract_unsigned_integer (value_contents (arg), 8);
store_unsigned_integer (val_buf, 8,
find_func_descr (extract_unsigned_integer (value_contents (arg), 8),
find_func_descr (regcache, faddr,
&funcdescaddr));
if (slotnum < rseslots)
write_memory (rse_address_add (bsp, slotnum), val_buf, 8);
@ -3410,11 +3412,11 @@ ia64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
global_pointer = ia64_find_global_pointer (func_addr);
if (global_pointer != 0)
write_register (IA64_GR1_REGNUM, global_pointer);
regcache_cooked_write_unsigned (regcache, IA64_GR1_REGNUM, global_pointer);
write_register (IA64_BR0_REGNUM, bp_addr);
regcache_cooked_write_unsigned (regcache, IA64_BR0_REGNUM, bp_addr);
write_register (sp_regnum, sp);
regcache_cooked_write_unsigned (regcache, sp_regnum, sp);
return sp;
}

2
gdb/m32r-linux-tdep.c
View File

@ -383,7 +383,7 @@ m32r_linux_supply_gregset (const struct regset *regset,
break;
}
regcache_raw_supply (current_regcache, i,
regcache_raw_supply (regcache, i,
regs + m32r_pt_regs_offset[i]);
}
}

50
gdb/mips-tdep.c
View File

@ -427,7 +427,7 @@ mips_xfer_register (struct regcache *regcache, int reg_num, int length,
physical 64-bit registers, but should treat them as 32-bit registers. */
static int
mips2_fp_compat (void)
mips2_fp_compat (struct frame_info *frame)
{
/* MIPS1 and MIPS2 have only 32 bit FPRs, and the FR bit is not
meaningful. */
@ -441,7 +441,7 @@ mips2_fp_compat (void)
/* Otherwise check the FR bit in the status register - it controls
the FP compatiblity mode. If it is clear we are in compatibility
mode. */
if ((read_register (MIPS_PS_REGNUM) & ST0_FR) == 0)
if ((get_frame_register_unsigned (frame, MIPS_PS_REGNUM) & ST0_FR) == 0)
return 1;
#endif
@ -2565,7 +2565,7 @@ mips_eabi_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
fprintf_unfiltered (gdb_stdlog,
"mips_eabi_push_dummy_call: struct_return reg=%d 0x%s\n",
argreg, paddr_nz (struct_addr));
write_register (argreg++, struct_addr);
regcache_cooked_write_unsigned (regcache, argreg++, struct_addr);
}
/* Now load as many as possible of the first arguments into
@ -2642,14 +2642,14 @@ mips_eabi_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
if (mips_debug)
fprintf_unfiltered (gdb_stdlog, " - fpreg=%d val=%s",
float_argreg, phex (regval, 4));
write_register (float_argreg++, regval);
regcache_cooked_write_unsigned (regcache, float_argreg++, regval);
/* Write the high word of the double to the odd register(s). */
regval = extract_unsigned_integer (val + 4 - low_offset, 4);
if (mips_debug)
fprintf_unfiltered (gdb_stdlog, " - fpreg=%d val=%s",
float_argreg, phex (regval, 4));
write_register (float_argreg++, regval);
regcache_cooked_write_unsigned (regcache, float_argreg++, regval);
}
else
{
@ -2661,7 +2661,7 @@ mips_eabi_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
if (mips_debug)
fprintf_unfiltered (gdb_stdlog, " - fpreg=%d val=%s",
float_argreg, phex (regval, len));
write_register (float_argreg++, regval);
regcache_cooked_write_unsigned (regcache, float_argreg++, regval);
}
}
else
@ -2750,7 +2750,7 @@ mips_eabi_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
fprintf_filtered (gdb_stdlog, " - reg=%d val=%s",
argreg,
phex (regval, regsize));
write_register (argreg, regval);
regcache_cooked_write_unsigned (regcache, argreg, regval);
argreg++;
}
@ -2846,7 +2846,7 @@ mips_n32n64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
fprintf_unfiltered (gdb_stdlog,
"mips_n32n64_push_dummy_call: struct_return reg=%d 0x%s\n",
argreg, paddr_nz (struct_addr));
write_register (argreg++, struct_addr);
regcache_cooked_write_unsigned (regcache, argreg++, struct_addr);
}
/* Now load as many as possible of the first arguments into
@ -2878,12 +2878,12 @@ mips_n32n64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
if (mips_debug)
fprintf_unfiltered (gdb_stdlog, " - fpreg=%d val=%s",
float_argreg, phex (regval, len));
write_register (float_argreg++, regval);
regcache_cooked_write_unsigned (regcache, float_argreg++, regval);
if (mips_debug)
fprintf_unfiltered (gdb_stdlog, " - reg=%d val=%s",
argreg, phex (regval, len));
write_register (argreg, regval);
regcache_cooked_write_unsigned (regcache, argreg, regval);
argreg += 1;
}
else
@ -2983,7 +2983,7 @@ mips_n32n64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
fprintf_filtered (gdb_stdlog, " - reg=%d val=%s",
argreg,
phex (regval, MIPS64_REGSIZE));
write_register (argreg, regval);
regcache_cooked_write_unsigned (regcache, argreg, regval);
argreg++;
}
@ -3204,7 +3204,7 @@ mips_o32_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
fprintf_unfiltered (gdb_stdlog,
"mips_o32_push_dummy_call: struct_return reg=%d 0x%s\n",
argreg, paddr_nz (struct_addr));
write_register (argreg++, struct_addr);
regcache_cooked_write_unsigned (regcache, argreg++, struct_addr);
stack_offset += MIPS32_REGSIZE;
}
@ -3261,23 +3261,23 @@ mips_o32_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
if (mips_debug)
fprintf_unfiltered (gdb_stdlog, " - fpreg=%d val=%s",
float_argreg, phex (regval, 4));
write_register (float_argreg++, regval);
regcache_cooked_write_unsigned (regcache, float_argreg++, regval);
if (mips_debug)
fprintf_unfiltered (gdb_stdlog, " - reg=%d val=%s",
argreg, phex (regval, 4));
write_register (argreg++, regval);
regcache_cooked_write_unsigned (regcache, argreg++, regval);
/* Write the high word of the double to the odd register(s). */
regval = extract_unsigned_integer (val + 4 - low_offset, 4);
if (mips_debug)
fprintf_unfiltered (gdb_stdlog, " - fpreg=%d val=%s",
float_argreg, phex (regval, 4));
write_register (float_argreg++, regval);
regcache_cooked_write_unsigned (regcache, float_argreg++, regval);
if (mips_debug)
fprintf_unfiltered (gdb_stdlog, " - reg=%d val=%s",
argreg, phex (regval, 4));
write_register (argreg++, regval);
regcache_cooked_write_unsigned (regcache, argreg++, regval);
}
else
{
@ -3289,7 +3289,7 @@ mips_o32_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
if (mips_debug)
fprintf_unfiltered (gdb_stdlog, " - fpreg=%d val=%s",
float_argreg, phex (regval, len));
write_register (float_argreg++, regval);
regcache_cooked_write_unsigned (regcache, float_argreg++, regval);
/* CAGNEY: 32 bit MIPS ABI's always reserve two FP
registers for each argument. The below is (my
guess) to ensure that the corresponding integer
@ -3297,7 +3297,7 @@ mips_o32_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
if (mips_debug)
fprintf_unfiltered (gdb_stdlog, " - reg=%d val=%s",
argreg, phex (regval, len));
write_register (argreg, regval);
regcache_cooked_write_unsigned (regcache, argreg, regval);
argreg += 2;
}
/* Reserve space for the FP register. */
@ -3415,7 +3415,7 @@ mips_o32_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
fprintf_filtered (gdb_stdlog, " - reg=%d val=%s",
argreg,
phex (regval, MIPS32_REGSIZE));
write_register (argreg, regval);
regcache_cooked_write_unsigned (regcache, argreg, regval);
argreg++;
/* Prevent subsequent floating point arguments from
@ -3663,7 +3663,7 @@ mips_o64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
fprintf_unfiltered (gdb_stdlog,
"mips_o64_push_dummy_call: struct_return reg=%d 0x%s\n",
argreg, paddr_nz (struct_addr));
write_register (argreg++, struct_addr);
regcache_cooked_write_unsigned (regcache, argreg++, struct_addr);
stack_offset += MIPS64_REGSIZE;
}
@ -3702,11 +3702,11 @@ mips_o64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
if (mips_debug)
fprintf_unfiltered (gdb_stdlog, " - fpreg=%d val=%s",
float_argreg, phex (regval, len));
write_register (float_argreg++, regval);
regcache_cooked_write_unsigned (regcache, float_argreg++, regval);
if (mips_debug)
fprintf_unfiltered (gdb_stdlog, " - reg=%d val=%s",
argreg, phex (regval, len));
write_register (argreg, regval);
regcache_cooked_write_unsigned (regcache, argreg, regval);
argreg++;
/* Reserve space for the FP register. */
stack_offset += align_up (len, MIPS64_REGSIZE);
@ -3804,7 +3804,7 @@ mips_o64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
fprintf_filtered (gdb_stdlog, " - reg=%d val=%s",
argreg,
phex (regval, MIPS64_REGSIZE));
write_register (argreg, regval);
regcache_cooked_write_unsigned (regcache, argreg, regval);
argreg++;
/* Prevent subsequent floating point arguments from
@ -3970,7 +3970,7 @@ mips_read_fp_register_double (struct frame_info *frame, int regno,
{
int raw_size = register_size (current_gdbarch, regno);
if (raw_size == 8 && !mips2_fp_compat ())
if (raw_size == 8 && !mips2_fp_compat (frame))
{
/* We have a 64-bit value for this register, and we should use
all 64 bits. */
@ -4018,7 +4018,7 @@ mips_print_fp_register (struct ui_file *file, struct frame_info *frame,
(current_gdbarch, regnum)),
"");
if (register_size (current_gdbarch, regnum) == 4 || mips2_fp_compat ())
if (register_size (current_gdbarch, regnum) == 4 || mips2_fp_compat (frame))
{
/* 4-byte registers: Print hex and floating. Also print even
numbered registers as doubles. */

8
gdb/mn10300-linux-tdep.c
View File

@ -263,10 +263,10 @@ am33_supply_fpregset_method (const struct regset *regset,
E_FPCR_REGNUM, fpregs, len);
}
else if (regnum == E_FPCR_REGNUM)
regcache_raw_supply (current_regcache, E_FPCR_REGNUM,
regcache_raw_supply (regcache, E_FPCR_REGNUM,
&fpregset->fpcr);
else if (E_FS0_REGNUM <= regnum && regnum < E_FS0_REGNUM + MN10300_ELF_NFPREG)
regcache_raw_supply (current_regcache, regnum,
regcache_raw_supply (regcache, regnum,
&fpregset->fpregs[regnum - E_FS0_REGNUM]);
return;
@ -441,11 +441,11 @@ am33_collect_fpregset_method (const struct regset *regset,
E_FPCR_REGNUM, fpregs, len);
}
else if (regnum == E_FPCR_REGNUM)
regcache_raw_collect (current_regcache, E_FPCR_REGNUM,
regcache_raw_collect (regcache, E_FPCR_REGNUM,
&fpregset->fpcr);
else if (E_FS0_REGNUM <= regnum
&& regnum < E_FS0_REGNUM + MN10300_ELF_NFPREG)
regcache_raw_collect (current_regcache, regnum,
regcache_raw_collect (regcache, regnum,
&fpregset->fpregs[regnum - E_FS0_REGNUM]);
return;

6
gdb/mn10300-tdep.c
View File

@ -1008,7 +1008,7 @@ mn10300_push_dummy_call (struct gdbarch *gdbarch,
if (struct_return)
{
regs_used = 1;
write_register (E_D0_REGNUM, struct_addr);
regcache_cooked_write_unsigned (regcache, E_D0_REGNUM, struct_addr);
}
else
regs_used = 0;
@ -1034,8 +1034,8 @@ mn10300_push_dummy_call (struct gdbarch *gdbarch,
while (regs_used < 2 && arg_len > 0)
{
write_register (regs_used,
extract_unsigned_integer (val, push_size));
regcache_cooked_write_unsigned (regcache, regs_used,
extract_unsigned_integer (val, push_size));
val += push_size;
arg_len -= push_size;
regs_used++;

4
gdb/ppc-sysv-tdep.c
View File

@ -191,7 +191,7 @@ ppc_sysv_abi_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
if (vreg <= 13)
{
if (write_pass)
regcache_cooked_write (current_regcache,
regcache_cooked_write (regcache,
tdep->ppc_vr0_regnum + vreg, val);
vreg++;
}
@ -217,7 +217,7 @@ ppc_sysv_abi_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
if (greg <= 10)
{
if (write_pass)
regcache_cooked_write (current_regcache,
regcache_cooked_write (regcache,
tdep->ppc_ev0_regnum + greg, val);
greg++;
}

37
gdb/xtensa-tdep.c
View File

@ -314,7 +314,8 @@ xtensa_reg_to_regnum (int regnum)
(Note: The size of masked registers is always less or equal 32 bits.) */
static void
xtensa_register_write_masked (xtensa_register_t *reg, unsigned char *buffer)
xtensa_register_write_masked (struct regcache *regcache,
xtensa_register_t *reg, const gdb_byte *buffer)
{
unsigned int value[(MAX_REGISTER_SIZE + 3) / 4];
@ -383,10 +384,12 @@ xtensa_register_write_masked (xtensa_register_t *reg, unsigned char *buffer)
if (r >= 0 && size > 0)
{
/* Don't overwrite the unmasked areas. */
ULONGEST old_val;
regcache_cooked_read_unsigned (regcache, r, &old_val);
m = 0xffffffff >> (32 - size) << start;
regval <<= start;
regval = (regval & m) | (read_register (r) & ~m);
write_register (r, regval);
regval = (regval & m) | (old_val & ~m);
regcache_cooked_write_unsigned (regcache, r, regval);
}
}
}
@ -396,7 +399,8 @@ xtensa_register_write_masked (xtensa_register_t *reg, unsigned char *buffer)
register. */
static void
xtensa_register_read_masked (xtensa_register_t *reg, unsigned char *buffer)
xtensa_register_read_masked (struct regcache *regcache,
xtensa_register_t *reg, gdb_byte *buffer)
{
unsigned int value[(MAX_REGISTER_SIZE + 3) / 4];
@ -419,7 +423,15 @@ xtensa_register_read_masked (xtensa_register_t *reg, unsigned char *buffer)
for (i = 0; i < mask->count; i++)
{
int r = mask->mask[i].reg_num;
regval = (r >= 0) ? read_register (r) : 0;
if (r >= 0)
{
ULONGEST val;
regcache_cooked_read_unsigned (regcache, r, &val);
regval = (unsigned int) val;
}
else
regval = 0;
start = mask->mask[i].bit_start;
size = mask->mask[i].bit_size;
@ -541,7 +553,7 @@ xtensa_pseudo_register_read (struct gdbarch *gdbarch,
/* We can always read mapped registers. */
else if (type == xtRegisterTypeMapped || type == xtRegisterTypeTieState)
{
xtensa_register_read_masked (reg, (unsigned char *) buffer);
xtensa_register_read_masked (regcache, reg, buffer);
return;
}
@ -629,7 +641,7 @@ xtensa_pseudo_register_write (struct gdbarch *gdbarch,
/* We can always write mapped registers. */
else if (type == xtRegisterTypeMapped || type == xtRegisterTypeTieState)
{
xtensa_register_write_masked (reg, (unsigned char *) buffer);
xtensa_register_write_masked (regcache, reg, buffer);
return;
}
@ -910,10 +922,9 @@ xtensa_frame_cache (struct frame_info *next_frame, void **this_cache)
pc = frame_unwind_register_unsigned (next_frame, PC_REGNUM);
op1 = read_memory_integer (pc, 1);
if (XTENSA_IS_ENTRY (op1) || !windowing_enabled (read_register (PS_REGNUM)))
if (XTENSA_IS_ENTRY (op1) || !windowing_enabled (ps))
{
int callinc = CALLINC (frame_unwind_register_unsigned (next_frame,
PS_REGNUM));
int callinc = CALLINC (ps);
ra = frame_unwind_register_unsigned (next_frame,
A0_REGNUM + callinc * 4);
@ -924,7 +935,7 @@ xtensa_frame_cache (struct frame_info *next_frame, void **this_cache)
cache->callsize = 0;
cache->wb = wb;
cache->ws = ws;
cache->prev_sp = read_register (A1_REGNUM);
cache->prev_sp = frame_unwind_register_unsigned (next_frame, A1_REGNUM);
}
else
{
@ -987,7 +998,7 @@ xtensa_frame_cache (struct frame_info *next_frame, void **this_cache)
int regnum = AREG_NUMBER (A1_REGNUM, cache->wb);
cache->prev_sp = read_register (regnum);
cache->prev_sp = frame_unwind_register_unsigned (next_frame, regnum);
}
}
@ -1467,7 +1478,7 @@ xtensa_push_dummy_call (struct gdbarch *gdbarch,
/* ULONGEST v = extract_unsigned_integer (cp, REGISTER_SIZE);*/
regcache_cooked_write (regcache, r, cp);
/* write_register (r, v); */
/* regcache_cooked_write_unsigned (regcache, r, v); */
cp += REGISTER_SIZE;
n -= REGISTER_SIZE;
r++;

Write Preview
Loading…
Cancel
Save