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@ -48,7 +48,6 @@ USI |
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lm32bf_divu_insn (SIM_CPU * current_cpu, IADDR pc, USI r0, USI r1, USI r2) |
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{ |
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SIM_DESC sd = CPU_STATE (current_cpu); |
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host_callback *cb = STATE_CALLBACK (sd); |
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/* Check for divide by zero */ |
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if (GET_H_GR (r1) == 0) |
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@ -76,7 +75,6 @@ USI |
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lm32bf_modu_insn (SIM_CPU * current_cpu, IADDR pc, USI r0, USI r1, USI r2) |
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{ |
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SIM_DESC sd = CPU_STATE (current_cpu); |
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host_callback *cb = STATE_CALLBACK (sd); |
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/* Check for divide by zero. */ |
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if (GET_H_GR (r1) == 0) |
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@ -106,7 +104,7 @@ USI |
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lm32bf_break_insn (SIM_CPU * current_cpu, IADDR pc) |
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{ |
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SIM_DESC sd = CPU_STATE (current_cpu); |
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host_callback *cb = STATE_CALLBACK (sd); |
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/* Breakpoint. */ |
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if (STATE_ENVIRONMENT (sd) != OPERATING_ENVIRONMENT) |
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{ |
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@ -130,7 +128,6 @@ USI |
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lm32bf_scall_insn (SIM_CPU * current_cpu, IADDR pc) |
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{ |
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SIM_DESC sd = CPU_STATE (current_cpu); |
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host_callback *cb = STATE_CALLBACK (sd); |
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if ((STATE_ENVIRONMENT (sd) != OPERATING_ENVIRONMENT) |
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|| (GET_H_GR (8) == TARGET_NEWLIB_SYS_exit)) |
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@ -167,9 +164,6 @@ lm32bf_scall_insn (SIM_CPU * current_cpu, IADDR pc) |
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USI |
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lm32bf_b_insn (SIM_CPU * current_cpu, USI r0, USI f_r0) |
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{ |
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SIM_DESC sd = CPU_STATE (current_cpu); |
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host_callback *cb = STATE_CALLBACK (sd); |
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/* Restore interrupt enable. */ |
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if (f_r0 == 30) |
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SET_H_CSR (LM32_CSR_IE, (GET_H_CSR (LM32_CSR_IE) & 2) >> 1); |
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@ -183,9 +177,6 @@ lm32bf_b_insn (SIM_CPU * current_cpu, USI r0, USI f_r0) |
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void |
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lm32bf_wcsr_insn (SIM_CPU * current_cpu, USI f_csr, USI r1) |
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{ |
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SIM_DESC sd = CPU_STATE (current_cpu); |
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host_callback *cb = STATE_CALLBACK (sd); |
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/* Writing a 1 to IP CSR clears a bit, writing 0 has no effect. */ |
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if (f_csr == LM32_CSR_IP) |
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SET_H_CSR (f_csr, GET_H_CSR (f_csr) & ~r1); |
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