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@ -281,7 +281,7 @@ CGENFILES = $(CGENDIR)/cos.scm $(CGENDIR)/utils.scm \ |
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$(CGENDIR)/opcodes.scm $(CGENDIR)/cgen-opc.scm \
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cgen-opc.in cgen-asm.in cgen-dis.in |
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# The CGEN_MAINT conditional is put here so it ends up in Makefile.in
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# properly sanitized.
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# properly sanitised.
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@CGEN_MAINT_TRUE@M32R_DEPS = stamp-m32r |
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@CGEN_MAINT_TRUE@FR30_DEPS = stamp-fr30 |
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@CGEN_MAINT_TRUE@I960_DEPS = stamp-i960 |
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@ -666,7 +666,7 @@ config.status: $(srcdir)/configure $(srcdir)/../bfd/configure.in |
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# start-sanitize-cygnus
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run-cgen: |
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$(SHELL) $(srcdir)/cgen.sh opcodes $(srcdir) $(CGEN) $(CGENDIR) $(CGENFLAGS) $(arch) $(prefix) |
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$(SHELL) $(srcdir)/cgen.sh opcodes $(srcdir) $(CGEN) $(CGENDIR) $(CGENFLAGS) $(arch) $(prefix) $(options) |
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touch stamp-${prefix} |
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.PHONY: run-cgen |
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@ -674,19 +674,19 @@ run-cgen: |
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m32r-opc.h m32r-opc.c m32r-asm.c m32r-dis.c: $(M32R_DEPS) |
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@true |
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stamp-m32r: $(CGENFILES) $(CGENDIR)/m32r.cpu $(CGENDIR)/m32r.opc |
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$(MAKE) run-cgen arch=m32r prefix=m32r |
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$(MAKE) run-cgen arch=m32r prefix=m32r options=opinst |
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fr30-opc.h fr30-opc.c fr30-asm.c fr30-dis.c: $(FR30_DEPS) |
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@true |
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stamp-fr30: $(CGENFILES) $(CGENDIR)/fr30.cpu $(CGENDIR)/fr30.opc |
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$(MAKE) run-cgen arch=fr30 prefix=fr30 |
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$(MAKE) run-cgen arch=fr30 prefix=fr30 options= |
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# Use a prefix of i960c, so that the existing i960-dis.c can remain for now.
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# When the cgen i960 disassembler support is complete, this `c' can go away.
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i960c-opc.h i960c-opc.c i960c-asm.c i960c-dis.c: $(I960_DEPS) |
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@true |
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stamp-i960: $(CGENFILES) $(CGENDIR)/i960.cpu $(CGENDIR)/i960.opc |
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$(MAKE) run-cgen arch=i960 prefix=i960c |
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$(MAKE) run-cgen arch=i960 prefix=i960c options= |
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# end-sanitize-cygnus
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# start-sanitize-tic80
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