* m68hc11_sim.c (cpu_move8): Call sim_engine_abort in default case.

(cpu_move16): Likewise.
	(sim_memory_error): Use sim_io_printf.
	(cpu_option_handler): Fix compilation warning.
	* interp.c (sim_hw_configure): Fix compilation warning;
	remove m68hc12sio@2 device.
	(sim_open): Likewise.
	* dv-m68hc11tim.c (m68hc11tim_port_event): Fix clear of TFLG2
	flags when reset.
	(cycle_to_string): Improve convertion of cpu cycle number.
	(m68hc11tim_info): Print info about PACNT.
	(m68hc11tim_io_write_buffer): Fix clearing of TFLG2; handle
	TCTL1 and TCTL2 registers.
	* dv-m68hc11.c (m68hc11_info): Print 6811 current running mode.

sim/m68hc11/ChangeLog

@@ -1,3 +1,20 @@
+2002-03-07  Stephane Carrez  <Stephane.Carrez@worldnet.fr>
+
+	* m68hc11_sim.c (cpu_move8): Call sim_engine_abort in default case.
+	(cpu_move16): Likewise.
+	(sim_memory_error): Use sim_io_printf.
+	(cpu_option_handler): Fix compilation warning.
+	* interp.c (sim_hw_configure): Fix compilation warning; 
+	remove m68hc12sio@2 device.
+	(sim_open): Likewise.
+	* dv-m68hc11tim.c (m68hc11tim_port_event): Fix clear of TFLG2 
+	flags when reset.
+	(cycle_to_string): Improve convertion of cpu cycle number.
+	(m68hc11tim_info): Print info about PACNT.
+	(m68hc11tim_io_write_buffer): Fix clearing of TFLG2; handle
+	TCTL1 and TCTL2 registers.
+	* dv-m68hc11.c (m68hc11_info): Print 6811 current running mode.
+
 2002-03-07  Stephane Carrez  <Stephane.Carrez@worldnet.fr>
 
 	* interp.c (sim_hw_configure): Save the HW cpu pointer in the 

sim/m68hc11/dv-m68hc11.c

@@ -591,7 +591,21 @@ m68hc11_info (struct hw *me)
 
   val = cpu->ios[M6811_HPRIO];
   print_io_byte (sd, "HPRIO ", hprio_desc, val, base + M6811_HPRIO);
-  sim_io_printf (sd, "\n");
+  switch (cpu->cpu_mode)
+    {
+    case M6811_MDA | M6811_SMOD:
+      sim_io_printf (sd, "[test]\n");
+      break;
+    case M6811_SMOD:
+      sim_io_printf (sd, "[bootstrap]\n");
+      break;
+    case M6811_MDA:
+      sim_io_printf (sd, "[extended]\n");
+      break;
+    default:
+      sim_io_printf (sd, "[single]\n");
+      break;
+    }
 
   val = cpu->ios[M6811_CONFIG];
   print_io_byte (sd, "CONFIG", config_desc, val, base + M6811_CONFIG);

sim/m68hc11/dv-m68hc11tim.c

@@ -194,12 +194,12 @@ m68hc11tim_port_event (struct hw *me,
           }
 
         /* Reset the state of Timer registers.  This also restarts
-           the timer events (overflow and RTI clock).  */
+           the timer events (overflow and RTI clock).  The pending
+           flags (TFLG2) must be cleared explicitly here.  */
         val = 0;
+        cpu->ios[M6811_TFLG2] = 0;
         m68hc11tim_io_write_buffer (me, &val, io_map,
                                     (unsigned_word) M6811_TMSK2, 1);
-        m68hc11tim_io_write_buffer (me, &val, io_map,
-                                    (unsigned_word) M6811_TFLG2, 1);
         m68hc11tim_io_write_buffer (me, &val, io_map,
                                     (unsigned_word) M6811_PACTL, 1);
         break;
@@ -436,17 +436,19 @@ const char*
 cycle_to_string (sim_cpu *cpu, signed64 t)
 {
   double dt;
+  char tbuf[32];
   static char buf[64];
-  
+
   dt = to_realtime (cpu, t);
   if (dt < 0.001)
-    sprintf (buf, "%llu cycle%s (%3.1f us)", t,
+    sprintf (tbuf, "(%3.1f us)", dt * 1000000.0);
-             (t > 1 ? "s" : ""), dt * 1000000.0);
   else if (dt < 1.0)
-    sprintf (buf, "%llu cycles (%3.1f ms)", t, dt * 1000.0);
+    sprintf (tbuf, "(%3.1f ms)", dt * 1000.0);
   else
-    sprintf (buf, "%llu cycles (%3.1f s)", t, dt);
+    sprintf (tbuf, "(%3.1f s)", dt);
 
+  sprintf (buf, "%llu cycle%s %10.10s", t,
+             (t > 1 ? "s" : ""), tbuf);
   return buf;
 }
 
@@ -503,6 +505,10 @@ m68hc11tim_info (struct hw *me)
   print_io_byte (sd, "PACTL", pactl_desc, val, base + M6811_PACTL);
   sim_io_printf (sd, "\n");
 
+  val = cpu->ios[M6811_PACNT];
+  print_io_byte (sd, "PACNT", 0, val, base + M6811_PACNT);
+  sim_io_printf (sd, "\n");
+
   /* Give info about the next timer interrupts.  */
   m68hc11tim_print_timer (me, "RTI", controller->rti_timer_event);
   m68hc11tim_print_timer (me, "COP", controller->cop_timer_event);
@@ -625,7 +631,7 @@ m68hc11tim_io_write_buffer (struct hw *me,
 
         case M6811_TMSK2:
 
-      /* Timer prescaler cannot be changed after 64 bus cycles.  */
+          /* Timer prescaler cannot be changed after 64 bus cycles.  */
           if (cpu->cpu_absolute_cycle >= 64)
             {
               val &= ~(M6811_PR1 | M6811_PR0);
@@ -665,21 +671,22 @@ m68hc11tim_io_write_buffer (struct hw *me,
           break;
       
         case M6811_TFLG2:
-          if (val & M6811_TOF)
+          val &= cpu->ios[M6811_TFLG2];
-            val &= ~M6811_TOF;
+          cpu->ios[M6811_TFLG2] &= ~val;
-          else
+          interrupts_update_pending (&cpu->cpu_interrupts);
-            val |= cpu->ios[M6811_TFLG2] & M6811_TOF;
+          break;
 
-      /* Clear the Real Time interrupt flag. */
+        case M6811_TMSK1:
-          if (val & M6811_RTIF)
+          cpu->ios[M6811_TMSK1] = val;
-            val &= ~M6811_RTIF;
-          else
-            val |= cpu->ios[M6811_TFLG2] & M6811_RTIF;
-      
-          cpu->ios[base] = val;
           interrupts_update_pending (&cpu->cpu_interrupts);
           break;
 
+        case M6811_TFLG1:
+          val &= cpu->ios[M6811_TFLG1];
+          cpu->ios[M6811_TFLG1] &= ~val;
+          interrupts_update_pending (&cpu->cpu_interrupts);          
+          break;
+
         case M6811_TOC1:
         case M6811_TOC2:
         case M6811_TOC3:
@@ -689,7 +696,13 @@ m68hc11tim_io_write_buffer (struct hw *me,
           reset_compare = 1;
           break;
       
+        case M6811_TCTL1:
+        case M6811_TCTL2:
+          cpu->ios[base] = val;
+          break;
+
         default:
+          cpu->ios[base] = val;
           break;
         }
 

sim/m68hc11/interp.c

@@ -171,7 +171,6 @@ sim_hw_configure (SIM_DESC sd)
 {
   const struct bfd_arch_info *arch;
   struct hw *device_tree;
-  int m6811_mode;
   sim_cpu *cpu;
   
   arch = STATE_ARCHITECTURE (sd);
@@ -252,12 +251,6 @@ sim_hw_configure (SIM_DESC sd)
 	  sim_hw_parse (sd, "/m68hc12/m68hc12sio@1/backend stdio");
 	  sim_hw_parse (sd, "/m68hc12 > cpu-reset reset /m68hc12/m68hc12sio@1");
 	}
-      if (!hw_tree_find_property (device_tree, "/m68hc12/m68hc12sio@2/reg"))
-	{
-	  sim_hw_parse (sd, "/m68hc12/m68hc12sio@2/reg 0xC8 0x8");
-	  sim_hw_parse (sd, "/m68hc12/m68hc12sio@2/backend tcp");
-	  sim_hw_parse (sd, "/m68hc12 > cpu-reset reset /m68hc12/m68hc12sio@2");
-	}
       if (hw_tree_find_property (device_tree, "/m68hc12/m68hc12tim/reg") == 0)
 	{
 	  /* M68hc11 Timer configuration. */
@@ -312,10 +305,8 @@ SIM_DESC
 sim_open (SIM_OPEN_KIND kind, host_callback *callback,
           struct _bfd *abfd, char **argv)
 {
-  char **p;
   SIM_DESC sd;
   sim_cpu *cpu;
-  struct hw *device_tree;
 
   sd = sim_state_alloc (kind, callback);
   cpu = STATE_CPU (sd, 0);

sim/m68hc11/m68hc11_sim.c

@@ -54,7 +54,6 @@ static SIM_RC
 cpu_option_handler (SIM_DESC sd, sim_cpu *cpu,
                     int opt, char *arg, int is_command)
 {
-  sim_cpu *cpu;
   int val;
   
   cpu = STATE_CPU (sd, 0);
@@ -393,7 +392,11 @@ cpu_move8 (sim_cpu *cpu, uint8 code)
       src = cpu_get_indexed_operand8 (cpu, 1);
       addr = cpu_get_indexed_operand_addr (cpu, 1);
       break;
-      
+
+    default:
+      sim_engine_abort (CPU_STATE (cpu), cpu, 0,
+			"Invalid code 0x%0x -- internal error?", code);
+      return;
     }
   memory_write8 (cpu, addr, src);
 }
@@ -436,7 +439,11 @@ cpu_move16 (sim_cpu *cpu, uint8 code)
       src = cpu_get_indexed_operand16 (cpu, 1);
       addr = cpu_get_indexed_operand_addr (cpu, 1);
       break;
-      
+
+    default:
+      sim_engine_abort (CPU_STATE (cpu), cpu, 0,
+			"Invalid code 0x%0x -- internal error?", code);
+      return;
     }
   memory_write16 (cpu, addr, src);
 }
@@ -941,7 +948,7 @@ sim_memory_error (sim_cpu *cpu, SIM_SIGNAL excep,
   vsprintf (buf, message, args);
   va_end (args);
 
-  printf("%s\n", buf);
+  sim_io_printf (CPU_STATE (cpu), "%s\n", buf);
   cpu_memory_exception (cpu, excep, addr, buf);
 }